For very long online resizes, a periodic update to the console log is
helpful for debugging and for progress reporting.
Signed-off-by: "Theodore Ts'o" <tytso@mit.edu>
If we have run out of reserved gdt blocks, then clear the resize_inode
feature and enable the meta_bg feature, so that we can continue
resizing the file system seamlessly.
Signed-off-by: "Theodore Ts'o" <tytso@mit.edu>
Convert Tegra to use struct smp_operations to provide its SMP
and CPU hotplug operations.
Tested on Harmony.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Olof Johansson <olof@lixom.net>
Acked-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Convert OMAP4 to use struct smp_operations to provide its SMP
and CPU hotplug operations.
Tested on both Panda and IGEPv2 (MULTI_OMAP kernel)
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Reviewed-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Acked-by: Nicolas Pitre <nico@linaro.org>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Convert both Realview and VExpress to use struct smp_operations to
provide their SMP and CPU hotplug operation.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Acked-by: Nicolas Pitre <nico@fluxnic.net>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Set the default value of position_fix -1, and allow user passing
position_fix=0 explicitly to set the "auto" position-fix mode.
Otherwise the auto mode may be switched to others like COMBO of
VIACOMBO when the controller prefers it, thus user can't set the auto
mode any longer.
Also updated the documentation appropriately, too.
Signed-off-by: Takashi Iwai <tiwai@suse.de>
Just a few small / trivial regression fixes at this time.
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Merge tag 'sound-3.6' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound
Pull sound fixes from Takashi Iwai:
"Just a few small / trivial regression fixes at this time."
* tag 'sound-3.6' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound:
ALSA: ice1724: Use linear scale for AK4396 volume control.
ALSA: hda_intel: add position_fix quirk for Asus K53E
ALSA: compress_core: fix open flags test in snd_compr_open()
ALSA: hda - Fix Oops at codec reset/reconfig
ALSA: usb-audio: Fix bogus error messages for delay accounting
ALSA: hda - Fix missing Master volume for STAC9200/925x
This adds a 'struct smp_operations' to abstract the CPU initialization
and hot plugging functions on SMP systems, which otherwise conflict
in a multiplatform kernel. This also helps shmobile and potentially
others that have more than one method to do these.
To allow the kernel to continue building, the platform hooks are
defined as weak symbols which are overrided by the platform code.
Once all platforms are converted, the "weak" attribute will be
removed and the function made static.
Unlike the original version from Marc, this new version from Arnd
does not use a generalized abstraction for per-soc data structures
but only tries to solve the problem for the SMP operations. This
way, we can collapse the previous four data structures into a
single struct, which is less systematic but also easier to follow
as a causal reader.
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Acked-by: Nicolas Pitre <nico@fluxnic.net>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- A set of OMAP fixes, about half of them PM/clock related, the rest
scattered over the platform code but all small and targeted to real bugs.
- Two small i.MX fixes for SSI device clock setup.
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Merge tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull arm-soc bug fixes from Olof Johansson:
- A set of OMAP fixes, about half of them PM/clock related, the rest
scattered over the platform code but all small and targeted to real
bugs.
- Two small i.MX fixes for SSI device clock setup.
* tag 'fixes-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
ARM: clk-imx35: Fix SSI clock registration
ARM: clk-imx25: Fix SSI clock registration
ARM: OMAP4: Fix array size for irq_target_cpu
ARM: OMAP4: hwmod data: temporarily comment out data for the sl2if IP block
ARM: OMAP: hwmod code: Disable module when hwmod enable fails
ARM: OMAP3: hwmod data: fix iva2 reset info
ARM: OMAP3xxx: clockdomain: fix software supervised wakeup/sleep
ARM: OMAP2+: am33xx: Fix the timer fck clock naming convention
ARM: OMAP: Config fix for omap3-touchbook board
ARM: OMAP: sram: skip the first 16K on OMAP3 HS
ARM: OMAP: sram: fix OMAP4 errata handling
ARM: OMAP: timer: obey the !CONFIG_OMAP_32K_TIMER
The claim_reserved_blks() function was not taking account of
the possibility of "blockages" while performing allocation.
This can be caused by another node allocating something in
the same extent which has been reserved locally.
This patch tests for this condition and then skips the remainder
of the reservation in this case. This is a relatively rare event,
so that it should not affect the general performance improvement
which the block reservations provide.
The claim_reserved_blks() function also appears not to be able
to deal with reservations which cross bitmap boundaries, but
that can be dealt with in a future patch since we don't generate
boundary crossing reservations currently.
Signed-off-by: Steven Whitehouse <swhiteho@redhat.com>
Reported-by: David Teigland <teigland@redhat.com>
Cc: Bob Peterson <rpeterso@redhat.com>
This collects up the write size hinting code which is used by the
block reservation subsystem into a single function. At the same
time this also corrects the rounding for this calculation.
Signed-off-by: Steven Whitehouse <swhiteho@redhat.com>
The driver was using a 16 bit field for storing the shadow value of the shift
register cascade. This resulted in only the first 2 shift registeres receiving
the correct data. The third shift register would always receive 0x00.
Fix this by using a 32bit field for the shadow value.
Signed-off-by: John Crispin <blogic@openwrt.org>
Cc: linux-kernel@vger.kernel.org
The gpio_chip struct allows us to set a .to_irq callback. Once this is set
we can rely on the generic __gpio_to_irq() function to map gpio->irq allowing
more than one gpio_chip to register an interrupt
Signed-off-by: John Crispin <blogic@openwrt.org>
Implement support for pinctrl on lantiq/falcon socs. The FALCON has 5 banks
of up to 32 pins.
Signed-off-by: John Crispin <blogic@openwrt.org>
Signed-off-by: Thomas Langer <thomas.langer@lantiq.com>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Cc: devicetree-discuss@lists.ozlabs.org
Cc: linux-kernel@vger.kernel.org
Implement support for pinctrl on lantiq/xway socs. The IO core found on these
socs has the registers for pinctrl, pinconf and gpio mixed up in the same
register range. As the gpio_chip handling is only a few lines, the driver also
implements the gpio functionality. This obseletes the old gpio driver that was
located in the arch/ folder.
Signed-off-by: John Crispin <blogic@openwrt.org>
Acked-by: Linus Walleij <linus.walleij@linaro.org>
Cc: devicetree-discuss@lists.ozlabs.org
Cc: linux-kernel@vger.kernel.org
1/ Fix the workaround for drives that have a slow response to COMSAS.
Drives with this problem intermittently take a long time to be
identified, or fail to be identified altogether.
2/ A minor fix for the efi variable code failure path
3/ A handful of smatch fixups from Dan Carpenter
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Merge tag 'isci-for-3.6' into for-next
isci update for 3.6
1/ Fix the workaround for drives that have a slow response to COMSAS.
Drives with this problem intermittently take a long time to be
identified, or fail to be identified altogether.
2/ A minor fix for the efi variable code failure path
3/ A handful of smatch fixups from Dan Carpenter
Due to the definitions of CS420X_IMAC27_122 and CS420X_APPLE as
aliases, the rest enums are set to duplicated values unexpectedly.
Move the alias definitions at the end so that the enum values are
defined in the proper order.
Reported-by: Fengguang Wu <fengguang.wu@intel.com>
Signed-off-by: Takashi Iwai <tiwai@suse.de>
This is three ux500 core updates with no direct relation
but grouped in a pull request:
- Set the proper GIC flags to mask when suspended and
skip wake.
- Fix a build error introduced from the PMU patch set
- Provide a fixed regulator for the Snowball when not
using DT.
* tag 'ux500-core-updates' of http://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-stericsson:
ARM: ux500: Provide SMSC911x fixed-regulator when not booting DT
ARM: ux500: Fix build error due to missing include of asm/pmu.h in cpu-db8500.c
ARM: ux500: set proper GIC flags
From "Uwe Kleine-Knig" <u.kleine-koenig@pengutronix.de>:
this is the 2nd version of this series whose goal is to make struct
of_device_id.data const. Conceptually a driver must not modify the data
contained there so making it const is the right thing.
v1 of this series was sent with Message-id:
1342182734-321-1-git-send-email-y. Changes since then are:
- powerpc fixes
- several new consts that were found by Arnd that are possible after
patch 19.
Arnd suggested to take this series via arm-soc late for 3.6 in one go
because patch 19 depends on the former patches but is a precondition to
the latter and it fixes a few warnings. So getting it in via the
respective maintainer trees would need a much bigger coordination
effort. That means I prefer getting Acks over you taking the patch.
Vinod Koul already took
dmaengine: at_hdmac: add a few const qualifiers
that is in next-20120723 as 7fd63ccdad now. Vinod, I don't follow your
pull requests, but assuming you didn't let it already pull for 3.6 I
suggest you drop it from your queue and I just take your Ack.
This series was build tested for arm (all defconfigs) and powerpc (all
defconfigs and an allyesconfig) and grep didn't find more issues. As
before it introduces a warning in drivers/regulator/twl-regulator.c.
This driver does modify its .of_match_table when a device is bound which
doesn't fits the concept of independant devices. Arnd noticed another
new warning in drivers/scsi/qlogicpti.c that isn't that easy to resolve,
because the pointer to (now) const data is passed as first argument to
scsi_host_alloc. To fix that properly struct Scsi_Host.hostt needs to
get a const, too. Alternatively I could introduce a cast removing the
const, but I don't like that.
* 'ofdeviceiddata' of git://git.pengutronix.de/git/ukl/linux: (25 commits)
dma: tegra: make data used as *of_device_id.data const
can: mpc5xxx_can: make data used as *of_device_id.data const
macintosh/mediabay: make data used as *of_device_id.data const
i2c/mpc: make data used as *of_device_id.data const
mfd/da9052: make i2c_device_id array const
powerpc/fsl_msi: drop unneeded cast to non-const pointer
gpio/gpio-omap: make platformdata used as *of_device_id.data const
of: add const to struct *of_device_id.data
dma: tegra: make tegra_dma.chip_data a pointer to const data
watchdog/mpc8xxx: add a const qualifier
powerpc/celleb_pci: add a const qualifier
powerpc/fsl_msi: add a const qualifier
powerpc/83xx: add a const qualifier
macintosh/mediabay: add a const qualifier
mmc/omap_hsmmc: add a const qualifier
i2c/mpc: add a const qualifier
i2c/i2c-omap: add a const qualifier
gpio/mpc8xxx: add a const qualifier
gpio/gpio-omap.c: add a const qualifier
misc/atmel_tc: make atmel_tc.tcb_config member point to const data
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
[olof: repulled a v3 version of the branch that rebased to add some more
acked-bys and added one more patch on top for tegra]
Signed-off-by: Olof Johansson <olof@lixom.net>
With pinctrl-single,bits it is possible to update just part of the register
within the pinctrl-single,function-mask area.
This is useful when one register configures mmore than one pin's mux.
pinctrl-single,bits takes three parameters:
<reg offset, value, sub-mask>
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
[Removed a misplaced comment]
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Generic PWM framework requires that the board setup code
register a static mapping that can be used to match PWM
consumers to providers.
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Reviewed-by: <thierry.reding@avionic-design.de>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
Generic PWM framework requires that the board setup code
register a static mapping that can be used to match PWM
consumers to providers.
Signed-off-by: Sachin Kamat <sachin.kamat@linaro.org>
Reviewed-by: <thierry.reding@avionic-design.de>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
It replaces the clk_register_clkdev in imx6q clock driver with DT
lookup. It depends on Mike's clk-3.7 branch.
When it gets merged together with imx-dt-3.7, there is a trivial
conflict on arch/arm/boot/dts/imx6q.dtsi.
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Merge tag 'imx-clk-dt-lookup' of git://git.linaro.org/people/shawnguo/linux-2.6 into next/dt
It replaces the clk_register_clkdev in imx6q clock driver with DT
lookup. It depends on Mike's clk-3.7 branch.
* tag 'imx-clk-dt-lookup' of git://git.linaro.org/people/shawnguo/linux-2.6:
ARM: imx6q: replace clk_register_clkdev with clock DT lookup
Resolved context add/remove conflict in arch/arm/boot/dts/imx6q.dtsi
- All imx53 board files are removed by the equal device tree support
- The efikamx board files are removed to ease device tree migration
- Remove dummy pinctrl state by setting up pinctrl in device tree
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Merge tag 'imx-dt-3.7' of git://git.linaro.org/people/shawnguo/linux-2.6 into next/dt
- All imx53 board files are removed by the equal device tree support
- The efikamx board files are removed to ease device tree migration
- Remove dummy pinctrl state by setting up pinctrl in device tree
* tag 'imx-dt-3.7' of git://git.linaro.org/people/shawnguo/linux-2.6: (28 commits)
ARM: imx6q-sabrelite: Rename 'pinctrl_gpio_hog'
ARM: imx51: decouple device tree boot from board files
ARM: imx51: build in pinctrl support
ARM: dts: imx51-babbage: add pinctrl settings
ARM: imx53: remove unneeded files and functions
ARM: imx53: support device tree boot only
ARM: imx53: decouple device tree boot from board files
ARM: imx53: build in pinctrl support
ARM: dts: imx53-smd: add pinctrl settings
ARM: dts: imx53-evk: add pinctrl settings
ARM: dts: imx53-ard: add pinctrl settings
ARM: dts: imx53-qsb: add pinctrl settings
ARM: imx6q: remove dummy pinctrl state
ARM: dts: imx6q-sabresd: add pinctrl settings
ARM: dts: imx6q-arm2: add pinctrl for uart and enet
ARM: dts: imx6q-sabrelite: add pinctrl for usdhc and enet
ARM: dts: imx6q: sort iomuxc sub-nodes in name
ARM: dts: imx6q: name iomuxc sub-nodes following pin function
ARM: dts: imx6q: improve indentation for fsl,pins
ARM: efikamx: remove Genesi Efika MX platform files from the tree
...
Resolved trivial context conflict in arch/arm/boot/dts/imx51-babbage.dts
A collection of mxs_defconfig updates for 3.7.
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Merge tag 'mxs-defconfig-3.7' of git://git.linaro.org/people/shawnguo/linux-2.6 into next/defconfig
A collection of mxs_defconfig updates for 3.7.
* tag 'mxs-defconfig-3.7' of git://git.linaro.org/people/shawnguo/linux-2.6:
ARM: mxs_defconfig: Add SPI and LRADC support
ARM: mxs_defconfig: Add framebuffer support
ARM: mxs_defconfig: Add LED, PWM and MTD_CHAR support
ARM: mxs_defconfig: Enable USB host
It replaces clk_register_clkdev in mxs clock driver with DT lookup.
The series depends on pull request mxs-dt-3.7 and Mike's clk branch
below.
git://git.linaro.org/people/mturquette/linux.git clk-3.7
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Merge tag 'mxs-clk-dt-lookup' of git://git.linaro.org/people/shawnguo/linux-2.6 into next/dt
It replaces clk_register_clkdev in mxs clock driver with DT lookup.
* tag 'mxs-clk-dt-lookup' of git://git.linaro.org/people/shawnguo/linux-2.6:
clk: mxs: replace imx23 clk_register_clkdev with clock DT lookup
clk: mxs: replace imx28 clk_register_clkdev with clock DT lookup
* 'clk-3.7' of git://git.linaro.org/people/mturquette/linux:
clk: add of_clk_src_onecell_get() support
clk: ux500: Define smp_twd clock for u8500
mfd: dbx500: Provide a more accurate smp_twd clock
clk: ux500: Support for prmcu_rate clock
clk: Provide option for clk_get_rate to issue hw for new rate
clock: max77686: Add driver for Maxim 77686 32Khz crystal oscillator.
ARM: ux500: Switch to use common clock framework
clk: ux500: Clock definitions for u8500
clk: ux500: First version of clock definitions for ux500
clk: ux500: Adapt PRCMU and PRCC clocks for common clk
clk: versatile: make config option boolean
clk: add Loongson1B clock support
arm: mmp: make all SOCs use common clock by default
clk: mmp: add clock definition for mmp2
clk: mmp: add clock definition for pxa910
clk: mmp: add clock definition for pxa168
clk: mmp: add mmp specific clocks
clk: convert ARM RealView to common clk
clk: prima2: move from arch/arm/mach to drivers/clk
ARM: PRIMA2: convert to common clk and finish full clk tree
The armadillo800eva has S35390A which is RTC. This is controlled
using I2C of GPIO.
This commit supports RTC of armadillo800eva.
Signed-off-by: Nobuhiro Iwamatsu <nobuhiro.iwamatsu.yj@renesas.com>
Signed-off-by: Simon Horman <horms@verge.net.au>
The series adds irqdomain support for mach-mxs and then enables
sparse-irq. It dependes on pull request mxs-dt-3.7.
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Merge tag 'mxs-sparse-irq' of git://git.linaro.org/people/shawnguo/linux-2.6 into next/soc2
The series adds irqdomain support for mach-mxs and then enables
sparse-irq. It dependes on pull request mxs-dt-3.7.
* tag 'mxs-sparse-irq' of git://git.linaro.org/people/shawnguo/linux-2.6:
ARM: mxs: remove mach/irqs.h
ARM: mxs: select SPARSE_IRQ
ARM: mxs: adopt irq_domain support for icoll driver
ARM: mxs: select MULTI_IRQ_HANDLER
ARM: mxs: retrieve timer irq from device tree
gpio/mxs: adopt irq_domain support for mxs gpio driver
Since READ/WRITE FPDMA QUEUED commands are 48-bit, bit 6 of the device register
means LBA, the same as for READ/WRITE DMA EXT commands. So use ATA_LBA instead
of the bare number in ata_build_rw_tf()'s branch dedicated to the NCQ commands.
Signed-off-by: Sergei Shtylyov <sshtylyov@ru.mvista.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
On many architectures, drivers are supposed to prepare/unprepare &
enable/disable functional clock of device. This patch adds clock support for
ahci_platform.
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
SPEAr platforms now support DT and so must convert all drivers to support DT.
This patch adds DT probing support for Arasan Compact Flash controller and
updates its documentation too.
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
clk_{un}prepare is mandatory for platforms using common clock framework. Since
this driver is used by SPEAr platform, which supports common clock framework,
add clk_{un}prepare() support for it.
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
Calxeda highbank SATA phy has intermittent problems bringing up a link
with Gen3 drives. Retrying the phy hard reset can work-around this issue,
but each reset also disables spread spectrum support. The reset function
also needs to reprogram the phy to enable spread spectrum support.
Create a new driver based on ahci_platform to support the Calxeda Highbank
SATA controller.
Signed-off-by: Mark Langsdorf <mark.langsdorf@calxeda.com>
Signed-off-by: Rob Herring <rob.herring@calxeda.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
The freescale V2 SATA controller checks if the received data length matches
the programmed length 'ttl', if not, it assumes that this is an error.
In ATAPI, the 'ttl' is based on max allocation length and not the actual
data transfer length, controller will raise 'DLM' (Data length Mismatch)
error bit in Hstatus register. Along with 'DLM', DE (Device error) and
FE (fatal Error) bits are also set in Hstatus register, 'E' (Internal Error)
bit is set in Serror register and CE (Command Error) and DE (Device error)
registers have the corresponding bit set. In this condition, we need to
clear errors in following way: in the service routine, based on 'DLM' flag,
HCONTROL[27] operation clears Hstatus, CE and DE registers, clear Serror
register.
Signed-off-by: Shaohui Xie <Shaohui.Xie@freescale.com>
Signed-off-by: Anju Bhartiya <Anju.Bhartiya@freescale.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
Device Sleep is a feature as described in AHCI 1.3.1 Technical Proposal.
This feature enables an HBA and SATA storage device to enter the DevSleep
interface state, enabling lower power SATA-based systems.
Aggressive Device Sleep enables the HBA to assert the DEVSLP signal as
soon as there are no commands outstanding to the device and the port
specific Device Sleep idle timer has expired. This enables autonomous
entry into the DevSleep interface state without waiting for software
in power sensitive systems.
This patch enables Aggressive Device Sleep only if both host controller
and device support it.
Tested on AMD reference board together with Device Sleep supported device
sample.
Signed-off-by: Shane Huang <shane.huang@amd.com>
Reviewed-by: Aaron Lu <aaron.lwe@gmail.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
