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1,398,251 commits

Author SHA1 Message Date
Troy Mitchell
7d50d9bf1c
dt-bindings: clock: spacemit: CLK_SSPA_I2S_BCLK for SSPA
In order to use the virtual clock SSPAx_I2S_BCLK in the device tree and
register it in the driver, this patch introduces the macro definition.

Fixes: 1b72c59db0 ("clk: spacemit: Add clock support for SpacemiT K1 SoC")
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Troy Mitchell <troy.mitchell@linux.spacemit.com>
Link: https://lore.kernel.org/r/20250811-k1-clk-i2s-v5-1-ebadd06e1e91@linux.spacemit.com
Signed-off-by: Yixun Lan <dlan@gentoo.org>
2025-08-24 15:42:28 +08:00
Hendrik Hamerlinck
eba84c94f9
riscv: dts: spacemit: add UART resets for Soc K1
The UARTs in the SpacemiT K1 device tree are probed by the 8250_of driver,
but without reset lines they remain non-functional.

Add reset control entries so that the UARTs can operate when mapped to
devices. UART0 is already de-asserted by the bootloader, but include its
reset as well to avoid relying on bootloader state.

Tested on Orange Pi RV2 and Banana Pi BPI-F3 boards, with UART9 enabled
and verified functional.

Signed-off-by: Hendrik Hamerlinck <hendrik.hamerlinck@hammernet.be>
Reviewed-by: Yixun Lan <dlan@gentoo.org>
Link: https://lore.kernel.org/r/20250821152619.597051-1-hendrik.hamerlinck@hammernet.be
Signed-off-by: Yixun Lan <dlan@gentoo.org>
2025-08-24 15:16:09 +08:00
Sebastian Reichel
67b2c15d8f arm64: dts: rockchip: add USB-C support for ROCK 5B/5B+/5T
Add hardware description for the USB-C port in the Radxa ROCK 5 Model B
family. This describes the OHCI, EHCI and XHCI USB parts. The DisplayPort
AltMode is only partially described, as bindings for the necessary
DisplayPort controller are still being reviewed.

Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Link: https://lore.kernel.org/r/20250819-rock5bp-for-upstream-v4-1-7a2365ce7176@kernel.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-08-24 09:04:14 +02:00
Kyle Petryszak
5487086c4d arm64: dts: rockchip: Add green power LED to rk3588s-rock-5a
The Radxa ROCK 5A board includes a green power LED that is defined in
the vendor device tree but is missing from the upstream kernel DTS file.

This causes the LED to be uncontrollable from the operating system, as no
entry is created for it under /sys/class/leds.

This patch adds the missing node to the leds block, creating a
"green:power" device and allowing the LED to be controlled by the kernel.

Signed-off-by: Kyle Petryszak <kylepzak@projectinitiative.io>
Link: https://lore.kernel.org/r/175565703702.6.15498212790604388615.862782045@projectinitiative.io
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-08-24 09:04:02 +02:00
Krzysztof Kozlowski
521b36e5a2 arm64: dts: rockchip: Minor whitespace cleanup
The DTS code coding style expects exactly one space around '=' or '{'
characters.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20250819131607.86338-4-krzysztof.kozlowski@linaro.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-08-24 08:43:28 +02:00
Krzysztof Kozlowski
106bdca970 ARM: dts: rockchip: Minor whitespace cleanup
The DTS code coding style expects exactly one space around '='
character.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20250819131607.86338-3-krzysztof.kozlowski@linaro.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-08-24 08:43:28 +02:00
Chen-Yu Tsai
2dea24df23 arm64: dts: rockchip: Add supplies for eMMC on rk3588-orangepi-5
The eMMC description is missing both vmmc and vqmmc supplies.

Add them to complete the description.

Fixes: 236d225e1e ("arm64: dts: rockchip: Add board device tree for rk3588-orangepi-5-plus")
Fixes: ea63f4666e ("arm64: dts: rockchip: refactor common rk3588-orangepi-5.dtsi")
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Link: https://lore.kernel.org/r/20250821052939.1869171-1-wens@kernel.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-08-24 08:35:09 +02:00
Jonas Karlman
178879625f arm64: dts: rockchip: Enable more power domains for RK3528
Describe device power-domains and enable the PD_RKVENC, PD_VO and PD_VPU
power-domains on RK3528.

The PD_RKVDEC is used by RKVDEC and DDRPHY CRU, and is kept disabled to
prevent a full system reset trying to read the rate of the SCMI_CLK_DDR
clock.

Signed-off-by: Jonas Karlman <jonas@kwiboo.se>
Link: https://lore.kernel.org/r/20250821211843.3051349-2-jonas@kwiboo.se
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-08-24 08:24:03 +02:00
Maud Spierings
3dc7ba3548 arm64: dts: rockchip: Enable the NPU on the orangepi 5 boards
Enable the NPU and the PMIC that powers it.

Signed-off-by: Maud Spierings <maud_spierings@hotmail.com>
Reviewed-by: Ondřej Jirman <megi@xff.cz>
Link: https://lore.kernel.org/r/20250823-orangepi5-v1-3-ae77dd0e06d7@hotmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-08-24 08:14:32 +02:00
Maud Spierings
ccc7f16ea2 arm64: dts: rockchip: Enable HDMI receiver on orangepi 5 plus
Enable support for the HDMI input port found on the orangepi 5 plus.

Signed-off-by: Maud Spierings <maud_spierings@hotmail.com>
Reviewed-by: Ondřej Jirman <megi@xff.cz>
Link: https://lore.kernel.org/r/20250823-orangepi5-v1-2-ae77dd0e06d7@hotmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-08-24 08:14:32 +02:00
Maud Spierings
8976583832 arm64: dts: rockchip: Fix the headphone detection on the orangepi 5 plus
The logic of the headphone detect pin seems to be inverted, with this
change headphones actually output sound when plugged in.

Verified by checking /sys/kernel/debug/gpio and by listening.

Fixes: 236d225e1e ("arm64: dts: rockchip: Add board device tree for rk3588-orangepi-5-plus")
Signed-off-by: Maud Spierings <maud_spierings@hotmail.com>
Reviewed-by: Ondřej Jirman <megi@xff.cz>
Link: https://lore.kernel.org/r/20250823-orangepi5-v1-1-ae77dd0e06d7@hotmail.com
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
2025-08-24 08:14:10 +02:00
Krzysztof Kozlowski
2f8c7b179f arm64: dts: qcom: Use GIC_SPI for interrupt-map for readability
Decoding interrupt-map is tricky, because it consists of five
components.  Use known GIC_SPI define in final interrupt specifier
component makes easier to read.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20250822-dts-interrupt-address-cells-v1-10-d54d44b74460@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-08-23 21:37:16 -05:00
Krzysztof Kozlowski
9c18757804 arm64: dts: qcom: sm8350: Add default GIC address cells
Add missing address-cells 0 to GIC interrupt node to silence W=1
warning:

  sm8350.dtsi:1554.4-1557.30: Warning (interrupt_map): /soc@0/pcie@1c00000:interrupt-map:
    Missing property '#address-cells' in node /soc@0/interrupt-controller@17a00000, using 0 as fallback

Value '0' is correct because:
1. GIC interrupt controller does not have children,
2. interrupt-map property (in PCI node) consists of five components and
   the fourth component "parent unit address", which size is defined by
   '#address-cells' of the node pointed to by the interrupt-parent
   component, is not used (=0).

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20250822-dts-interrupt-address-cells-v1-9-d54d44b74460@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-08-23 21:37:16 -05:00
Krzysztof Kozlowski
3e17f489e3 arm64: dts: qcom: sm8250: Add default GIC address cells
Add missing address-cells 0 to GIC interrupt node to silence W=1
warning:

  sm8250.dtsi:2166.4-2169.30: Warning (interrupt_map): /soc@0/pcie@1c00000:interrupt-map:
    Missing property '#address-cells' in node /soc@0/interrupt-controller@17a00000, using 0 as fallback

Value '0' is correct because:
1. GIC interrupt controller does not have children,
2. interrupt-map property (in PCI node) consists of five components and
   the fourth component "parent unit address", which size is defined by
   '#address-cells' of the node pointed to by the interrupt-parent
   component, is not used (=0).

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20250822-dts-interrupt-address-cells-v1-8-d54d44b74460@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-08-23 21:37:16 -05:00
Krzysztof Kozlowski
d0054c3e5b arm64: dts: qcom: sm8150: Add default GIC address cells
Add missing address-cells 0 to GIC interrupt node to silence W=1
warning:

  sm8150.dtsi:1869.4-1872.30: Warning (interrupt_map): /soc@0/pcie@1c00000:interrupt-map:
    Missing property '#address-cells' in node /soc@0/interrupt-controller@17a00000, using 0 as fallback

Value '0' is correct because:
1. GIC interrupt controller does not have children,
2. interrupt-map property (in PCI node) consists of five components and
   the fourth component "parent unit address", which size is defined by
   '#address-cells' of the node pointed to by the interrupt-parent
   component, is not used (=0).

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20250822-dts-interrupt-address-cells-v1-7-d54d44b74460@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-08-23 21:37:16 -05:00
Krzysztof Kozlowski
b8159aaf5e arm64: dts: qcom: sm6150: Add default GIC address cells
Add missing address-cells 0 to GIC interrupt node to silence W=1
warning:

  sm6150.dtsi:1122.4-1125.30: Warning (interrupt_map): /soc@0/pcie@1c08000:interrupt-map:
    Missing property '#address-cells' in node /soc@0/interrupt-controller@17a00000, using 0 as fallback

Value '0' is correct because:
1. GIC interrupt controller does not have children,
2. interrupt-map property (in PCI node) consists of five components and
   the fourth component "parent unit address", which size is defined by
   '#address-cells' of the node pointed to by the interrupt-parent
   component, is not used (=0).

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20250822-dts-interrupt-address-cells-v1-6-d54d44b74460@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-08-23 21:37:16 -05:00
Krzysztof Kozlowski
6cfdee6dca arm64: dts: qcom: sc8180x: Add default GIC address cells
Add missing address-cells 0 to GIC interrupt node to silence W=1
warning:

  sc8180x.dtsi:1743.4-1746.30: Warning (interrupt_map): /soc@0/pcie@1c00000:interrupt-map:
    Missing property '#address-cells' in node /soc@0/interrupt-controller@17a00000, using 0 as fallback

Value '0' is correct because:
1. GIC interrupt controller does not have children,
2. interrupt-map property (in PCI node) consists of five components and
   the fourth component "parent unit address", which size is defined by
   '#address-cells' of the node pointed to by the interrupt-parent
   component, is not used (=0).

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20250822-dts-interrupt-address-cells-v1-5-d54d44b74460@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-08-23 21:37:16 -05:00
Krzysztof Kozlowski
0325653b1a arm64: dts: qcom: qcs404: Add default GIC address cells
Add missing address-cells 0 to GIC interrupt node to silence W=1
warning:

  qcs404.dtsi:1496.4-1499.30: Warning (interrupt_map): /soc@0/pcie@10000000:interrupt-map:
    Missing property '#address-cells' in node /soc@0/interrupt-controller@b000000, using 0 as fallback

Value '0' is correct because:
1. GIC interrupt controller does not have children,
2. interrupt-map property (in PCI node) consists of five components and
   the fourth component "parent unit address", which size is defined by
   '#address-cells' of the node pointed to by the interrupt-parent
   component, is not used (=0).

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20250822-dts-interrupt-address-cells-v1-4-d54d44b74460@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-08-23 21:37:15 -05:00
Krzysztof Kozlowski
d434b7198a arm64: dts: qcom: msm8996: Add default GIC address cells
Add missing address-cells 0 to GIC interrupt node to silence W=1
warning:

  msm8996.dtsi:1931.5-1934.31: Warning (interrupt_map): /soc@0/bus@0/pcie@600000:interrupt-map:
    Missing property '#address-cells' in node /soc@0/interrupt-controller@9bc0000, using 0 as fallback

Value '0' is correct because:
1. GIC interrupt controller does not have children,
2. interrupt-map property (in PCI node) consists of five components and
   the fourth component "parent unit address", which size is defined by
   '#address-cells' of the node pointed to by the interrupt-parent
   component, is not used (=0).

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20250822-dts-interrupt-address-cells-v1-3-d54d44b74460@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-08-23 21:37:15 -05:00
Krzysztof Kozlowski
0eb7656667 arm64: dts: qcom: lemans: Add default GIC address cells
Add missing address-cells 0 to GIC interrupt node to silence W=1
warning:

  lemans.dtsi:7623.3-7626.29: Warning (interrupt_map): /pcie@1c00000:interrupt-map:
    Missing property '#address-cells' in node /soc@0/interrupt-controller@17a00000, using 0 as fallback

Value '0' is correct because:
1. GIC interrupt controller does not have children,
2. interrupt-map property (in PCI node) consists of five components and
   the fourth component "parent unit address", which size is defined by
   '#address-cells' of the node pointed to by the interrupt-parent
   component, is not used (=0).

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20250822-dts-interrupt-address-cells-v1-2-d54d44b74460@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-08-23 21:37:15 -05:00
Krzysztof Kozlowski
dc3f005e6b arm64: dts: qcom: ipq5424: Add default GIC address cells
Add missing address-cells 0 to GIC interrupt node to silence W=1
warning:

  ipq5424.dtsi:961.4-964.30: Warning (interrupt_map): /soc@0/pcie@50000000:interrupt-map:
    Missing property '#address-cells' in node /soc@0/interrupt-controller@f200000, using 0 as fallback

Value '0' is correct because:
1. GIC interrupt controller does not have children,
2. interrupt-map property (in PCI node) consists of five components and
   the fourth component "parent unit address", which size is defined by
   '#address-cells' of the node pointed to by the interrupt-parent
   component, is not used (=0).

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20250822-dts-interrupt-address-cells-v1-1-d54d44b74460@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-08-23 21:37:15 -05:00
Stephan Gerhold
6dcc44fc69 arm64: dts: qcom: x1e80100-qcp: Fix swapped USB MP repeaters
The &eusb3_repeater belongs to the first port of the USB MP controller and
the &eusb6_repeater belongs to the second. This is obvious if one looks at
e.g. the CRD or the Dell XPS where only the second port of the USB MP is
used: They only have the &eusb6_repeater and already specify it for the
&usb_mp_hsphy1.

Swap them to set the correct repeater for each of the USB ports.

Fixes: 9f53c36119 ("arm64: dts: qcom: x1e78100-qcp: Enable Type-A USB ports labeled 3 and 4/6")
Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org>
Link: https://lore.kernel.org/r/20250819-x1e80100-fix-usb-mp-repeaters-v1-4-0f8c186458d3@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-08-23 21:37:15 -05:00
Stephan Gerhold
d5d72e3267 arm64: dts: qcom: x1e80100-asus-vivobook-s15: Fix swapped USB MP repeaters
The &eusb3_repeater belongs to the first port of the USB MP controller and
the &eusb6_repeater belongs to the second. This is obvious if one looks at
e.g. the CRD or the Dell XPS where only the second port of the USB MP is
used: They only have the &eusb6_repeater and already specify it for the
&usb_mp_hsphy1.

Swap them to set the correct repeater for each of the USB ports.

Fixes: c0c46eea24 ("arm64: dts: qcom: x1e80100-vivobook-s15: Enable USB-A ports")
Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org>
Link: https://lore.kernel.org/r/20250819-x1e80100-fix-usb-mp-repeaters-v1-3-0f8c186458d3@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-08-23 21:37:15 -05:00
Stephan Gerhold
c3994b4951 arm64: dts: qcom: x1e78100-lenovo-thinkpad-t14s: Fix swapped USB MP repeaters
The &eusb3_repeater belongs to the first port of the USB MP controller and
the &eusb6_repeater belongs to the second. This is obvious if one looks at
e.g. the CRD or the Dell XPS where only the second port of the USB MP is
used: They only have the &eusb6_repeater and already specify it for the
&usb_mp_hsphy1.

Swap them to set the correct repeater for each of the USB ports.

Fixes: ffbf3a8be7 ("arm64: dts: qcom: x1e78100-t14s: Enable support for both Type-A USB ports")
Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org>
Link: https://lore.kernel.org/r/20250819-x1e80100-fix-usb-mp-repeaters-v1-2-0f8c186458d3@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-08-23 21:37:15 -05:00
Stephan Gerhold
59a4b94a8c arm64: dts: qcom: x1e001de-devkit: Fix swapped USB MP repeaters
The &eusb3_repeater belongs to the first port of the USB MP controller and
the &eusb6_repeater belongs to the second. This is obvious if one looks at
e.g. the CRD or the Dell XPS where only the second port of the USB MP is
used: They only have the &eusb6_repeater and already specify it for the
&usb_mp_hsphy1.

Swap them to set the correct repeater for each of the USB ports.

Fixes: d12fbd11c5 ("arm64: dts: qcom: x1e001de-devkit: Enable support for both Type-A USB ports")
Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org>
Link: https://lore.kernel.org/r/20250819-x1e80100-fix-usb-mp-repeaters-v1-1-0f8c186458d3@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-08-23 21:37:15 -05:00
Krzysztof Kozlowski
41b9f3dae1 arm64: dts: qcom: Minor whitespace cleanup
The DTS code coding style expects exactly one space around '='
character.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250819131717.86713-4-krzysztof.kozlowski@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-08-23 21:37:15 -05:00
Neil Armstrong
4f97774ac2 arm64: dts: qcom: sm8550: add PPI interrupt partitions for the ARM PMUs
The PMUs shares the same per-cpu (PPI) interrupt, so declare the proper
interrupt partition maps and use the 4th interrupt cell to pass the
partition phandle for each ARM PMU node.

Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20250820-topic-sm8550-upstream-pmu-ppi-4-cells-v1-2-a8915672e996@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-08-23 21:37:15 -05:00
Neil Armstrong
40db99f1b6 arm64: dts: qcom: sm8550: switch to interrupt-cells 4 to add PPI partitions
The ARM PMUs shares the same per-cpu (PPI) interrupt, so we need to switch
to interrupt-cells = <4> in the GIC node to allow adding an interrupt
partition map phandle as the 4th cell value for GIC_PPI interrupts.

Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20250820-topic-sm8550-upstream-pmu-ppi-4-cells-v1-1-a8915672e996@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-08-23 21:37:15 -05:00
Krzysztof Kozlowski
013632a410 arm64: dts: qcom: sm8750-mtp: Add speaker Soundwire port mapping
Add appropriate mappings of Soundwire ports of WSA883x speaker
to correctly map the Speaker ports to the WSA macro ports.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20250820141233.216713-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-08-23 21:37:15 -05:00
Stephan Gerhold
316294bb66 arm64: dts: qcom: sdm845: Fix slimbam num-channels/ees
Reading the hardware registers of the &slimbam on RB3 reveals that the BAM
supports only 23 pipes (channels) and supports 4 EEs instead of 2. This
hasn't caused problems so far since nothing is using the extra channels,
but attempting to use them would lead to crashes.

The bam_dma driver might warn in the future if the num-channels in the DT
are wrong, so correct the properties in the DT to avoid future regressions.

Cc: stable@vger.kernel.org
Fixes: 27ca1de07d ("arm64: dts: qcom: sdm845: add slimbus nodes")
Signed-off-by: Stephan Gerhold <stephan.gerhold@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250821-sdm845-slimbam-channels-v1-1-498f7d46b9ee@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-08-23 21:37:15 -05:00
Shashank Maurya
69f0611c89 arm64: dts: qcom: lemans-evk: Enable Display Port
Lemans EVK board has two mini-DP connectors, connected to EDP0
and EDP1 phys. Other EDP phys are available on expansion
connectors for the mezzanine boards.
Enable EDP0 and EDP1 along with their corresponding PHYs.

Signed-off-by: Shashank Maurya <quic_ssmaurya@quicinc.com>
Signed-off-by: Prahlad Valluru <venkata.valluru@oss.qualcomm.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250821-enable-iq9-dp-v3-1-8c3a719e3b9a@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-08-23 21:37:14 -05:00
Krzysztof Kozlowski
e2f4e0f141 ARM: dts: qcom: apq8064-mako: Minor whitespace cleanup
The DTS code coding style expects exactly one space around '=' or '{'
characters.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250819131717.86713-3-krzysztof.kozlowski@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-08-23 20:55:32 -05:00
Trevor Woerner
bcafdbaff2 ARM: defconfig: cleanup orphaned CONFIGs
Drop CONFIG_ARCH_MSM8X60 and CONFIG_ARCH_MSM8960 which were removed in
commit 99497df594 ("ARM: qcom: merge remaining subplatforms into sensible
Kconfig entry").

Drop CONFIG_ARCH_MSM8916 and CONFIG_ARCH_MSM8974 which were removed in
commit 85148df368 ("ARM: qcom: drop most of 32-bit ARCH_QCOM subtypes").

Signed-off-by: Trevor Woerner <twoerner@gmail.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250819231652.15938-1-twoerner@gmail.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-08-23 20:55:00 -05:00
Prasad Kumpatla
72e9f68bf1 soc: qcom: pd-mapper: Add SM8750 compatible
Add support for the Qualcomm SM8750 SoC to the protection
domain mapper. SM8750 shares the same protection domain
configuration as SM8550, so reuse the existing SM8550 domain data.

Signed-off-by: Prasad Kumpatla <quic_pkumpatl@quicinc.com>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250821160618.1037157-2-quic_pkumpatl@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-08-23 20:51:17 -05:00
Taniya Das
fecc6e0b02 arm64: dts: qcom: qcs615: Add CPU scaling clock node
Add cpufreq-hw node to support CPU frequency scaling.

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Signed-off-by: Taniya Das <taniya.das@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250814-qcs615-mm-cpu-dt-v6-v6-2-a06f69928ab5@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-08-23 20:48:33 -05:00
Taniya Das
f9c36698db arm64: dts: qcom: qcs615: Add clock nodes for multimedia clock
Add support for video, camera, display and gpu clock controller nodes
for QCS615 platform.

Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Taniya Das <taniya.das@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250814-qcs615-mm-cpu-dt-v6-v6-1-a06f69928ab5@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-08-23 20:48:33 -05:00
Dmitry Baryshkov
be541b8431 arm64: dts: qcom: sm6150: move standard clocks to SoC dtsi
Follow the example of all other platforms and reference standard clocks
(XO, sleep) from the SoC DT even if they are defined in the board DT
file.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250816-qcs615-move-clocks-v1-1-bc5665d6e1c3@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-08-23 20:48:33 -05:00
Dmitry Baryshkov
d7d28bcc20 arm64: dts: qcom: use DT label for DSI outputs
Instead of keeping a copy of the DT tree going down to the DSI output
endpoint use the label to reference it directly, making DTs less
error-prone.

Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250815-msm-dsi-outs-v2-1-3662704e833f@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-08-23 20:48:33 -05:00
Gabor Juhos
a300bbd90c arm64: dts: qcom: ipq9574-rdp433: remove unused 'sdc-default-state'
Since commit 8140d10568 ("arm64: dts: qcom: ipq9574: Remove eMMC node"),
the 'sdc-default-state' pinctrl state is not used so remove that.

Signed-off-by: Gabor Juhos <j4g8y7@gmail.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250701-rdp433-remove-sdc-state-v1-1-ca0f156a42d5@gmail.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-08-23 20:48:33 -05:00
Kamal Wadhwa
40f7b64fac arm64: dts: qcom: sm8550: Correct the min/max voltages for vreg_l6n_3p3
Voltage regulator 'vreg_l6n_3p3' max-microvolt prop is currently
configured at 3304000uV in different sm8550 board files. However this
is not a valid voltage value for 'pmic5_pldo502ln' type voltage
regulators.

Check below the max value(3200mV) in the regulator summary for min/max
used as 2800mV/3304mV in DT:-

logs:

[    0.294781] vreg_l6n_3p3: Setting 2800000-3304000uV

regulator summary:

regulator     use open bypass  opmode   voltage current  min     max
---------------------------------------------------------------------
..
vreg_l6n_3p3   0    0    0     normal   2800mV   0mA  2800mV  3200mV
..

Correct the min/max value to 3200000uV, as that is the closest valid
value to 3.3V and Hardware team has also confirmed that its good to
support the consumers(camera sensors) of this regulator.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Kamal Wadhwa <kamal.wadhwa@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250620-sm8550-correct-vreg_l6n_3p3-vol-v2-1-b397f3e91d7b@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-08-23 20:48:33 -05:00
Casey Connolly
cb2347ed82 arm64: dts: qcom: sdm845-oneplus-*: set constant-charge-current-max-microamp
Set the maximum constant charge current to use for this battery. While
the battery is likely comfortably capable of 4A or so, OnePlus didn't
include a secondary charger IC for parallel charging (instead they have
their proprietary Dash Charging). It's possible that this value could be
safely increased after some testing (and when we have support for
modelling the charger as a cooling device properly), but for now this
value is acceptable.

This is references from qcom,usb-icl-ua property in the downstream
vendor devicetree.

Signed-off-by: Casey Connolly <casey.connolly@linaro.org>
Link: https://lore.kernel.org/r/20250619-smb2-smb5-support-v1-2-ac5dec51b6e1@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-08-23 20:48:33 -05:00
Gabor Juhos
c6fa3429cf arm64: dts: qcom: ipq9574: use 'pcie' as node name for 'pcie0'
The PCI controller at address 28000000 supports PCIe only, so use 'pcie'
as node name for that. This ensures that all PCIe controller instance
nodes are using the same name.

Signed-off-by: Gabor Juhos <j4g8y7@gmail.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250618-ipq9574-pcie0-name-v1-1-f0a8016ea504@gmail.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-08-23 20:48:33 -05:00
Pengyu Luo
013d01811a arm64: dts: qcom: sc8280xp: Enable GPI DMA
Enable GPI DMA for sc8280xp based devices.

Signed-off-by: Pengyu Luo <mitltlatltl@gmail.com>
Link: https://lore.kernel.org/r/20250612075724.707457-4-mitltlatltl@gmail.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-08-23 20:48:32 -05:00
Pengyu Luo
71b12166a2 arm64: dts: qcom: sc8280xp: Describe GPI DMA controller nodes
SPI on SC8280XP requires DMA (GSI) mode to function properly. Without
it, SPI controllers fall back to FIFO mode, which causes:

[    0.901296] geni_spi 898000.spi: error -ENODEV: Failed to get tx DMA ch
[    0.901305] geni_spi 898000.spi: FIFO mode disabled, but couldn't get DMA, fall back to FIFO mode
...
[   45.605974] goodix-spi-hid spi0.0: SPI transfer timed out
[   45.605988] geni_spi 898000.spi: Can't set CS when prev xfer running
[   46.621555] spi_master spi0: failed to transfer one message from queue
[   46.621568] spi_master spi0: noqueue transfer failed
[   46.621577] goodix-spi-hid spi0.0: spi transfer error: -110
[   46.621585] goodix-spi-hid spi0.0: probe with driver goodix-spi-hid failed with error -110

Therefore, describe GPI DMA controller nodes for qup{0,1,2}, and
describe DMA channels for SPI and I2C, UART is excluded for now, as
it does not yet support this mode.

Note that, since there is no public schematic, this is derived from
Windows drivers. The drivers do not expose any DMA channel mask
information, so all available channels are enabled.

Signed-off-by: Pengyu Luo <mitltlatltl@gmail.com>
Link: https://lore.kernel.org/r/20250612075724.707457-3-mitltlatltl@gmail.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-08-23 20:48:32 -05:00
Aleksandrs Vinarskis
b9a185198f arm64: dts: qcom: x1e80100-pmics: Disable pm8010 by default
pm8010 is a camera specific PMIC, and may not be present on some
devices. These may instead use a dedicated vreg for this purpose (Dell
XPS 9345, Dell Inspiron..) or use USB webcam instead of a MIPI one
alltogether (Lenovo Thinbook 16, Lenovo Yoga..).

Disable pm8010 by default, let platforms that actually have one onboard
enable it instead.

Cc: stable@vger.kernel.org
Fixes: 2559e61e7e ("arm64: dts: qcom: x1e80100-pmics: Add the missing PMICs")
Reviewed-by: Bryan O'Donoghue <bryan.odonoghue@linaro.org>
Reviewed-by: Johan Hovold <johan+linaro@kernel.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Aleksandrs Vinarskis <alex.vinarskis@gmail.com>
Link: https://lore.kernel.org/r/20250701183625.1968246-2-alex.vinarskis@gmail.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-08-23 20:48:32 -05:00
Dmitry Baryshkov
340e57306a arm64: dts: qcom: sc8180x: modernize MDSS device definition
Follow the lead of other platforms and update DT description of the MDSS
device:

- Use generic node names (dislpay-subsystem, display-controller, phy)
  instead of the platform-specific ones (mdss, mdp, dsi-phy)
- Add platform-specific compatible string to DSI controllers.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250704-mdss-schema-v1-4-e978e4e73e14@oss.qualcomm.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-08-23 20:48:32 -05:00
Raymond Hackley
e0d48bea31 ARM: dts: qcom: msm8226-samsung-ms013g: Add touch keys
Touch keys feature on Galaxy Grand 2 is provided by Zinitix touchscreen.
Add property linux,keycodes to enable touch keys.

Signed-off-by: Raymond Hackley <raymondhackley@protonmail.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250708122118.157791-1-raymondhackley@protonmail.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-08-23 20:48:19 -05:00
Nickolay Goppen
d9f1c08cf2 clk: qcom: gcc-sdm660: Add missing LPASS/CDSP vote clocks
For the proper functioning of SMMUs related to the audio/compute DSPs,
it makes sense that the clocks and power domains they rely on for
communication should be online.

Add the vote clocks & GDSCs that, when enabled, ensure all such
requirements are met, through various internal mechanisms.

Co-developed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Nickolay Goppen <setotau@yandex.ru>
Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20250815-gcc-sdm660-vote-clocks-and-gdscs-v1-2-c5a8af040093@yandex.ru
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-08-23 20:40:31 -05:00
Bjorn Andersson
9a834bfe4b Merge branch '20250815-gcc-sdm660-vote-clocks-and-gdscs-v1-1-c5a8af040093@yandex.ru' into clk-for-6.18
Merge the addition of a few missing clock defines for the SDM660 global
clock controller, in order to allow them to be used in the DeviceTree
branch as well.
2025-08-23 20:39:28 -05:00
Nickolay Goppen
ab6d91d141 dt-bindings: clock: gcc-sdm660: Add LPASS/CDSP vote clocks/GDSCs
Add defines for the missing clocks, which are required to power up the
related remote processors.

Co-developed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>
Signed-off-by: Nickolay Goppen <setotau@yandex.ru>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250815-gcc-sdm660-vote-clocks-and-gdscs-v1-1-c5a8af040093@yandex.ru
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2025-08-23 20:39:21 -05:00