switch early init to init_early and introduce soc map_io
with this Patch we will not do any more early device setup during the map io
tks to Russell to point the new call back
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
Acked-by: Russell King <rmk+kernel@arm.linux.org.uk>
Acked-by: Andrew Victor <linux@maxim.org.za>
specify the port num via platform_data this will allow to match the clock
with the plaform_dev staticaly
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Alan Cox <alan@linux.intel.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
Cc: Hans-Christian Egtvedt <hans-christian.egtvedt@atmel.com>
Cc: Greg Kroah-Hartman <gregkh@suse.de>
and update it with ubi, sound, nfs support etc...
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Cc: Nicolas Ferre <nicolas.ferre@atmel.com>
no board configure it as 'n' and it's an issue to merge all defconfigs
in one
On AT91SAM926x boards both types of NAND flash can be present
(8 and 16 bit data bus width).
so will pass it via system_rev
Signed-off-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Patrice Vilchez <patrice.vilchez@atmel.com>
Reorder mm_context_t to remove alignment padding on 64 bit
builds shrinking its size from 64 to 56 bytes.
This allows mm_struct to shrink from 840 to 832 bytes, so using
one fewer cache lines, and getting more objects per slab when
using slub.
slabinfo mm_struct reports
before :-
Sizes (bytes) Slabs
-----------------------------------
Object : 840 Total : 7
SlabObj: 896 Full : 1
SlabSiz: 16384 Partial: 4
Loss : 56 CpuSlab: 2
Align : 64 Objects: 18
after :-
Sizes (bytes) Slabs
----------------------------------
Object : 832 Total : 7
SlabObj: 832 Full : 1
SlabSiz: 16384 Partial: 4
Loss : 0 CpuSlab: 2
Align : 64 Objects: 19
Signed-off-by: Richard Kennedy <richard@rsk.demon.co.uk>
Cc: wilsons@start.ca
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Cc: Andrew Morton <akpm@linux-foundation.org>
Cc: Pekka Enberg <penberg@kernel.org>
Link: http://lkml.kernel.org/r/1306244999.1999.5.camel@castor.rsk
Signed-off-by: Ingo Molnar <mingo@elte.hu>
The Blackfin percpu input sections are outdated, so rather than update
them, drop them completely and use the new common define.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Now that the Blackfin machine drivers have been updated to the
multicomponent support, update the resources to match. The pin
settings are now a board issue and removed from the driver.
Signed-off-by: Scott Jiang <scott.jiang@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Anomaly 05000480 on BF537 rev 0.0, 0.1, 0.2:
Multiple Simultaneous Urgent DMA Requests May Cause DMA System Instability
Suggested Workaround:
Program the DMA Traffic Control Period to a non-zero value. This forces
the DMA block to group accesses together rather than allow arbitration for
each piece of data placed on the internal DMA bus.
Signed-off-by: Steven Miao <realmz6@gmail.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Since the bfin_write() func needs proper type information in order to
expand into the right bfin_writeX() variant, preserve the addr's type
when setting up the local __addr. Otherwise the helpers will detect
the variant based upon sizeof(void) which is almost never right.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
old cpu_xxx() APIs is planned to removed later. then, converted.
Signed-off-by: KOSAKI Motohiro <kosaki.motohiro@jp.fujitsu.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Every callter (except kthread_bind) should use proper
set_cpus_allowed_ptr() APIs.
Signed-off-by: KOSAKI Motohiro <kosaki.motohiro@jp.fujitsu.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
We plan to remove cpu_possible_map and cpu_present_map later and we
have proper init_cpu_possible() and init_cpu_present() APIs.
Therefore this patch rewrites platform_init_cpus and platform_prepare_cpus
by their APIs.
Signed-off-by: KOSAKI Motohiro <kosaki.motohiro@jp.fujitsu.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Both the BF548-EZKIT and the BF561-EZKIT use top boot flashes, so now
that Das U-Boot uses the last small sector for its environment, update
their nor layout in the kernel accordingly.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
SGI UV's uv_tlb.c driver has become rather hard to read, with overly large
functions, non-standard coding style and (way) too long variable, constant
and function names and non-obvious code flow sequences.
This patch improves the readability and maintainability of the driver
significantly, by doing the following strict code cleanups with no side
effects:
- Split long functions into shorter logical functions.
- Shortened some variable and structure member names.
- Added special functions for reads and writes of MMR regs with
very long names.
- Added the 'tunables' table to shortened tunables_write().
- Added the 'stat_description' table to shorten uv_ptc_proc_write().
- Pass fewer 'stat' arguments where it can be derived from the 'bcp'
argument.
- Function definitions consistent on one line, and inline in few (short) cases.
- Moved some small structures and an atomic inline function to the header file.
- Moved some local variables to the blocks where they are used.
- Updated the copyright date.
- Shortened uv_write_global_mmr64() etc. using some aliasing; no
line breaks. Renamed many uv_.. functions that are not exported.
- Aligned structure fields.
[ note that not all structures are aligned the same way though; I'd like
to keep the extensive commenting in some of them. ]
- Shortened some long structure names.
- Standard pass/fail exit from init_per_cpu()
- Vertical alignment for mass initializations.
- More separation between blocks of code.
Tested on a 16-processor Altix UV.
Signed-off-by: Cliff Wickman <cpw@sgi.com>
Cc: penberg@kernel.org
Link: http://lkml.kernel.org/r/E1QOw12-0004MN-Lp@eag09.americas.sgi.com
Signed-off-by: Ingo Molnar <mingo@elte.hu>
This patch adds support for a new version of the SGI UV hub
chip. The hub chip is the node controller that connects multiple
blades into a larger coherent SSI.
For the most part, UV2 is compatible with UV1. The majority of
the changes are in the addresses of MMRs and in a few cases, the
contents of MMRs. These changes are the result in changes in the
system topology such as node configuration, processor types,
maximum nodes, physical address sizes, etc.
Signed-off-by: Jack Steiner <steiner@sgi.com>
Link: http://lkml.kernel.org/r/20110511175028.GA18006@sgi.com
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Turns out the documentation is wrong and doing "RAISE 1" does not result
in a software reset, only a core reset. So when the on-chip rom has a
functioning reset helper, use it.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
These boards don't have AD1980 modules, and that device is deprecated,
so don't bother building it up by default anymore.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Since the value of these MMRs aren't changing, store the value in a local
variable and work off of that. This avoids multiple MMR reads which are
implicitly forced by the volatile markings.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The BF537 SIC combines the gpio port H mask A interrupts with the
emac rx interrupt, so we need to demux this in software.
It also combines the gpio port H mask B and the emac tx interrupts,
and the watchdog and port F mask B interrupts, but since we don't
support mask B yet, just add the defines for now.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The search logic in the gpio demux walks all possible gpio blocks starting
at the specified pin. The trouble on bf537 parts when we demux the port
F and port G mask A interrupts is that we also demux port H mask A ints.
Most of the time this isn't an issue as people don't usually use port H,
but might as well avoid it when possible.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
This functionality was merged into the common bfin_pm_standby_ctrl func
some time ago, so punt these now unused funcs and data, and localize the
wake funcs that aren't needed externally anymore.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The SIC interrupt line muxing that the bf537 does is specific to this
CPU (thankfully), so rip it out of the common code and move it to a
bf537-specific file. This tidies up the common code significantly.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
These are only used in a few internal Blackfin places, so move the irq
prototypes out of the global header and into the internal irq one. No
functional changes other than shuffling locales.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Prefer MMR named checks over part-specific lists, condense duplicated
code across different #ifdef branches, simplify CONFIG_PM ifdefs, and
drop unused kgdb header.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Make sure we mark cache flushing as unsafe to kgdb in SMP mode so that
kgdb doesn't flush things incorrectly on us.
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
After some cache setup reordering changesets, the blackfin_cpudata init
was left behind. While cpu0's data was correct, cpu1's data was not.
Not that big of a deal as these are only used in the cpuinfo output, but
should still be fixed. So move the setup of these fields to the common
cache setup function to avoid this happening again in the future.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The smp flush lines are too long and have too many newlines, so scale
them back to match the other lines.
The %p modifier shows "(null)" for 0, so use %08x instead.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Build the sound pieces that the board actually has into the kernel, and
punt older devices that we discourage.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
These files had a lot of whitespace damage, mostly due to copying and
pasting original files that had damage.
The BF561 header also had a lot of unused CONFIG_DEF_xxx defines, so
punt them all.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Start a new common IRQ header and move all of the CEC pieces there. This
lets the individual part headers worry just about its SIC defines.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Seems the ipipe code just copied & pasted the existing irq lookup logic,
so pull the logic out of do_irq() and into a local helper, and convert
the two users over to that.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
The local ivg structs need not be exported, so mark them as static.
Further, the "num_spurious" variable is only incremented and never
actually read anywhere, so punt it.
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
Since the on-chip L1 regions are not cacheable, there is no point in
trying to flush/invalidate them. Plus, older Blackfin parts like to
trigger an exception (like BF533-0.3).
Signed-off-by: Sonic Zhang <sonic.zhang@analog.com>
Signed-off-by: Mike Frysinger <vapier@gentoo.org>
renesas_usbhs driver can use external interrupt mode
(which come from USB-PHY) or autonomy mode (it use own interrupt)
for detecting connection/disconnection when Function.
And it will be power OFF while it has been disconnecting
if external interrupt mode is selected.
mackerel board has 2 USB ports.
But we can not use external interrupt mode
on CN22 USB0 port which is only for USB Function.
IRQ7-PORT40 is already used by Touchscreen,
and USB-PHY needs IRQ7-PORT167.
It is impossible to use IRQ7 demux on mackerel.
We can use external interrupt mode USB-Function on "USB1".
USB1 can become Host by r8a66597, and become Function by renesas_usbhs.
But don't select both drivers in same time.
These 2 drivers are not supporting IRQ SHARD.
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
renesas_usbhs is remake version of r8a66597
Signed-off-by: Kuninori Morimoto <kuninori.morimoto.gx@renesas.com>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
This makes it possible to leave DMA slave IDs in the platform data
at default 0 value without hitting DMA channel allocation error paths.
Signed-off-by: Guennadi Liakhovetski <g.liakhovetski@gmx.de>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
Based on the patch by Takanari Hayama <taki@igel.co.jp>
Add the necessary platform data to add MERAM functionality to LCDC
Includes platform data for both the AP4EVB and mackerel
Signed-off-by: Damian Hobson-Garcia <dhobsong@igel.co.jp>
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
