The timer and rtc-timer clocks aren't gated by default, so there is no reason
to crash the system if the dummy enable call failed.
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
This patch adds the initial device tree for tegra30
Signed-off-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Acked-by: Stephen Warren <swarren@nvidia.com>
Acked-by: Colin Cross <ccross@android.com>
Signed-off-by: Olof Johansson <olof@lixom.net>
Use snd_soc_register_card() instead of creating a "soc-audio" platform device.
Signed-off-by: Axel Lin <axel.lin@gmail.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Use snd_soc_register_card() instead of creating a "soc-audio" platform device.
Signed-off-by: Axel Lin <axel.lin@gmail.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Use snd_soc_register_card() instead of creating a "soc-audio" platform device.
Signed-off-by: Axel Lin <axel.lin@gmail.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Use snd_soc_register_card() instead of creating a "soc-audio" platform device.
Signed-off-by: Axel Lin <axel.lin@gmail.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Use snd_soc_register_card() instead of creating a "soc-audio" platform device.
Signed-off-by: Axel Lin <axel.lin@gmail.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
All McBSP instances on OMAP4 has 128 word long FIFO
Signed-off-by: Peter Ujfalusi <peter.ujfalusi@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Signed-off-by: Mark Brown <broonie@opensource.wolfsonmicro.com>
Local timer clock is sourced from the CPU clock and hence changes
along with CPU clock. These per CPU local timers are used as
clock-events, so they need to be reconfigured on CPU frequency
change as part of CPUfreq governor.
Newly introduced clockevents_reconfigure() needs to know the
twd clock-rate. Provide a clock-node to make clk_get_rate() work
for TWD.
Signed-off-by: Santosh Shilimkar <santosh.shilimkar@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@ti.com>
[paul@pwsan.com: renamed clock node to 'mpu_periphclk' to indicate that this
is the Cortex-A9 MPCore subsystem clock PERIPHCLK (DDI 0407G); moved
clock and clkdev entries to match the autogenerated script output]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
If the module does not have any modulemode, the _disable_module function
will do nothing. There is then no point waiting for a idle status change.
It will remove the following warnings.
[ 0.331848] omap_hwmod: dmm: _wait_target_disable failed
[ 0.339935] omap_hwmod: emif_fw: _wait_target_disable failed
[ 0.348358] omap_hwmod: l3_main_1: _wait_target_disable failed
[ 0.356964] omap_hwmod: l3_main_2: _wait_target_disable failed
[ 0.365600] omap_hwmod: l4_abe: _wait_target_disable failed
[ 0.373931] omap_hwmod: l4_cfg: _wait_target_disable failed
[ 0.382263] omap_hwmod: l4_per: _wait_target_disable failed
[ 0.391113] omap_hwmod: l4_wkup: _wait_target_disable failed
[ 0.399536] omap_hwmod: dma_system: _wait_target_disable failed
[ 0.408325] omap_hwmod: dss_core: _wait_target_disable failed
[ 0.416839] omap_hwmod: dss_dispc: _wait_target_disable failed
[ 0.425445] omap_hwmod: dss_dsi1: _wait_target_disable failed
[ 0.433990] omap_hwmod: dss_dsi2: _wait_target_disable failed
[ 0.442504] omap_hwmod: dss_hdmi: _wait_target_disable failed
[ 0.451019] omap_hwmod: dss_rfbi: _wait_target_disable failed
[ 0.459564] omap_hwmod: dss_venc: _wait_target_disable failed
[ 0.489471] omap_hwmod: mailbox: _wait_target_disable failed
[ 0.505920] omap_hwmod: spinlock: _wait_target_disable failed
Note: For such module, the state is managed automatically by HW according
to clock domain transition. It is then not possible to wait for idle even
later in the _idle function since the status will change at clock domain
boundary.
Signed-off-by: Benoit Cousson <b-cousson@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Rajendra Nayak <rnayak@ti.com>
[paul@pwsan.com: renamed fns to indicate that they are OMAP4-only; moved
_wait_target_disable() into _disable_module(), removing duplicate code]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
AM3517/3505 chips don't have voltage controller and voltage processor
IP blocks. Trying to use OMAP34xx/36xx voltage domain data on these
chips causes a crash during boot:
omap_vc_init_channel: PMIC info requried to configure vc forvdd_core not populated.Hence cannot initialize vc
Unable to handle kernel NULL pointer dereference at virtual address 00000025
pgd = c0004000
[00000025] *pgd=00000000
Internal error: Oops: 5 [#1] SMP
Modules linked in:
CPU: 0 Tainted: G W (3.2.0-rc5-00006-g402ecf4 #304)
PC is at omap_vp_init+0x5c/0x14c
LR is at omap_vp_init+0x54/0x14c
Fix this by using very minimal voltage domain definitions for AM3517/3505.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Igor Grinberg <grinberg@compulab.co.il>
Cc: Kevin Hilman <khilman@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
* samsung/board:
ARM: S3C64XX: Hook up VDDINT on Cragganmore
ARM: S3C2440: Add new LCD (W35i) support for Mini2440 board
ARM: S3C64XX: Power gate unused domains
ARM: S3C64XX: Hook up Littlemill audio card on Cragganmore
ARM: S3C64XX: Hook up platform data for Kilchomin module on Cragganmore
ARM: S3C64XX: Run Tobermory interrupts in the default mode
ARM: S3C64XX: Improve logging of unknown Cragganmore module types
ARM: S3C64XX: Configure WM1250 EV1 GPIOs on Cragganmore
ARM: S3C64XX: Use software initiated powerdown for Cragganmore
ARM: S3C64XX: Raise the frequency of the second I2C bus on Cragganmore
ARM: S3C64XX: Correct reservation of GPIOs for CPU module on Cragganmore
ARM: SAMSUNG: Fix GPIO space reservation for S3C64xx platforms
ARM: S3C64XX: Update for conversion to SAMSUNG_GPIO_EXTRA
Conflicts:
arch/arm/mach-s3c64xx/mach-crag6410.c
Pass minimal data needed for console boot, from dt, for
OMAP4 panda/sdp and OMAP3 beagle boards, and get rid of the
static initialization from generic board file.
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
Reviewed-by: Rob Herring <rob.herring@calxeda.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Add minimal device tree support for omap2420 and omap2430.
This is needed to keep the uart functional on omap2 after
omap_serial_init is removed from board-generic.c.
Reviewed-by: Rob Herring <rob.herring@calxeda.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
An hwmod with a 'HWMOD_INIT_NO_IDLE' flag set, is left in
enabled state by the hwmod framework post the initial setup.
Once a real user of the device (a driver) tries to enable it
at a later point, the hwmod framework throws a WARN() about
the device being already in enabled state.
Fix this by introducing a new internal flag '_HWMOD_SKIP_ENABLE' to
identify such devices/hwmods. When the device/hwmod is requested to be
enabled (the first time) by its driver/user, nothing except the
mux-enable is needed. The mux data is board specific and is
unavailable during initial enable() of the device, done by the
framework as part of setup().
A good example of a such a device is an UART used as debug console.
The UART module needs to be kept enabled through the boot, until the
UART driver takes control of it, for debug prints to appear on
the console.
Acked-by: Kevin Hilman <khilman@ti.com>
Acked-by: Benoit Cousson <b-cousson@ti.com>
Signed-off-by: Rajendra Nayak <rnayak@ti.com>
[paul@pwsan.com: use a flag rather than a state; updated commit message;
edited some documentation]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Use the new PRCM interrupt handler code on OMAP4 systems.
The OMAP code will need to be converted to use sparse IRQs for this
to work. Until that time, the following message will appear on boot:
PRCM: failed to allocate irq descs: -12
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Tested-by: Kevin Hilman <khilman@ti.com>
Reviewed-by: Kevin Hilman <khilman@ti.com>
[paul@pwsan.com: split this from a previous patch to this patch; call
omap4xxx_prcm_init() during init; write trivial commit log]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
PM interrupt handling is now done through the PRCM chain handler. The
interrupt handling logic is also split in two parts, to serve IO and
WKUP events separately. This allows us to handle IO chain events in a
clean way.
Core event code is also changed in accordance to this, as PRCM
interrupt handling is done by independent handlers, and the core
handler should not clear the IO events anymore.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Tested-by: Kevin Hilman <khilman@ti.com>
Reviewed-by: Kevin Hilman <khilman@ti.com>
[paul@pwsan.com: use pr_err(); combined with portions of earlier patches and
the "do not enable PRCM MPU interrupts manually" patch]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
By default all registered pads will trigger mpu_irqs[0]. Now there is
an API for selecting used mpu_irq on pad basis, which can be used to
trigger different irq handlers for different pads in the same hwmod.
Each pad that requires its interrupt to be re-routed this way must
have a separate call to omap_hwmod_pad_route_irq(hwmod, pad, irq).
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
Tested-by: Kevin Hilman <khilman@ti.com>
Reviewed-by: Kevin Hilman <khilman@ti.com>
[paul@pwsan.com: moved fn to omap_hwmod.c; separated fn from mux scan_wakeups
changes; added kerneldoc]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
OMAP mux now parses active wakeup events from pad registers and calls
corresponding hwmod ISRs once a wakeup is detected. This is
accomplished by registering an interrupt handler for PRCM IO event,
which is raised every time the HW detects wakeups.
[paul@pwsan.com: This patch is a merge of Govindraj R's "ARM: OMAP2+:
hwmod: Add API to check IO PAD wakeup status" patch, Tero Kristo's
"ARM: OMAP2+: mux: add support for PAD wakeup interrupts" patch, and
part of Tero's "ARM: OMAP: mux: add support for selecting mpu_irq for
each wakeup pad" patch.]
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Cc: Govindraj.R <govindraj.raja@ti.com>
Tested-by: Kevin Hilman <khilman@ti.com>
Reviewed-by: Kevin Hilman <khilman@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
[paul@pwsan.com: reduced indentation level; renamed omap_hwmod function;
improved function documentation; modified to iterate only through dynamic
pads; modified to skip pads where idle mode doesn't enable wakeups; split
patches]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
PRCM chain handler needs to disable forwarding of interrupts during
suspend, because runtime PM is disabled and most of the drivers
are potentially not able to handle interrupts coming at this time.
This patch masks all the PRCM interrupt events if a PRCM interrupt
occurs during suspend, but does not ack them. Once suspend finish
is called, all the masked events will be re-enabled, which causes
immediate PRCM interrupt and handles the postponed event.
The suspend prepare and complete callbacks will be called from
pm34xx.c / pm44xx.c files in the following patches.
The functions defined in this patch should eventually be moved to
suspend->prepare and suspend->finish driver hooks, once the PRCM
chain handler will be made as its own driver.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Cc: Kevin Hilman <khilman@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Tested-by: Kevin Hilman <khilman@ti.com>
Reviewed-by: Kevin Hilman <khilman@ti.com>
[paul@pwsan.com: add kerneldoc, add omap_prcm_irq_setup.saved_mask, add fn
ptrs for save_and_clear_irqen() and restore_irqen()]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Introduce a chained interrupt handler mechanism for the PRCM
interrupt, so that individual PRCM event can cleanly be handled by
handlers in separate drivers. We do this by introducing PRCM event
names, which are then matched to the particular PRCM interrupt bit
depending on the specific OMAP SoC being used.
PRCM interrupts have two priority levels, high or normal. High priority
is needed for IO event handling, so that we can be sure that IO events
are processed before other events. This reduces latency for IO event
customers and also prevents incorrect ack sequence on OMAP3.
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Cc: Paul Walmsley <paul@pwsan.com>
Cc: Kevin Hilman <khilman@ti.com>
Cc: Avinash.H.M <avinashhm@ti.com>
Cc: Benoit Cousson <b-cousson@ti.com>
Cc: Tony Lindgren <tony@atomide.com>
Cc: Govindraj.R <govindraj.raja@ti.com>
Tested-by: Kevin Hilman <khilman@ti.com>
Reviewed-by: Kevin Hilman <khilman@ti.com>
[paul@pwsan.com: drop some dead code; use SoC-specific pending IRQ
detection; move code to prm_common.c; add lots of documentation;
remove saved_mask; add OCP barrier on ISR exit; improved error
handling; split out per-SoC initialization to a separate patch]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Add PRM functions to test for pending PRM IRQs. This will be used in
a subsequent patch to implement the PRM interrupt handler on the MPU.
Add PRM functions to ensure that all outstanding writes from the MPU
to the PRM IP block have completed before continuing execution. This
will be used in a subsequent patch to ensure that all PRM interrupt
status bits are cleared in the hardware before exiting the ISR.
Normally we would not expose such a low-level function to other code.
But the current implementation of the PRM interrupt code, which uses
the generic IRQ chip code, doesn't give us a choice.
The pending PRM IRQ functions are based on code originally written by
Tero Kristo <t-kristo@ti.com>.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Tero Kristo <t-kristo@ti.com>
Add API to enable IO pad wakeup capability based on mux pad and
wake_up enable flag available from hwmod_mux initialization.
Use the wakeup_enable flag and enable wakeup capability for the given
pads. Wakeup capability will be enabled/disabled during hwmod idle
transition based on whether wakeup_flag is set or cleared. If the
hwmod is currently idled, and any mux values were changed by
_set_idle_ioring_wakeup(), the SCM PADCTRL registers will be updated.
Signed-off-by: Govindraj.R <govindraj.raja@ti.com>
Signed-off-by: Tero Kristo <t-kristo@ti.com>
Tested-by: Kevin Hilman <khilman@ti.com>
Reviewed-by: Kevin Hilman <khilman@ti.com>
[paul@pwsan.com: rearranged code to limit indentation; cleaned up
function documentation; removed unused non-static functions; modified
to search all hwmod pads, not just dynamic remuxing ones; modified to
update SCM regs if hwmod is currently idle and any pads have changed]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
omap_hwmod_mux() currently only iterates through the dynamic pad list.
This list currently only consists of pads with the
OMAP_DEVICE_MUX_REMUX flag set.
Subsequent patches in this series will cause hwmod mux entries with
the OMAP_DEVICE_MUX_WAKEUP flag set to be changed dynamically, to
control hwmod I/O ring wakeup. For this to work correctly, hwmod mux
entries with the OMAP_DEVICE_MUX_WAKEUP flag set must also be added to
the dynamic pad list. So this patch modifies omap_hwmod_mux_init() to
do so.
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Tony Lindgren <tony@atomide.com>
Cc: Tero Kristo <t-kristo@ti.com>
Cc: Govindraj R <govindraj.raja@ti.com>
Acked-by: Tony Lindgren <tony@atomide.com>
* git://git.kernel.org/pub/scm/linux/kernel/git/davem/sparc:
sparc32: Be less strict in matching %lo part of relocation.
sbus: convert drivers/sbus/char/* to use module_platform_driver()
bbc_i2c: Remove unneeded err variable
sparc: Use kmemdup rather than duplicating its implementation
mce-inject provides a mechanism to simulate errors so that test
scripts can check for correct operation of the kernel without
requiring any specialized hardware to create rare events.
The existing code can simulate events in normal process context
and also in NMI context - but not in IRQ context. This patch
fills that gap.
Link: https://lkml.org/lkml/2011/12/7/537
Signed-off-by: Chen Gong <gong.chen@linux.intel.com>
Signed-off-by: Tony Luck <tony.luck@intel.com>
* 'fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc:
ARM: OMAP: rx51: fix USB
ARM: OMAP: mcbsp: Fix possible memory corruption
arm/imx: fix power button on imx51 babbage board
ARM: imx: fix cpufreq build errors
ARM: mx5: add __initconst for fec pdata
MXC PWM: should active during DOZE/WAIT/DBG mode
ARM: EXYNOS: Fix build error without CONFIG_LOCAL_TIMERS
ARM: EXYNOS: Fix for stall in case of cpu hotplug or sleep
ARM: S5PV210: Set 1000ns as PWM backlight period on SMDKV210
ARM: SAMSUNG: remove duplicated header include
The efi boot stub tries to read the entire initrd in 1 go, however
some efi implementations hang if too much if asked to read too much
data at the same time. After some experimentation I found out that my
asrock p67 board will hang if asked to read chunks of 4MiB, so use a
safe value.
elilo reads in chunks of 16KiB, but since that requires many read
calls I use a value of 1 MiB. hpa suggested adding individual
blacklists for when systems are found where this value causes a crash.
Signed-off-by: Maarten Lankhorst <m.b.lankhorst@gmail.com>
Link: http://lkml.kernel.org/r/4EEB3A02.3090201@gmail.com
Signed-off-by: H. Peter Anvin <hpa@linux.intel.com>
Add the Cadence macb ethernet controller in at91sam9g45 and at91sam9g20
.dtsi and enable it in at91sam9m10g45ek and usb_a9g20 board device tree file.
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Acked-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
The ehci and ohci drivers does not use the APIs of the usbhs
core driver; the runtime pm APIs are used for clock
enable/disable. Since usbhs is parent platform device of the
ehci and ohci devices, the runtime apis indirectly uses the
usb hs core device as input parameter to for clock functions.
Signed-off-by: Keshava Munegowda <keshava_mgowda@ti.com>
Reviewed-by: Kevin Hilman <khilman@ti.com>
Reviewed-by: Partha Basak <parthab@india.ti.com>
Acked-by: Felipe Balbi <balbi@ti.com>
Acked-by: Alan Stern <stern@rowland.harvard.edu>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
device name usbhs clocks are changed from
usbhs-omap.0 to usbhs_omap; this is because
in the hwmod registration the device name is set
as usbhs_omap; The redudant clock nodes are removed.
Signed-off-by: Keshava Munegowda <keshava_mgowda@ti.com>
Reviewed-by: Partha Basak <parthab@india.ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
The hwmod structure of usb_host_hs and usb_tll are
retrieved and registered with omap device
Signed-off-by: Keshava Munegowda <keshava_mgowda@ti.com>
Reviewed-by: Partha Basak <parthab@india.ti.com>
[paul@pwsan.com: this patch is merged with the understanding that the
authors will send patches for the next merge window to remove the
multiple hwmods-per-omap_device]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
For I2C clockactivity field is added for OMAP3 and OMAP4 that defines how the
interface (OCP) and functional (system) clocks behave when the I2C module is
idle.
The configuration of the clock activity bit field (per TRM) is as follows:
0x0: Both clocks can be cut off
0x1: Only OCP clock must be kept active; system clock
can be cut off
0x3: Both clocks must be kept active
0x2: Only system clock must be kept active; OCP clock
can be cut off
The patch makes 0x2(CLOCKACT_TEST_ICLK) the default for OMAP3 and OMAP4.
Signed-off-by: Shubhrajyoti D <shubhrajyoti@ti.com>
Signed-off-by: Jon Hunter <jon-hunter@ti.com>
Signed-off-by: Paul Walmsley <paul@pwsan.com>
The HSMMC1/HSMMC2 host controllers on OMAP34xx and
OMAP3503/3515/3525/3530 chips at ES levels prior to 3.0 can't do multiple
block reads[1]. Mark the hwmod data appropriately.
Reported by Dave Hylands <dhylands@gmail.com> and Steve Sakoman
<sakoman@gmail.com>. Thanks to Steve Sakoman for further help
testing this patch.
1. See for example Advisory 2.1.1.128 "MMC: Multiple Block Read
Operation Issue" in _OMAP3530/3525/3515/3503 Silicon Errata_
Revision F (October 2010) (SPRZ278F), available from
http://focus.ti.com/lit/er/sprz278f/sprz278f.pdf
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Cc: Dave Hylands <dhylands@gmail.com>
Cc: Steve Sakoman <sakoman@gmail.com>
Following 2 hwmod structures are added
1. usb_host_hs
The hwmod of usbhs with uhh, ehci and ohci base addresses
functional clock and ehci, ohci irqs
2. usb_tll_hs
hwmod of usbhs with the TLL base address and irq.
Signed-off-by: Benoit Cousson <b-cousson@ti.com>
[keshava_mgowda@ti.com: rebased to kernel version 3.0, added workarounds for
hardware issues]
Signed-off-by: Keshava Munegowda <keshava_mgowda@ti.com>
Reviewed-by: Partha Basak <parthab@india.ti.com>
[paul@pwsan.com: fixed multi-line comments, fixed whitespace, fixed S-o-b
notes, removed spurious TLL->L3 interface]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Following 2 hwmod structures are added
1. usb_host_hs
The hwmod of usbhs with uhh, ehci and ohci base addresses
functional clock and ehci, ohci irqs
2. usb_tll_hs
hwmod of usbhs with the TLL base address and irq.
Signed-off-by: Keshava Munegowda <keshava_mgowda@ti.com>
Reviewed-by: Partha Basak <parthab@india.ti.com>
[paul@pwsan.com: fixed whitespace; removed nonexistent TLL->L3 interface;
added master & slave for L4 CORE->TLL interface; skip registration on
3430ES1; fixed multiline comment style; updated to apply on Tony's cleanup
branch; rebased]
Signed-off-by: Paul Walmsley <paul@pwsan.com>
Doh.. pass the brown paper bags - preferably filled with mince
pies..
This fixes occasional build failures.
Signed-off-by: Alan Cox <alan@linux.intel.com>
Link: http://lkml.kernel.org/n/tip-r0oc1knlvzuqr69artaeq8s8@git.kernel.org
[ extended the changelog a bit ]
Signed-off-by: Ingo Molnar <mingo@elte.hu>
