Commit graph

1,267,977 commits

Author SHA1 Message Date
Muhammad Usama Anjum
dd976a97d1 tty/sysrq: replace smp_processor_id() with get_cpu()
The smp_processor_id() shouldn't be called from preemptible code.
Instead use get_cpu() and put_cpu() which disables preemption in
addition to getting the processor id. Enable preemption back after
calling schedule_work() to make sure that the work gets scheduled on all
cores other than the current core. We want to avoid a scenario where
current core's stack trace is printed multiple times and one core's
stack trace isn't printed because of scheduling of current task.

This fixes the following bug:

[  119.143590] sysrq: Show backtrace of all active CPUs
[  119.143902] BUG: using smp_processor_id() in preemptible [00000000] code: bash/873
[  119.144586] caller is debug_smp_processor_id+0x20/0x30
[  119.144827] CPU: 6 PID: 873 Comm: bash Not tainted 5.10.124-dirty #3
[  119.144861] Hardware name: QEMU QEMU Virtual Machine, BIOS 2023.05-1 07/22/2023
[  119.145053] Call trace:
[  119.145093]  dump_backtrace+0x0/0x1a0
[  119.145122]  show_stack+0x18/0x70
[  119.145141]  dump_stack+0xc4/0x11c
[  119.145159]  check_preemption_disabled+0x100/0x110
[  119.145175]  debug_smp_processor_id+0x20/0x30
[  119.145195]  sysrq_handle_showallcpus+0x20/0xc0
[  119.145211]  __handle_sysrq+0x8c/0x1a0
[  119.145227]  write_sysrq_trigger+0x94/0x12c
[  119.145247]  proc_reg_write+0xa8/0xe4
[  119.145266]  vfs_write+0xec/0x280
[  119.145282]  ksys_write+0x6c/0x100
[  119.145298]  __arm64_sys_write+0x20/0x30
[  119.145315]  el0_svc_common.constprop.0+0x78/0x1e4
[  119.145332]  do_el0_svc+0x24/0x8c
[  119.145348]  el0_svc+0x10/0x20
[  119.145364]  el0_sync_handler+0x134/0x140
[  119.145381]  el0_sync+0x180/0x1c0

Cc: jirislaby@kernel.org
Cc: stable@vger.kernel.org
Fixes: 47cab6a722 ("debug lockups: Improve lockup detection, fix generic arch fallback")
Signed-off-by: Muhammad Usama Anjum <usama.anjum@collabora.com>
Link: https://lore.kernel.org/r/20231009162021.3607632-1-usama.anjum@collabora.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2023-10-10 08:52:24 +02:00
Max Filippov
c7c5be5862 serial: add PORT_GENERIC definition
Current pattern in the linux kernel is that every new serial driver adds
one or more new PORT_ definitions because uart_ops::config_port()
callback documentation prescribes setting port->type according to the
type of port found, or to PORT_UNKNOWN if no port was detected.

When the specific type of the port is not important to the userspace
there's no need for a unique PORT_ value, but so far there's no suitable
identifier for that case.

Provide generic port type identifier other than PORT_UNKNOWN for ports
which type is not important to userspace.

Suggested-by: Arnd Bergmann <arnd@arndb.de>
Suggested-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Signed-off-by: Max Filippov <jcmvbkbc@gmail.com>
Suggested-by: Jiri Slaby <jirislaby@kernel.org>
Reviewed-by: Jiri Slaby <jirislaby@kernel.org>
Link: https://lore.kernel.org/r/20231008001804.889727-1-jcmvbkbc@gmail.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2023-10-10 08:51:10 +02:00
Lucas Tanure
3047b5b53c tty: serial: meson: Add a earlycon for the S4 SoC
The new Amlogic S4 SoC does not have a always-on uart, so add
OF_EARLYCON_DECLARE for it.
Amlogic T7 will use this as fallback.

Signed-off-by: Lucas Tanure <tanure@linux.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20231009121151.4509-1-tanure@linux.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2023-10-10 08:50:49 +02:00
Dmitry Baryshkov
1fa259cd68 dt-bindings: opp: opp-v2-kryo-cpu: support Qualcomm Krait SoCs
Exted the opp-v2-kryo-cpu.yaml to support defining OPP tables for the
previous generation of Qualcomm CPUs, 32-bit Krait-based platforms.

It makes no sense to use 'operating-points-v2-kryo-cpu' compatibility
node for the Krait cores. Add support for the Krait-specific
'operating-points-v2-krait-cpu' compatibility string and the relevant
opp-microvolt subclasses properties.

The listed opp-supported-hw values are applicable only to msm8996 /
msm8996pro platforms. Remove the enum as other platforms will use other
bit values. It makes little sense to list all possible values for all
the platforms here.

Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
2023-10-10 12:01:19 +05:30
Damien Le Moal
626b13f015 scsi: Do not rescan devices with a suspended queue
Commit ff48b37802 ("scsi: Do not attempt to rescan suspended devices")
modified scsi_rescan_device() to avoid attempting rescanning a suspended
device. However, the modification added a check to verify that a SCSI
device is in the running state without checking if the device request
queue (in the case of block device) is also running, thus allowing the
exectuion of internal requests. Without checking the device request
queue, commit ff48b37802 fix is incomplete and deadlocks on resume can
still happen. Use blk_queue_pm_only() to check if the device request
queue allows executing commands in addition to checking the SCSI device
state.

Reported-by: Petr Tesarik <petr@tesarici.cz>
Fixes: ff48b37802 ("scsi: Do not attempt to rescan suspended devices")
Cc: stable@vger.kernel.org
Tested-by: Petr Tesarik <petr@tesarici.cz>
Reviewed-by: Martin K. Petersen <martin.petersen@oracle.com>
Signed-off-by: Damien Le Moal <dlemoal@kernel.org>
2023-10-10 14:42:22 +09:00
Ondrej Zary
0c1e81d0b5 ata: pata_parport: fit3: implement IDE command set registers
fit3 protocol driver does not support accessing IDE control registers
(device control/altstatus). The DOS driver does not use these registers
either (as observed from DOSEMU trace). But the HW seems to be capable
of accessing these registers - I simply tried bit 3 and it works!

The control register is required to properly reset ATAPI devices or
they will be detected only once (after a power cycle).

Tested with EXP Computer CD-865 with MC-1285B EPP cable and
TransDisk 3000.

Signed-off-by: Ondrej Zary <linux@zary.sk>
Reviewed-by: Sergey Shtylyov <s.shtylyov@omp.ru>
Signed-off-by: Damien Le Moal <dlemoal@kernel.org>
2023-10-10 14:42:22 +09:00
Ondrej Zary
f343e578fe ata: pata_parport: add custom version of wait_after_reset
Some parallel adapters (e.g. EXP Computer MC-1285B EPP Cable) return
bogus values when there's no master device present. This can cause
reset to fail, preventing the lone slave device (such as EXP Computer
CD-865) from working.

Add custom version of wait_after_reset that ignores master failure when
a slave device is present. The custom version is also needed because
the generic ata_sff_wait_after_reset uses direct port I/O for slave
device detection.

Signed-off-by: Ondrej Zary <linux@zary.sk>
Reviewed-by: Sergey Shtylyov <s.shtylyov@omp.ru>
Signed-off-by: Damien Le Moal <dlemoal@kernel.org>
2023-10-10 14:42:22 +09:00
Ondrej Zary
d2302427c1 ata: pata_parport: implement set_devctl
Add missing ops->sff_set_devctl implementation.

Fixes: 246a1c4c6b ("ata: pata_parport: add driver (PARIDE replacement)")
Cc: stable@vger.kernel.org
Signed-off-by: Ondrej Zary <linux@zary.sk>
Reviewed-by: Sergey Shtylyov <s.shtylyov@omp.ru>
Signed-off-by: Damien Le Moal <dlemoal@kernel.org>
2023-10-10 14:42:22 +09:00
Ondrej Zary
b555aa6676 ata: pata_parport: fix pata_parport_devchk
There's a 'x' missing in 0x55 in pata_parport_devchk(), causing the
detection to always fail. Fix it.

Fixes: 246a1c4c6b ("ata: pata_parport: add driver (PARIDE replacement)")
Cc: stable@vger.kernel.org
Signed-off-by: Ondrej Zary <linux@zary.sk>
Reviewed-by: Sergey Shtylyov <s.shtylyov@omp.ru>
Signed-off-by: Damien Le Moal <dlemoal@kernel.org>
2023-10-10 14:42:22 +09:00
Sumit Gupta
c12f0d0ffa cpufreq: tegra194: remove redundant AND with cpu_online_mask
Remove redundant 'AND' with cpu_online_mask as the policy->cpus always
contains only the currently online CPUs.

Suggested-by: Viresh Kumar <viresh.kumar@linaro.org>
Link: https://lore.kernel.org/lkml/20231003050019.a6mcchw2o2z2wkrh@vireshk-i7/
Signed-off-by: Sumit Gupta <sumitg@nvidia.com>
[ Viresh: Fix rebase conflict ]
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
2023-10-10 11:06:03 +05:30
Sumit Gupta
a60a556788 cpufreq: tegra194: use refclk delta based loop instead of udelay
Use reference clock count based loop instead of "udelay()" for
sampling of counters to improve the accuracy of re-generated CPU
frequency. "udelay()" internally calls "WFE" which stops the
counters and results in bigger delta between the last set freq
and the re-generated value from counters. The counter sampling
window used in loop is the minimum number of reference clock
cycles which is known to give a stable value of CPU frequency.
The change also helps to reduce the sampling window from "500us"
to "<50us".

Suggested-by: Antti Miettinen <amiettinen@nvidia.com>
Signed-off-by: Sumit Gupta <sumitg@nvidia.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
2023-10-10 11:03:03 +05:30
Sumit Gupta
6b121b4cf7 cpufreq: tegra194: save CPU data to avoid repeated SMP calls
Currently, we make SMP call on every frequency set request to get the
physical 'CPU ID' and 'CLUSTER ID' for the target CPU. This change
optimizes the repeated calls by storing the physical IDs and the per
core frequency register offset for all CPUs during boot. Later this
info is used directly when required to set the frequency or read it
from ACTMON counters.

Signed-off-by: Sumit Gupta <sumitg@nvidia.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
2023-10-10 11:03:03 +05:30
Shradha Gupta
42999c9046 hv/hv_kvp_daemon:Support for keyfile based connection profile
Ifcfg config file support in NetworkManger is deprecated. This patch
provides support for the new keyfile config format for connection
profiles in NetworkManager. The patch modifies the hv_kvp_daemon code
to generate the new network configuration in keyfile
format(.ini-style format) along with a ifcfg format configuration.
The ifcfg format configuration is also retained to support easy
backward compatibility for distro vendors. These configurations are
stored in temp files which are further translated using the
hv_set_ifconfig.sh script. This script is implemented by individual
distros based on the network management commands supported.
For example, RHEL's implementation could be found here:
https://gitlab.com/redhat/centos-stream/src/hyperv-daemons/-/blob/c9s/hv_set_ifconfig.sh
Debian's implementation could be found here:
https://github.com/endlessm/linux/blob/master/debian/cloud-tools/hv_set_ifconfig

The next part of this support is to let the Distro vendors consume
these modified implementations to the new configuration format.

Tested-on: Rhel9(Hyper-V, Azure)(nm and ifcfg files verified)
Signed-off-by: Shradha Gupta <shradhagupta@linux.microsoft.com>
Reviewed-by: Saurabh Sengar <ssengar@linux.microsoft.com>
Reviewed-by: Ani Sinha <anisinha@redhat.com>
Signed-off-by: Wei Liu <wei.liu@kernel.org>
Link: https://lore.kernel.org/r/1696847920-31125-1-git-send-email-shradhagupta@linux.microsoft.com
2023-10-10 03:42:29 +00:00
Mark Brown
9e952929df clk: versaclock7: Convert to use maple tree register cache
The maple tree register cache is based on a much more modern data structure
than the rbtree cache and makes optimisation choices which are probably
more appropriate for modern systems than those made by the rbtree cache.

Signed-off-by: Mark Brown <broonie@kernel.org>
Link: https://lore.kernel.org/r/20230929-clk-maple-versaclk-v1-4-24dd5b3d8689@kernel.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2023-10-09 20:31:23 -07:00
Mark Brown
2902ba682a clk: versaclock5: Convert to use maple tree register cache
The maple tree register cache is based on a much more modern data structure
than the rbtree cache and makes optimisation choices which are probably
more appropriate for modern systems than those made by the rbtree cache.

Signed-off-by: Mark Brown <broonie@kernel.org>
Link: https://lore.kernel.org/r/20230929-clk-maple-versaclk-v1-3-24dd5b3d8689@kernel.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2023-10-09 20:31:23 -07:00
Mark Brown
4b58a0144b clk: versaclock3: Convert to use maple tree register cache
The maple tree register cache is based on a much more modern data structure
than the rbtree cache and makes optimisation choices which are probably
more appropriate for modern systems than those made by the rbtree cache.

Signed-off-by: Mark Brown <broonie@kernel.org>
Link: https://lore.kernel.org/r/20230929-clk-maple-versaclk-v1-2-24dd5b3d8689@kernel.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2023-10-09 20:31:22 -07:00
Mark Brown
df43983922 clk: versaclock3: Remove redundant _is_writeable()
The versaclock3 driver provides an _is_writeable() function which returns
true for all registers. This is the default assumption for regmaps so we
can remove the function for a very minor improvement in performance and
code size.

Signed-off-by: Mark Brown <broonie@kernel.org>
Link: https://lore.kernel.org/r/20230929-clk-maple-versaclk-v1-1-24dd5b3d8689@kernel.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2023-10-09 20:31:22 -07:00
Mark Brown
ebb7a1919f clk: si570: Convert to use maple tree register cache
The maple tree register cache is based on a much more modern data structure
than the rbtree cache and makes optimisation choices which are probably
more appropriate for modern systems than those made by the rbtree cache.

Signed-off-by: Mark Brown <broonie@kernel.org>
Link: https://lore.kernel.org/r/20230929-clk-maple-si-v1-5-e26cfcaf27bd@kernel.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2023-10-09 20:29:16 -07:00
Mark Brown
8df090919d clk: si544: Convert to use maple tree register cache
The maple tree register cache is based on a much more modern data structure
than the rbtree cache and makes optimisation choices which are probably
more appropriate for modern systems than those made by the rbtree cache.

Signed-off-by: Mark Brown <broonie@kernel.org>
Link: https://lore.kernel.org/r/20230929-clk-maple-si-v1-4-e26cfcaf27bd@kernel.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2023-10-09 20:29:16 -07:00
Mark Brown
41d2288629 clk: si5351: Convert to use maple tree register cache
The maple tree register cache is based on a much more modern data structure
than the rbtree cache and makes optimisation choices which are probably
more appropriate for modern systems than those made by the rbtree cache.

Signed-off-by: Mark Brown <broonie@kernel.org>
Link: https://lore.kernel.org/r/20230929-clk-maple-si-v1-3-e26cfcaf27bd@kernel.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2023-10-09 20:29:16 -07:00
Mark Brown
e2ec8f6631 clk: si5341: Convert to use maple tree register cache
The maple tree register cache is based on a much more modern data structure
than the rbtree cache and makes optimisation choices which are probably
more appropriate for modern systems than those made by the rbtree cache.

Signed-off-by: Mark Brown <broonie@kernel.org>
Link: https://lore.kernel.org/r/20230929-clk-maple-si-v1-2-e26cfcaf27bd@kernel.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2023-10-09 20:29:16 -07:00
Mark Brown
29171344a1 clk: si514: Convert to use maple tree register cache
The maple tree register cache is based on a much more modern data structure
than the rbtree cache and makes optimisation choices which are probably
more appropriate for modern systems than those made by the rbtree cache.

Signed-off-by: Mark Brown <broonie@kernel.org>
Link: https://lore.kernel.org/r/20230929-clk-maple-si-v1-1-e26cfcaf27bd@kernel.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2023-10-09 20:29:16 -07:00
Mark Brown
6fc469ab7f clk: cdce925: Convert to use maple tree register cache
The maple tree register cache is based on a much more modern data structure
than the rbtree cache and makes optimisation choices which are probably
more appropriate for modern systems than those made by the rbtree cache.

Signed-off-by: Mark Brown <broonie@kernel.org>
Link: https://lore.kernel.org/r/20230929-clk-rbtree-cdce925-v1-1-a36b459002f7@kernel.org
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2023-10-09 20:28:42 -07:00
Stephen Boyd
831187c694 clk: Parameterize clk_leaf_mux_set_rate_parent
Transform the existing clk_leaf_mux_set_rate_parent test into a
parameterized test that calls the various determine rate APIs that exist
for clk providers. This ensures that whatever determine rate API is used
by a clk provider will return the correct parent in the best_parent_hw
pointer of the clk_rate_request because clk_rate_requests are forwarded
properly.

Cc: Guenter Roeck <linux@roeck-us.net>
Cc: Maxime Ripard <mripard@kernel.org>
Link: https://lore.kernel.org/r/20230912175534.2427862-3-sboyd@kernel.org
Acked-by: Maxime Ripard <mripard@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2023-10-09 20:08:25 -07:00
Stephen Boyd
096b256c9a clk: Drive clk_leaf_mux_set_rate_parent test from clk_ops
Running this kunit test with lockdep enabled leads to warning splats
about calling clk provider APIs without the clk_prepare lock held.  I
proposed adding a wrapper around these APIs to grab the prepare lock so
we can call them from anywhere, and Maxime implemented that approach[1],
but it didn't look great. That's because we had to make more kunit
testing APIs just to call code from a place that isn't a clk provider
when the prepare lock isn't held.

Instead of doing that, let's implement a determine_rate clk_op for a new
leaf clk that is the child of the existing leaf clk. We can call
__clk_determine_rate() on the existing leaf clk from there, and stash
away the clk_rate_request struct to check once the clk_op returns. Drive
that clk_op by calling clk_round_rate() to keep things similar to how it
was before (i.e. nothing actually changes rate, just the new rate is
determined). This silences the warning by driving the test from a
clk_op where we know the prepare lock is held.

While looking at this in more detail, it was determined that the code we
intended to test in commit 262ca38f4b ("clk: Stop forwarding
clk_rate_requests to the parent") wasn't actually tested. The call to
__clk_determine_rate() wasn't actually getting to the newly introduced
code under the CLK_SET_RATE_PARENT if condition in
clk_core_round_rate_nolock() because the parent clk (the mux) could
round rates. We introduce a new leaf and make sure the parent of that
clk has no clk_ops so that we can be certain that the
CLK_SET_RATE_PARENT condition in clk_core_round_rate_nolock() is
evaluated.

Reported-by: Guenter Roeck <linux@roeck-us.net>
Closes: https://lore.kernel.org/linux-clk/2b594e50-2bbf-4a2d-88e6-49fc39f3957a@roeck-us.net/
Reported-by: kernel test robot <yujie.liu@intel.com>
Closes: https://lore.kernel.org/oe-lkp/202301310919.b9d56ee3-yujie.liu@intel.com
Cc: Maxime Ripard <mripard@kernel.org>
Link: https://lore.kernel.org/r/20230721-clk-fix-kunit-lockdep-v1-0-32cdba4c8fc1@kernel.org [1]
Fixes: 262ca38f4b ("clk: Stop forwarding clk_rate_requests to the parent")
Link: https://lore.kernel.org/r/20230912175534.2427862-2-sboyd@kernel.org
Acked-by: Maxime Ripard <mripard@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>
2023-10-09 20:08:12 -07:00
Adam Ford
b4383609a0 arm64: dts: imx8mp-beacon: Add DMIC support
The baseboard has a connector for a pulse density microphone.
This is connected via the micfil interface and uses the DMIC
audio codec with the simple-audio-card.

Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-10-10 11:06:02 +08:00
Adam Ford
2b49b88927 arm64: dts: imx8mn-beacon: Add DMIC support
The baseboard has a connector for a pulse density microphone.
This is connected via the micfil interface and uses the DMIC
audio codec with the simple-audio-card.

Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-10-10 11:06:02 +08:00
Adam Ford
a9c8d7f77c arm64: dts: imx8mm-beacon: Add DMIC support
The baseboard has a connector for a pulse density microphone.
This is connected via the micfil interface and uses the DMIC
audio codec with the simple-audio-card.

Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-10-10 11:06:02 +08:00
Adam Ford
189399a4ca arm64: dts: imx8mm-beacon: Migrate sound card to simple-audio-card
Instead of using a custom glue layer connecting the wm8962 CODEC
to the SAI3 sound-dai, migrate the sound card to simple-audio-card.
This also brings this board in line with the imx8mn-beacon and
imx8mp-beacon.

Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-10-10 11:06:01 +08:00
Fabio Estevam
5c24548607 arm64: dts: imx8mn-evk: Remove codec clocks/clock-names
Per wlf,wm8524.yaml, 'clocks' and 'clock-names' are not valid
properties.

Remove them to fix the following schema warning:

audio-codec: Unevaluated properties are not allowed ('clock-names', 'clocks' were unexpected)
from schema $id: http://devicetree.org/schemas/sound/wlf,wm8524.yaml#

Signed-off-by: Fabio Estevam <festevam@denx.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-10-10 11:06:01 +08:00
Adam Ford
63c46b51c7 arm64: dts: imx8mp-beacon: Configure 100MHz PCIe Ref Clk
There is a I2C controlled 100MHz Reference clock used by the PCIe
controller. Configure this clock's DIF1 output to be used by
the PCIe.

Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-10-10 11:06:01 +08:00
Adam Ford
db1925454a arm64: dts: imx8mn: Add sound-dai-cells to micfil node
Per the DT bindings, the micfil node should have a sound-dai-cells
entry.

Fixes: cca69ef6eb ("arm64: dts: imx8mn: Add support for micfil")
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-10-10 11:06:01 +08:00
Adam Ford
0e6cc2b8bb arm64: dts: imx8mm: Add sound-dai-cells to micfil node
Per the DT bindings, the micfil node should have a sound-dai-cells
entry.

Fixes: 3bd0788c43 ("arm64: dts: imx8mm: Add support for micfil")
Signed-off-by: Adam Ford <aford173@gmail.com>
Reviewed-by: Fabio Estevam <festevam@gmail.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-10-10 11:06:01 +08:00
Gregor Herburger
690aae3b3a arm64: dts: freescale: add initial device tree for TQMLS1088A
This adds support for TQMLS1088A SOM on MBLS10xxA baseboard.

Signed-off-by: Gregor Herburger <gregor.herburger@ew.tq-group.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-10-10 11:06:01 +08:00
Gregor Herburger
981e850f46 arm64: dts: freescale: add initial device tree for TQMLS1043A/TQMLS1046A
This adds support for the TQMLS1043A and TQMLS1046A SOM and the
MBLS10xxA baseboard. TQMLS1043A and TQMLS1046A share a common layout
and can be used on the MBLS10xxA.

Signed-off-by: Gregor Herburger <gregor.herburger@ew.tq-group.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-10-10 11:06:01 +08:00
Gregor Herburger
f9d6a6e68e arm64: dts: ls1043a: remove second dspi node
According to the documentation the ls1043a has only one spi controller.
So remove the second one.

Signed-off-by: Gregor Herburger <gregor.herburger@ew.tq-group.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-10-10 11:06:01 +08:00
Josua Mayer
5093b190f9 arm64: dts: freescale: Add support for LX2162 SoM & Clearfog Board
Add support for the SolidRun LX2162A System on Module (SoM), and the
Clearfog evaluation board.

The SoM has few software-controllable features:
- AR8035 Ethernet PHY
- eMMC
- SPI Flash
- fan controller
- various eeproms

The Clearfog evaluation board provides:
- microSD connector
- USB-A
- 2x 10Gbps SFP+
- 2x 25Gbps SFP+ with a retimer
- 8x 2.5Gbps RJ45
- 2x mPCI (assembly option / disables 2xRJ45)

The 8x RJ45 ports are connected with an 8-port PHY: Marvell 88E2580
supporting up to 5Gbps, while SoC and magnetics are limited to 2.5Gbps.

However 2500 speed is untested due to documentation and drivier
limitations. To avoid confusion the phy nodes have been explicitly
limited to 1000 for now.

The PCI nodes are disabled, but explicitly added to mark that this board
can have pci.
It is expected that the bootloader will patch the status property
"okay" and disable 2x RJ45 ports, according to active serdes configuration.

Signed-off-by: Josua Mayer <josua@solid-run.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-10-10 11:06:01 +08:00
Josua Mayer
2f2900176b arm64: dts: lx2160a: describe the SerDes block #2
Add description for the LX2160A second SerDes block.
It is functionally identical to the first one already added in
commit 3cbe93a1f5 ("arch: arm64: dts: lx2160a: describe the SerDes
block #1").

The SerDes driver currently updates the registers of all 8 lanes by
default during probe. Because currently this driver only supports
configuration of network protocols, this can lead to problems with
certain configurations.
Set status property to "disabled" by default so that existing boards are
not impacted.

Signed-off-by: Josua Mayer <josua@solid-run.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-10-10 11:06:00 +08:00
Peng Fan
c1d0782b5f arm64: dts: imx93: update gpio node
Per binding doc, i.MX93 GPIO supports two interrupts and one register
base, compatible with i.MX8ULP. The current fsl,imx7ulp-gpio compatible
could work for i.MX93 in gpio-vf610.c driver, it is based on the base
address are splited into two with offset added in device tree node.

Now following hardware design, using one register base in device tree node.

This may break users who use compatible fsl,imx7ulp-gpio to enable
i.MX93 GPIO.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-10-10 11:06:00 +08:00
Peng Fan
ac7bcf48dd arm64: dts: imx8ulp: update gpio node
The i.MX8ULP GPIO supports two interrupts and one register base,
the current fsl,imx7ulp-gpio compatible could work for i.MX8ULP in
gpio-vf610.c driver, it is based on the base address are splited
into two with offset added in device tree node. Now following
hardware design, using one register base in device tree node.

This may break users who use compatible fsl,imx7ulp-gpio to enable
i.MX8ULP GPIO.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-10-10 11:06:00 +08:00
Fabio Estevam
d403e1dc7b arm64: dts: imx8mq-librem5: Fix tps65132 compatible
The valid compatible string for the tps65132 regulator
is "ti,tps65132".

Change it.

Signed-off-by: Fabio Estevam <festevam@denx.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-10-10 11:06:00 +08:00
Fabio Estevam
0ce9a2c121 arm64: dts: imx8mp-debix-model-a: Remove USB hub reset-gpios
The SAI2_TXC pin is left unconnected per the imx8mp-debix-model-a
schematics:

https://debix.io/Uploads/Temp/file/20230331/DEBIX%20Model%20A%20Schematics.pdf

Also, the RTS5411E USB hub chip does not have a reset pin.

Remove this pin description to properly describe the hardware.

This also fixes the following schema warning:

hub@1: 'reset-gpios' does not match any of the regexes: 'pinctrl-[0-9]+'
from schema $id: http://devicetree.org/schemas/usb/realtek,rts5411.yaml#

Fixes: 0253e1cb63 ("arm64: dts: imx8mp-debix: add USB host support")
Signed-off-by: Fabio Estevam <festevam@denx.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-10-10 11:06:00 +08:00
Fabio Estevam
d57ba7ac6d arm64: dts: imx8-apalis-v1.1: Fix Ethernet PHY reset-names
Per ethernet-phy.yaml, the expected value for the 'reset-names'
property is "phy".

Change it accordingly to fix the following schema warning:

imx8qm-apalis-ixora-v1.1.dtb: ethernet-phy@7: reset-names:0: 'phy' was expected
from schema $id: http://devicetree.org/schemas/net/ethernet-phy.yaml#

Signed-off-by: Fabio Estevam <festevam@denx.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-10-10 11:06:00 +08:00
Fabio Estevam
82e13c3948 arm64: dts: imx8mm-venice-gw790: Remove phy-mode from switch node
Per microchip,ksz.yaml, phy-mode is not a valid property in the
top-level switch node.

phy-mode = "rgmii-id" is already passed in the CPU port switch (port@5).

Remove it from the top-level switch node to fix the following
schema warning:

switch@5f: Unevaluated properties are not allowed ('phy-mode' was unexpected)
from schema $id: http://devicetree.org/schemas/net/dsa/microchip,ksz.yaml

Signed-off-by: Fabio Estevam <festevam@denx.de>
Acked-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-10-10 11:06:00 +08:00
Tim Harvey
2b3ab9d81a arm64: dts: imx8mp-venice-gw73xx: add TPM device
Add the TPM device found on the GW73xx revision F PCB.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-10-10 11:06:00 +08:00
Tim Harvey
4f2a348aa3 arm64: dts: imx8mm-venice-gw73xx: add TPM device
Add the TPM device found on the GW73xx revision F PCB.

Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-10-10 11:06:00 +08:00
Fabio Estevam
cfbd0a329b arm64: dts: imx8mp-verdin: Remove invalid property from eqos
Per nxp,dwmac-imx.yaml, it is not valid to pass 'phy-supply'.

The reg_module_eth1phy regulator is marked with 'regulator-always-on',
so it is safe to remove it from the eqos node.

Remove it to fix the following schema warning:

imx8mp-verdin-nonwifi-dahlia.dtb: ethernet@30bf0000: Unevaluated properties are not allowed ('phy-supply' was unexpected)
	from schema $id: http://devicetree.org/schemas/net/nxp,dwmac-imx.yaml#

Signed-off-by: Fabio Estevam <festevam@denx.de>
Tested-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-10-10 11:06:00 +08:00
Fabio Estevam
1d33cd614d arm64: dts: imx8qm-ss-img: Fix jpegenc compatible entry
The first compatible entry for the jpegenc should be 'nxp,imx8qm-jpgenc'.

Change it accordingly to fix the following schema warning:

imx8qm-apalis-eval.dtb: jpegenc@58450000: compatible: 'oneOf' conditional failed, one must be fixed:
	'nxp,imx8qm-jpgdec' is not one of ['nxp,imx8qxp-jpgdec', 'nxp,imx8qxp-jpgenc']
	'nxp,imx8qm-jpgenc' was expected
	'nxp,imx8qxp-jpgdec' was expected

Fixes: 5bb279171a ("arm64: dts: imx8: Add jpeg encoder/decoder nodes")
Signed-off-by: Fabio Estevam <festevam@denx.de>
Reviewed-by: Mirela Rabulea <mirela.rabulea@nxp.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-10-10 11:05:46 +08:00
Stephen Boyd
2952134365 clk: renesas: Updates for v6.7
- Miscellaneous fixes and improvements.
 -----BEGIN PGP SIGNATURE-----
 
 iHUEABYIAB0WIQQ9qaHoIs/1I4cXmEiKwlD9ZEnxcAUCZRaftQAKCRCKwlD9ZEnx
 cAdZAQCgpXIanVYpjs3goowwhk2ci0jHJyB1Npork037REIVqAEAlRPu9DxO/drz
 WqDOrZKkBzhfePHsoETwrQw7QwK0Lgo=
 =en98
 -----END PGP SIGNATURE-----

Merge tag 'renesas-clk-for-v6.7-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers into clk-renesas

Pull Renesas clk driver updates from Geert Uytterhoeven:

 - Miscellaneous fixes and improvements

* tag 'renesas-clk-for-v6.7-tag1' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-drivers:
  clk: renesas: r8a7795: Constify r8a7795_*_clks
  clk: renesas: r9a06g032: Name anonymous structs
  clk: renesas: r9a06g032: Fix kerneldoc warning
  clk: renesas: rzg2l: Use u32 for flag and mux_flags
  clk: renesas: rzg2l: Use FIELD_GET() for PLL register fields
  clk: renesas: rzg2l: Simplify the logic in rzg2l_mod_clock_endisable()
  clk: renesas: rzg2l: Use core->name for clock name
  clk: renesas: r9a06g032: Use for_each_compatible_node()
2023-10-09 20:04:37 -07:00
Fabio Estevam
a725990557 arm64: dts: imx93: Fix the dmas entries order
Per fsl-lpuart.yaml, the dmas and dma-names entries should be
'rx' followed by 'tx'.

Change the order to fix the following schema warning:

imx93-11x11-evk.dtb: serial@44380000: dma-names:0: 'rx' was expected
	from schema $id: http://devicetree.org/schemas/serial/fsl-lpuart.yaml#
imx93-11x11-evk.dtb: serial@44380000: dma-names:1: 'tx' was expected
	from schema $id: http://devicetree.org/schemas/serial/fsl-lpuart.yaml#

Signed-off-by: Fabio Estevam <festevam@denx.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
2023-10-10 10:52:50 +08:00