Commit graph

1,267,977 commits

Author SHA1 Message Date
Daniel Miess
cbe069f5e6 drm/amd/display: Port replay vblank logic to DML2
Update DML2 with replay vblank logic found in DML1.

Reviewed-by: Charlene Liu <charlene.liu@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Daniel Miess <daniel.miess@amd.com>
Signed-off-by: Qingqing Zhuo <Qingqing.Zhuo@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-10-09 16:51:21 -04:00
Saaem Rizvi
ba85d293a3 drm/amd/display: Modify Pipe Selection for Policy for ODM
[Why]
There are certain cases during a transition to ODM that might cause
corruption on the display. This occurs when we choose certain pipes in a
particular state.

[How]
We now will store the pipe indexes of the any pipes that might be
problematic to switch to during an ODM transition, and only use them as
a last resort.

Reviewed-by: Dmytro Laktyushkin <dmytro.laktyushkin@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Qingqing Zhuo <Qingqing.Zhuo@amd.com>
Signed-off-by: Saaem Rizvi <syedsaaem.rizvi@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-10-09 16:51:14 -04:00
Charlene Liu
0e56de91ed drm/amd/display: correct dml2 input and dlg_refclk
dc->dml2_options.use_native_pstate_optimization flag will make driver
use dcn32 legacy_svp_drr related tuning. Set this to false fixed the
stutter underflow issue also based on HW suggest disable ODM by default
and let DML choose it.

Reviewed-by: Zhan Liu <zhan.liu@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Qingqing Zhuo <Qingqing.Zhuo@amd.com>
Signed-off-by: Charlene Liu <charlene.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-10-09 16:51:06 -04:00
Sung Joon Kim
969fe903ee drm/amd/display: Fix Chroma Surface height/width initialization
[why]
Surface height/width for Chroma has another variable that it should be
intialized to, chroma_size. Fixing this will help pass DML2.0 validation
for YCbCr420 tests, DCHB006.109,129, DCHB014.011,012.

[how]
Assign SurfaceHeight/WidthC to chroma_size.height/width

Reviewed-by: Charlene Liu <charlene.liu@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Sung Joon Kim <sungkim@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-10-09 16:50:59 -04:00
Taimur Hassan
9158920cc8 drm/amd/display: Move stereo timing check to helper
Rework dml2_map_dc_pipes to keep the logic clean.

Reviewed-by: Chaitanya Dhere <chaitanya.dhere@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Qingqing Zhuo <Qingqing.Zhuo@amd.com>
Signed-off-by: Taimur Hassan <syed.hassan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-10-09 16:50:53 -04:00
Taimur Hassan
21eeb05114 drm/amd/display: Split pipe for stereo timings
[Why & How]
DML2 did not carry over DML1 logic that splits pipe for stero timings. Pipe
splitting is needed in this case to pass stereo tests.

Reviewed-by: Charlene Liu <charlene.liu@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Qingqing Zhuo <Qingqing.Zhuo@amd.com>
Signed-off-by: Taimur Hassan <syed.hassan@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-10-09 16:50:45 -04:00
Sung Joon Kim
1d93c4db4e drm/amd/display: Use fixed DET Buffer Size
[why]
Regression from DML1.0 where we use differen DET buffer sizes for each
pipe. From the spec, we need to use DET buffer size of 384 kb for each
pipe

[how]
Ensure to use 384 kb DET buffer sizes for each available pipe.

Reviewed-by: Charlene Liu <charlene.liu@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Sung Joon Kim <sungkim@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-10-09 16:50:27 -04:00
Sung Joon Kim
e47d7ca757 drm/amd/display: Handle multiple streams sourcing same surface
[why]
There are cases where more than 1 stream can be mapped to the same
surface. DML2.0 does not seem to handle these cases.

[how]
Make sure to account for the stream id when deriving the plane id. By
doing this, each plane id will be unique based on the stream id.

Reviewed-by: Charlene Liu <charlene.liu@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Sung Joon Kim <sungkim@amd.com>
Signed-off-by: Qingqing Zhuo <Qingqing.Zhuo@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-10-09 16:50:19 -04:00
Charlene Liu
eb918cbba1 drm/amd/display: Add z8_marks in dml
Add z8 watermarks to struct for later ASIC use.

Reviewed-by: Alvin Lee <alvin.lee2@amd.com>
Acked-by: Qingqing Zhuo <qingqing.zhuo@amd.com>
Signed-off-by: Charlene Liu <charlene.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-10-09 16:50:12 -04:00
Qingqing Zhuo
115009d11c drm/amd/display: Add DCN35 DML2 support
Enable DML2 for DCN35.

Changes since V1:
- Remove hard coded values

Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Roman Li <roman.li@amd.com>
Signed-off-by: Qingqing Zhuo <Qingqing.Zhuo@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-10-09 16:49:39 -04:00
Qingqing Zhuo
7966f319c6 drm/amd/display: Introduce DML2
DC is transitioning from DML to DML2, and this commit introduces all the
required changes for some of the already available ASICs and adds the
required code infra to support new ASICs under DML2. DML2 is also a
generated code that provides better mode verification and programming
models for software/hardware, and it enables a better way to create
validation tools. This version is more like a middle step to the
complete transition to the DML2 version.

Changes since V1:
- Alex: Fix typos

Changes since V2:
- Update DC includes

Changes since V3:
- Fix 32 bit compilation issues on x86

Changes since V4:
- Avoid compilation of DML2 on some not supported 32-bit architecture
- Update commit message

Co-developed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Co-developed-by: Roman Li <roman.li@amd.com>
Signed-off-by: Roman Li <roman.li@amd.com>
Signed-off-by: Qingqing Zhuo <Qingqing.Zhuo@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-10-09 16:48:51 -04:00
Rodrigo Siqueira
6e2c4941ce drm/amd/display: Move dml code under CONFIG_DRM_AMD_DC_FP guard
For some reason, the dml code is not guarded under CONFIG_DRM_AMD_DC_FP
in the Makefile. This commit moves the dml code under the DC_FP guard.

Reviewed-by: Qingqing Zhuo <Qingqing.Zhuo@amd.com>
Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-10-09 16:48:45 -04:00
Rodrigo Siqueira
a2719f91a1 drm/amd/display: Move bw_fixed from DML folder
bw_fixed does not need any FPU operation, and it is used on DCE and DCN.
For this reason, this commit moves bw_fixed to the basic folder outside
DML.

Reviewed-by: Qingqing Zhuo <Qingqing.Zhuo@amd.com>
Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-10-09 16:48:37 -04:00
Rodrigo Siqueira
13f9173af8 drm/amd/display: Move custom_float from DML folder
The custom_float file does not have any FPU operation, so it should be
inside DML. This commit moves the file to the basic folder.

Reviewed-by: Qingqing Zhuo <Qingqing.Zhuo@amd.com>
Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-10-09 16:48:31 -04:00
Rodrigo Siqueira
d310d18bfc drm/amd/display: Move dce_calcs from DML folder
dce_calcs does not have FPU operations, and it is required for DCE and
DCN. Remove this file from the DML folder and add it to the basic folder
visible for DCE and DCN.

Reviewed-by: Qingqing Zhuo <Qingqing.Zhuo@amd.com>
Signed-off-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-10-09 16:48:22 -04:00
Alex Deucher
f8cd72728b drm/amdgpu: Enable SMU 13.0.0 optimizations when ROCm is active (v2)
When ROCm is active enable additional SMU 13.0.0 optimizations.
This reuses the unused powersave profile on PMFW.

v2: move to the swsmu code since we need both bits active in
    the workload mask.

Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-10-09 16:48:16 -04:00
Sebastian Andrzej Siewior
2091ac6903 drm/amd/display: Move the memory allocation out of dcn20_validate_bandwidth_fp().
dcn20_validate_bandwidth_fp() is invoked while FPU access has been
enabled. FPU access requires disabling preemption even on PREEMPT_RT.
It is not possible to allocate memory with disabled preemption even with
GFP_ATOMIC on PREEMPT_RT.

Move the memory allocation before FPU access is enabled.
To preserve previous "clean" state of "pipes" add a memset() before the
second invocation of dcn20_validate_bandwidth_internal() where the
variable is used.

Acked-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Hamza Mahfooz <hamza.mahfooz@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-10-09 16:48:08 -04:00
Sebastian Andrzej Siewior
941e8036a4 drm/amd/display: Move the memory allocation out of dcn21_validate_bandwidth_fp().
dcn21_validate_bandwidth_fp() is invoked while FPU access has been
enabled. FPU access requires disabling preemption even on PREEMPT_RT.
It is not possible to allocate memory with disabled preemption even with
GFP_ATOMIC on PREEMPT_RT.

Move the memory allocation before FPU access is enabled.

Link: https://bugzilla.kernel.org/show_bug.cgi?id=217928
Acked-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Hamza Mahfooz <hamza.mahfooz@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-10-09 16:47:59 -04:00
Sebastian Andrzej Siewior
80364500c0 drm/amd/display: Add a warning if the FPU is used outside from task context.
Add a warning if the FPU is used from any context other than task
context. This is only precaution since the code is not able to be used
from softirq while the API allows it on x86 for instance.

Acked-by: Harry Wentland <harry.wentland@amd.com>
Reviewed-by: Rodrigo Siqueira <Rodrigo.Siqueira@amd.com>
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Signed-off-by: Hamza Mahfooz <hamza.mahfooz@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-10-09 16:47:37 -04:00
Mario Limonciello
0f0e59075b drm/amd: Fix UBSAN array-index-out-of-bounds for Polaris and Tonga
For pptable structs that use flexible array sizes, use flexible arrays.

Link: https://bugs.launchpad.net/ubuntu/+source/linux/+bug/2036742
Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-10-09 16:47:23 -04:00
Mario Limonciello
c63079c611 drm/radeon: Fix UBSAN array-index-out-of-bounds for Radeon HD 5430
For pptable structs that use flexible array sizes, use flexible arrays.

Suggested-by: Felix Held <felix.held@amd.com>
Link: https://gitlab.freedesktop.org/drm/amd/-/issues/2894
Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-10-09 16:47:08 -04:00
Mario Limonciello
760efbca74 drm/amd: Fix UBSAN array-index-out-of-bounds for SMU7
For pptable structs that use flexible array sizes, use flexible arrays.

Suggested-by: Felix Held <felix.held@amd.com>
Link: https://gitlab.freedesktop.org/drm/amd/-/issues/2874
Signed-off-by: Mario Limonciello <mario.limonciello@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
2023-10-09 16:46:54 -04:00
Linus Walleij
d3c849020b ARM: dts: ixp4xx: Use right restart keycode
The "reset" key on a few IXP4xx routers were sending KEY_ESC
but what we want to send is KEY_RESTART which will make
OpenWrt and similar userspace do a controlled reboot.

Link: https://lore.kernel.org/r/20230908-ixp4xx-dts-v1-2-98d36264ed6d@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-10-09 22:29:42 +02:00
Linus Walleij
2ffdee77f0 ARM: dts: ixp4xx-nslu2: Enable write on flash
To upgrade the firmware and similar, the flash needs write
access.

Link: https://lore.kernel.org/r/20230908-ixp4xx-dts-v1-1-98d36264ed6d@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-10-09 22:29:36 +02:00
Linus Walleij
f71d371ae5 ARM: dts: ixp4xx: Add USRobotics USR8200 device tree
This is a USRobotics NAS/Firewall/router that has been supported
by OpenWrt in the past. It had dedicated users so let's get it
properly supported.

Some debugging and fixing was provided by Howard Harte.

Link: https://lore.kernel.org/r/20231007-ixp4xx-usr8200-v1-1-aded3d6ff6f1@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-10-09 22:26:50 +02:00
Linus Walleij
5b1d4d99d1 ARM: dts: Use only the Linksys compatible for now
The Gemtek users can just use the Linksys device tree,
triplet compatible is overdoing it.

Link: https://lore.kernel.org/r/20231007-ixp4xx-usr8200-v3-3-ec46edd1ff0e@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-10-09 22:25:40 +02:00
Linus Walleij
54b11e2bd1 dt-bindings: arm: List more IXP4xx devices
The ixp4xx bindings are lacking some of the devices we have
out there in the wild, so let's add them.

Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20231007-ixp4xx-usr8200-v3-2-ec46edd1ff0e@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-10-09 22:25:35 +02:00
Linus Walleij
714ff69c33 dt-bindings: Add vendor prefixes
These vendor prefixes are used by some routers supported
by e.g. OpenWrt.

- ADI Engineering is a US telecom equipment company.

- Arcom Controllers is a US manufacturer of repeaters.

- Freecom Gmbh is a german telecom equipment company.

- Gemtek Technology is a Taiwan telecom company.

- Gateway Communications was a telecommunication company,
  now acquired by HKT Limited/PCCW.

- Goramo Gorecki is a privately owned Polish telecom
  company.

- U.S. Robotics Corporation, known through their brand name
  USRobotics is generally referred to as "USR" so use this
  prefix for the company's device tree bindings.

Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20231007-ixp4xx-usr8200-v3-1-ec46edd1ff0e@linaro.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2023-10-09 22:25:28 +02:00
Marcos Paulo de Souza
2531f374f9 Documentation: kselftests: Remove references to bpf tests
Currently the bpf selftests are skipped by default, so is someone would
like to run the tests one would need to run:
  $ make TARGETS=bpf SKIP_TARGETS="" kselftest

To overwrite the SKIP_TARGETS that defines bpf by default. Also,
following the BPF instructions[1], to run the bpf selftests one would
need to enter in the tools/testing/selftests/bpf/ directory, and then
run make, which is not the standard way to run selftests per it's
documentation.

For the reasons above stop mentioning bpf in the kselftests as examples
of how to run a test suite.

[1]: Documentation/bpf/bpf_devel_QA.rst

Signed-off-by: Marcos Paulo de Souza <mpdesouza@suse.com>
Signed-off-by: Shuah Khan <skhan@linuxfoundation.org>
2023-10-09 14:06:17 -06:00
Kristina Martsenko
e0bb80c62c KVM: arm64: Expose MOPS instructions to guests
Expose the Armv8.8 FEAT_MOPS feature to guests in the ID register and
allow the MOPS instructions to be run in a guest. Only expose MOPS if
the whole system supports it.

Note, it is expected that guests do not use these instructions on MMIO,
similarly to other instructions where ESR_EL2.ISV==0 such as LDP/STP.

Signed-off-by: Kristina Martsenko <kristina.martsenko@arm.com>
Reviewed-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20230922112508.1774352-3-kristina.martsenko@arm.com
Signed-off-by: Oliver Upton <oliver.upton@linux.dev>
2023-10-09 19:54:25 +00:00
Kristina Martsenko
2de451a329 KVM: arm64: Add handler for MOPS exceptions
An Armv8.8 FEAT_MOPS main or epilogue instruction will take an exception
if executed on a CPU with a different MOPS implementation option (A or
B) than the CPU where the preceding prologue instruction ran. In this
case the OS exception handler is expected to reset the registers and
restart execution from the prologue instruction.

A KVM guest may use the instructions at EL1 at times when the guest is
not able to handle the exception, expecting that the instructions will
only run on one CPU (e.g. when running UEFI boot services in the guest).
As KVM may reschedule the guest between different types of CPUs at any
time (on an asymmetric system), it needs to also handle the resulting
exception itself in case the guest is not able to. A similar situation
will also occur in the future when live migrating a guest from one type
of CPU to another.

Add handling for the MOPS exception to KVM. The handling can be shared
with the EL0 exception handler, as the logic and register layouts are
the same. The exception can be handled right after exiting a guest,
which avoids the cost of returning to the host exit handler.

Similarly to the EL0 exception handler, in case the main or epilogue
instruction is being single stepped, it makes sense to finish the step
before executing the prologue instruction, so advance the single step
state machine.

Signed-off-by: Kristina Martsenko <kristina.martsenko@arm.com>
Reviewed-by: Marc Zyngier <maz@kernel.org>
Link: https://lore.kernel.org/r/20230922112508.1774352-2-kristina.martsenko@arm.com
Signed-off-by: Oliver Upton <oliver.upton@linux.dev>
2023-10-09 19:54:25 +00:00
Zack Rusin
91398b413d drm/vmwgfx: Keep a gem reference to user bos in surfaces
Surfaces can be backed (i.e. stored in) memory objects (mob's) which
are created and managed by the userspace as GEM buffers. Surfaces
grab only a ttm reference which means that the gem object can
be deleted underneath us, especially in cases where prime buffer
export is used.

Make sure that all userspace surfaces which are backed by gem objects
hold a gem reference to make sure they're not deleted before vmw
surfaces are done with them, which fixes:
------------[ cut here ]------------
refcount_t: underflow; use-after-free.
WARNING: CPU: 2 PID: 2632 at lib/refcount.c:28 refcount_warn_saturate+0xfb/0x150
Modules linked in: overlay vsock_loopback vmw_vsock_virtio_transport_common vmw_vsock_vmci_transport vsock snd_ens1371 snd_ac97_codec ac97_bus snd_pcm gameport>
CPU: 2 PID: 2632 Comm: vmw_ref_count Not tainted 6.5.0-rc2-vmwgfx #1
Hardware name: VMware, Inc. VMware Virtual Platform/440BX Desktop Reference Platform, BIOS 6.00 11/12/2020
RIP: 0010:refcount_warn_saturate+0xfb/0x150
Code: eb 9e 0f b6 1d 8b 5b a6 01 80 fb 01 0f 87 ba e4 80 00 83 e3 01 75 89 48 c7 c7 c0 3c f9 a3 c6 05 6f 5b a6 01 01 e8 15 81 98 ff <0f> 0b e9 6f ff ff ff 0f b>
RSP: 0018:ffffbdc34344bba0 EFLAGS: 00010286
RAX: 0000000000000000 RBX: 0000000000000000 RCX: 0000000000000027
RDX: ffff960475ea1548 RSI: 0000000000000001 RDI: ffff960475ea1540
RBP: ffffbdc34344bba8 R08: 0000000000000003 R09: 65646e75203a745f
R10: ffffffffa5b32b20 R11: 72657466612d6573 R12: ffff96037d6a6400
R13: ffff9603484805b0 R14: 000000000000000b R15: ffff9603bed06060
FS:  00007f5fd8520c40(0000) GS:ffff960475e80000(0000) knlGS:0000000000000000
CS:  0010 DS: 0000 ES: 0000 CR0: 0000000080050033
CR2: 00007f5fda755000 CR3: 000000010d012005 CR4: 00000000003706e0
Call Trace:
 <TASK>
 ? show_regs+0x6e/0x80
 ? refcount_warn_saturate+0xfb/0x150
 ? __warn+0x91/0x150
 ? refcount_warn_saturate+0xfb/0x150
 ? report_bug+0x19d/0x1b0
 ? handle_bug+0x46/0x80
 ? exc_invalid_op+0x1d/0x80
 ? asm_exc_invalid_op+0x1f/0x30
 ? refcount_warn_saturate+0xfb/0x150
 drm_gem_object_handle_put_unlocked+0xba/0x110 [drm]
 drm_gem_object_release_handle+0x6e/0x80 [drm]
 drm_gem_handle_delete+0x6a/0xc0 [drm]
 ? __pfx_vmw_bo_unref_ioctl+0x10/0x10 [vmwgfx]
 vmw_bo_unref_ioctl+0x33/0x40 [vmwgfx]
 drm_ioctl_kernel+0xbc/0x160 [drm]
 drm_ioctl+0x2d2/0x580 [drm]
 ? __pfx_vmw_bo_unref_ioctl+0x10/0x10 [vmwgfx]
 ? do_vmi_munmap+0xee/0x180
 vmw_generic_ioctl+0xbd/0x180 [vmwgfx]
 vmw_unlocked_ioctl+0x19/0x20 [vmwgfx]
 __x64_sys_ioctl+0x99/0xd0
 do_syscall_64+0x5d/0x90
 ? syscall_exit_to_user_mode+0x2a/0x50
 ? do_syscall_64+0x6d/0x90
 ? handle_mm_fault+0x16e/0x2f0
 ? exit_to_user_mode_prepare+0x34/0x170
 ? irqentry_exit_to_user_mode+0xd/0x20
 ? irqentry_exit+0x3f/0x50
 ? exc_page_fault+0x8e/0x190
 entry_SYSCALL_64_after_hwframe+0x6e/0xd8
RIP: 0033:0x7f5fda51aaff
Code: 00 48 89 44 24 18 31 c0 48 8d 44 24 60 c7 04 24 10 00 00 00 48 89 44 24 08 48 8d 44 24 20 48 89 44 24 10 b8 10 00 00 00 0f 05 <41> 89 c0 3d 00 f0 ff ff 7>
RSP: 002b:00007ffd536a4d30 EFLAGS: 00000246 ORIG_RAX: 0000000000000010
RAX: ffffffffffffffda RBX: 00007ffd536a4de0 RCX: 00007f5fda51aaff
RDX: 00007ffd536a4de0 RSI: 0000000040086442 RDI: 0000000000000003
RBP: 0000000040086442 R08: 000055fa603ada50 R09: 0000000000000000
R10: 0000000000000001 R11: 0000000000000246 R12: 00007ffd536a51b8
R13: 0000000000000003 R14: 000055fa5ebb4c80 R15: 00007f5fda90f040
 </TASK>
---[ end trace 0000000000000000 ]---

A lot of the analyis on the bug was done by Murray McAllister and
Ian Forbes.

Reported-by: Murray McAllister <murray.mcallister@gmail.com>
Cc: Ian Forbes <iforbes@vmware.com>
Signed-off-by: Zack Rusin <zackr@vmware.com>
Fixes: a950b989ea ("drm/vmwgfx: Do not drop the reference to the handle too soon")
Cc: <stable@vger.kernel.org> # v6.2+
Reviewed-by: Martin Krastev <krastevm@vmware.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230928041355.737635-1-zack@kde.org
2023-10-09 15:53:30 -04:00
Konstantin Meskhidze
39465cac28 drm/vmwgfx: fix typo of sizeof argument
Since size of 'header' pointer and '*header' structure is equal on 64-bit
machines issue probably didn't cause any wrong behavior. But anyway,
fixing typo is required.

Fixes: 7a73ba7469 ("drm/vmwgfx: Use TTM handles instead of SIDs as user-space surface handles.")
Co-developed-by: Ivanov Mikhail <ivanov.mikhail1@huawei-partners.com>
Signed-off-by: Konstantin Meskhidze <konstantin.meskhidze@huawei.com>
Reviewed-by: Zack Rusin <zackr@vmware.com>
Signed-off-by: Zack Rusin <zackr@vmware.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230905100203.1716731-1-konstantin.meskhidze@huawei.com
2023-10-09 15:53:10 -04:00
Yang Li
253a1d33e5 drm/rockchip: dsi: Use devm_platform_get_and_ioremap_resource()
Convert platform_get_resource(), devm_ioremap_resource() to a single
call to devm_platform_get_and_ioremap_resource(), as this is exactly
what this function does.

Signed-off-by: Yang Li <yang.lee@linux.alibaba.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20230421081303.122452-1-yang.lee@linux.alibaba.com
2023-10-09 21:52:45 +02:00
Zhu Wang
63a06c9fe3 drm/rockchip: remove redundant of_match_ptr
The driver depends on CONFIG_OF, so it is not necessary to use
of_match_ptr here.

Even for drivers that do not depend on CONFIG_OF, it's almost always
better to leave out the of_match_ptr(), since the only thing it can
possibly do is to save a few bytes of .text if a driver can be used both
with and without it. Hence we remove of_match_ptr.

Signed-off-by: Zhu Wang <wangzhu9@huawei.com>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20230731125304.87059-1-wangzhu9@huawei.com
2023-10-09 21:46:36 +02:00
Jim Mattson
591455325a KVM: selftests: Test behavior of HWCR, a.k.a. MSR_K7_HWCR
Verify the following behavior holds true for writes and reads of HWCR from
host userspace:

* Attempts to set bits 3, 6, or 8 are ignored
* Bits 18 and 24 are the only bits that can be set
* Any bit that can be set can also be cleared

Signed-off-by: Jim Mattson <jmattson@google.com>
Link: https://lore.kernel.org/r/20230929230246.1954854-4-jmattson@google.com
Co-developed-by: Sean Christopherson <seanjc@google.com>
Signed-off-by: Sean Christopherson <seanjc@google.com>
2023-10-09 12:37:45 -07:00
Jim Mattson
8b0e00fba9 KVM: x86: Virtualize HWCR.TscFreqSel[bit 24]
On certain CPUs, Linux guests expect HWCR.TscFreqSel[bit 24] to be
set. If it isn't set, they complain:
	[Firmware Bug]: TSC doesn't count with P0 frequency!

Allow userspace (and the guest) to set this bit in the virtual HWCR to
eliminate the above complaint.

Allow the guest to write the bit even though its is R/O on *some* CPUs.
Like many bits in HWRC, TscFreqSel is not architectural at all. On Family
10h[1], it was R/W and powered on as 0. In Family 15h, one of the "changes
relative to Family 10H Revision D processors[2] was:

  • MSRC001_0015 [Hardware Configuration (HWCR)]:
  • Dropped TscFreqSel; TSC can no longer be selected to run at NB P0-state.

Despite the "Dropped" above, that same document later describes
HWCR[bit 24] as follows:

  TscFreqSel: TSC frequency select. Read-only. Reset: 1. 1=The TSC
  increments at the P0 frequency

If the guest clears the bit, the worst case scenario is the guest will be
no worse off than it is today, e.g. the whining may return after a guest
clears the bit and kexec()'s into a new kernel.

[1] https://www.amd.com/content/dam/amd/en/documents/archived-tech-docs/programmer-references/31116.pdf
[2] https://www.amd.com/content/dam/amd/en/documents/archived-tech-docs/programmer-references/42301_15h_Mod_00h-0Fh_BKDG.pdf,
Signed-off-by: Jim Mattson <jmattson@google.com>
Link: https://lore.kernel.org/r/20230929230246.1954854-3-jmattson@google.com
[sean: elaborate on why the bit is writable by the guest]
Signed-off-by: Sean Christopherson <seanjc@google.com>
2023-10-09 12:36:16 -07:00
Jim Mattson
598a790fc2 KVM: x86: Allow HWCR.McStatusWrEn to be cleared once set
When HWCR is set to 0, store 0 in vcpu->arch.msr_hwcr.

Fixes: 191c8137a9 ("x86/kvm: Implement HWCR support")
Signed-off-by: Jim Mattson <jmattson@google.com>
Link: https://lore.kernel.org/r/20230929230246.1954854-2-jmattson@google.com
Signed-off-by: Sean Christopherson <seanjc@google.com>
2023-10-09 12:36:15 -07:00
Christophe JAILLET
44b968d0d0 drm/rockchip: cdn-dp: Fix some error handling paths in cdn_dp_probe()
cdn_dp_audio_codec_init() can fail. So add some error handling.

If component_add() fails, the previous cdn_dp_audio_codec_init() call
should be undone, as already done in the remove function.

Fixes: 88582f5646 ("drm/rockchip: cdn-dp: Don't unregister audio dev when unbinding")
Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patchwork.freedesktop.org/patch/msgid/8494a41602fadb7439630921a9779640698f2f9f.1693676045.git.christophe.jaillet@wanadoo.fr
2023-10-09 21:34:29 +02:00
Mark Brown
3d59c22bbb drm/rockchip: vop2: Convert to use maple tree register cache
The maple tree register cache is based on a much more modern data structure
than the rbtree cache and makes optimisation choices which are probably
more appropriate for modern systems than those made by the rbtree cache.

Signed-off-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20231001-drm-rockchip-maple-v1-1-ca396ab75be7@kernel.org
2023-10-09 21:25:14 +02:00
Michael Tretter
eb23cffdd7 drm/rockchip: vop2: Demote message in mod_supported to drm_dbg_kms
Checking if a modifier is supported by a plane is normal behavior. It is
normal that a plane may not support certain modifiers. Failing the check
doesn't justify an error message in the kernel log and may mislead
users.

Demote the error message to drm_dbg_kms to only print the message if the
respective debug messages are enabled. This is similar to the behavior
in rockchip_drm_vop.c.

Signed-off-by: Michael Tretter <m.tretter@pengutronix.de>
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Link: https://patchwork.freedesktop.org/patch/msgid/20231009103753.830458-1-m.tretter@pengutronix.de
2023-10-09 21:20:04 +02:00
Mark Brown
f0d82f073d
Convert Mediatek ASoC codecs to use GPIO descriptors
Merge series from Linus Walleij <linus.walleij@linaro.org>:

Convert over the Mediatek codecs to use GPIO descriptors.

One few-liner affects gpiolib-of.h, I don't think there
will be conflicts so I suggest that all of this can be
merged through ASoC after review.
2023-10-09 19:51:57 +01:00
Dmitry Baryshkov
506efcba31 drm/msm: carve out KMS code from msm_drv.c
The msm_drv.c contains generic code intermixed with KMS handling code.
Move all KMS-related code to a separate msm_kms.c file, cleaning up init
code while doing this move. This also prevents msm driver from registering
modesetting / atomic interfaces in the headless case.

Reviewed-by: Rob Clark <robdclark@gmail.com>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/561648/
Signed-off-by: Rob Clark <robdclark@chromium.org>
2023-10-09 11:51:48 -07:00
Peter Robinson
112cd2f961 bus: brcmstb_gisb: Depend on SoC specifics over generic arm
Depend on the explicit SoC defines rather than generic
architectures like most of the rest of the HW drivers do.

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Link: https://lore.kernel.org/r/20231009135833.17880-4-pbrobinson@gmail.com
Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2023-10-09 11:51:08 -07:00
Peter Robinson
089d08d7c3 soc: bcm: brcmstb: depend on ARCH_BRCMSTB over arm arches
The SOC_BRCMSTB is better depending on ARCH_BRCMSTB as it's
defined for both arm and aarch64 but is more specific to
the actual SoC's dependencies, it'll still get compile tested.

Signed-off-by: Peter Robinson <pbrobinson@gmail.com>
Link: https://lore.kernel.org/r/20231009135833.17880-2-pbrobinson@gmail.com
Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2023-10-09 11:51:08 -07:00
Kieran Bingham
a21ecc5262 firmware: raspberrypi: Fix devm_rpi_firmware_get documentation
The function documentation for devm_rpi_firmware_get() was missing
a description for the dev parameter.

Provide it and clear the warning produced here.

Fixes: f663204c9a ("firmware: raspberrypi: Introduce devm_rpi_firmware_get()")
Signed-off-by: Kieran Bingham <kieran.bingham@ideasonboard.com>
Link: https://lore.kernel.org/r/20230925151812.142480-1-kieran.bingham+renesas@ideasonboard.com
Signed-off-by: Florian Fainelli <florian.fainelli@broadcom.com>
2023-10-09 11:51:00 -07:00
Dmitry Baryshkov
7d4d6ef708 drm/msm: make fb debugfs file available only in KMS case
Don't register the 'fb' debugfs file, if there is no KMS (and so no
framebuffers).

Reviewed-by: Rob Clark <robdclark@gmail.com>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/561650/
Signed-off-by: Rob Clark <robdclark@chromium.org>
2023-10-09 11:42:36 -07:00
Dmitry Baryshkov
ae13219e47 drm/msm: only register 'kms' debug file if KMS is used
There is little point in having the empty debugfs file which always
returns -ENODEV. Change this file to be created only if KMS is actually
used.

Reviewed-by: Rob Clark <robdclark@gmail.com>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/561656/
Signed-off-by: Rob Clark <robdclark@chromium.org>
2023-10-09 11:42:36 -07:00
Dmitry Baryshkov
eedba1b3a7 drm/msm: switch to drmm_mode_config_init()
Switch to drmm_mode_config_init() instead of drm_mode_config_init().
Drop drm_mode_config_cleanup() calls.

Reviewed-by: Rob Clark <robdclark@gmail.com>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/561654/
Signed-off-by: Rob Clark <robdclark@chromium.org>
2023-10-09 11:42:35 -07:00
Dmitry Baryshkov
937154e49b drm/msm: rename msm_drv_shutdown() to msm_kms_shutdown()
The msm_drv_shutdown function should only be used in the KMS case.
Rename it accordingly.

Reviewed-by: Rob Clark <robdclark@gmail.com>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Patchwork: https://patchwork.freedesktop.org/patch/561652/
Signed-off-by: Rob Clark <robdclark@chromium.org>
2023-10-09 11:42:35 -07:00