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1,463,462 commits

Author SHA1 Message Date
Heiko Carstens
cb3852f3e5 s390/zcore: Use octal permission
Replace symbolic permissions with octal permissions, which are preferred.

Reviewed-by: Christian Borntraeger <borntraeger@linux.ibm.com>
Signed-off-by: Heiko Carstens <hca@linux.ibm.com>
Signed-off-by: Alexander Gordeev <agordeev@linux.ibm.com>
2026-05-26 08:15:40 +02:00
Heiko Carstens
0a2aa995c0 s390/zcore: Removed unused variables
allmodconfig with clang W=1 points out unused global variables:

drivers/s390/char/zcore.c:49:23: error: variable
 'zcore_reipl_file' set but not used [-Werror,-Wunused-but-set-global]
drivers/s390/char/zcore.c:50:23: error: variable
 'zcore_hsa_file' set but not used [-Werror,-Wunused-but-set-global]

Remove both of them, since there is no point in keeping them.

Reviewed-by: Christian Borntraeger <borntraeger@linux.ibm.com>
Signed-off-by: Heiko Carstens <hca@linux.ibm.com>
Signed-off-by: Alexander Gordeev <agordeev@linux.ibm.com>
2026-05-26 08:15:40 +02:00
Heiko Carstens
a3211cad56 s390/sclp: Remove unused sclp_vt220_buffered_chars variable
allmodconfig with clang W=1 points out an unused global variable:

drivers/s390/char/sclp_vt220.c:85:12: error: variable
 'sclp_vt220_buffered_chars' set but not used [-Werror,-Wunused-but-set-global]

Just remove it.

Reviewed-by: Christian Borntraeger <borntraeger@linux.ibm.com>
Signed-off-by: Heiko Carstens <hca@linux.ibm.com>
Signed-off-by: Alexander Gordeev <agordeev@linux.ibm.com>
2026-05-26 08:15:40 +02:00
Heiko Carstens
3f90f58eb7 s390/debug: Remove s390dbf_sysctl_header variable
allmodconfig with clang W=1 points out an unused global variable:

arch/s390/kernel/debug.c:1237:33: error: variable
 's390dbf_sysctl_header' set but not used [-Werror,-Wunused-but-set-global]

Just remove the variable. There is no point in adding error handling for a
failing register_sysctl() call.

Reviewed-by: Christian Borntraeger <borntraeger@linux.ibm.com>
Signed-off-by: Heiko Carstens <hca@linux.ibm.com>
Signed-off-by: Alexander Gordeev <agordeev@linux.ibm.com>
2026-05-26 08:15:39 +02:00
Heiko Carstens
e648e004e4 s390/appldata: Remove unused appldata_sysctl_header variable
allmodconfig with clang W=1 points out an unused global variable:

arch/s390/appldata/appldata_base.c:54:33: error: variable
 'appldata_sysctl_header' set but not used [-Werror,-Wunused-but-set-global]

Just remove the variable. There is no point in adding error handling for a
failing register_sysctl() call.

Acked-by: Christian Borntraeger <borntraeger@linux.ibm.com>
Signed-off-by: Heiko Carstens <hca@linux.ibm.com>
Signed-off-by: Alexander Gordeev <agordeev@linux.ibm.com>
2026-05-26 08:15:39 +02:00
Niklas Schnelle
539b7cf1f7 s390/configs: Enable IOMMUFD and VFIO cdev in defconfigs
Enable IOMMUFD and VFIO cdev such that PCI pass-through to QEMU/KVM can
optionally utilize native IOMMUFD. Note that because the defconfigs do
not enable IOMMUFD_VFIO_CONTAINER the default PCI pass-through using
VFIO with the existing container interface is not affected.

Signed-off-by: Niklas Schnelle <schnelle@linux.ibm.com>
Acked-by: Heiko Carstens <hca@linux.ibm.com>
Acked-by: Matthew Rosato <mjrosato@linux.ibm.com>
Signed-off-by: Alexander Gordeev <agordeev@linux.ibm.com>
2026-05-26 08:05:44 +02:00
Dan Carpenter
44e151be23 accel/ivpu: prevent uninitialized data bug in debugfs
The simple_write_to_buffer() will only initialize data starting from
the *pos offset so if it's non-zero then the first part of the buffer
uninitialized.  Really, if *pos is non-zero then this code won't work
so just check for that at the start of the function.

Fixes: 320323d2e5 ("accel/ivpu: Add debugfs interface for setting HWS priority bands")
Signed-off-by: Dan Carpenter <error27@gmail.com>
Reviewed-by: Karol Wachowski <karol.wachowski@linux.intel.com>
Signed-off-by: Karol Wachowski <karol.wachowski@linux.intel.com>
Link: https://patch.msgid.link/ahP24m6Mii9EDL7Q@stanley.mountain
2026-05-26 08:04:07 +02:00
Takashi Iwai
dd1bfaf941 Revert "ALSA: scarlett2: Fix 2i2 Gen 4 direct monitor gain on firmware 2417"
This reverts commit db37cf47b6.

The fix was needed only for 7.1, while 7.2 devel branch already
received a better fix series (732a6397a526..a895279d060d), hence it's
superfluous.

Link: https://lore.kernel.org/ahUytAir51SvJjd7@m.b4.vu
Link: https://patch.msgid.link/20260526054923.210493-1-tiwai@suse.de
Signed-off-by: Takashi Iwai <tiwai@suse.de>
2026-05-26 08:00:51 +02:00
Cássio Gabriel
3fcc84f1f8 ALSA: seq: Remove arbitrary prioq insertion limit
The sequencer priority queue insertion path uses a hardcoded traversal
limit of 10000 entries.  The value is intended to catch a corrupted list,
but it also becomes a real limit for valid queues.

The event pool limit is per client, while a sequencer queue can be shared
by multiple clients.  A queue can therefore legitimately contain more than
10000 events.  In that case, inserting an event that has to be placed past
the arbitrary limit fails with -EINVAL.

Use the queue's own cell count as the traversal bound instead.  This keeps
the protection against inconsistent list accounting or cyclic lists without
rejecting valid large queues.

Signed-off-by: Cássio Gabriel <cassiogabrielcontato@gmail.com>
Link: https://patch.msgid.link/20260525-alsa-seq-prioq-limit-v1-1-16c348df5ff7@gmail.com
Signed-off-by: Takashi Iwai <tiwai@suse.de>
2026-05-26 07:54:36 +02:00
Zhang Heng
20587302f8 ALSA: hda/realtek: Fix speaker output on ASUS ROG Strix G615LP
Add quirk for ALC294 codec on ASUS ROG Strix G615LP
(SSID 1043:1214) using ALC287_FIXUP_TXNW2781_I2C_ASUS to
fix speaker output.

Link: https://bugzilla.kernel.org/show_bug.cgi?id=221173
Cc: <stable@vger.kernel.org>
Signed-off-by: Zhang Heng <zhangheng@kylinos.cn>
Link: https://patch.msgid.link/20260526013611.1954949-1-zhangheng@kylinos.cn
Signed-off-by: Takashi Iwai <tiwai@suse.de>
2026-05-26 07:52:09 +02:00
Manish Baing
5b5e33c44a dt-bindings: pwm: stmpe: Drop legacy binding
The st,stmpe-pwm binding is already covered by the MFD schema
Documentation/devicetree/bindings/mfd/st,stmpe.yaml. Remove the
obsolete and redundant text binding file.

Signed-off-by: Manish Baing <manishbaing2789@gmail.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://patch.msgid.link/20260523173251.72540-3-manishbaing2789@gmail.com
Signed-off-by: Uwe Kleine-König <ukleinek@kernel.org>
2026-05-26 07:50:42 +02:00
Uwe Kleine-König (The Capable Hub)
ff558108c0 pwm: pca9685: Use named initializers for struct i2c_device_id
While being less compact, using named initializers allows to more easily
see which members of the structs are assigned which value without having
to lookup the declaration of the struct. And it's also more robust
against changes to the struct definition.

This patch doesn't modify the compiled arrays, only their representation
in source form benefits. The former was confirmed with x86 and arm64
builds.

Signed-off-by: Uwe Kleine-König (The Capable Hub) <u.kleine-koenig@baylibre.com>
Link: https://patch.msgid.link/20260518172323.932774-2-u.kleine-koenig@baylibre.com
Signed-off-by: Uwe Kleine-König <ukleinek@kernel.org>
2026-05-26 07:50:42 +02:00
Yixun Lan
74bca0f2d3 pwm: pxa: Add optional bus clock
Add one secondary optional bus clock for the PWM PXA driver, also keep it
compatible with old single clock.

The SpacemiT K3 SoC require a bus clock for PWM controller, acquire and
enable it during probe phase.

Signed-off-by: Yixun Lan <dlan@kernel.org>
Link: https://patch.msgid.link/20260428-03-k3-pwm-drv-v2-2-a532bbe45556@kernel.org
Signed-off-by: Uwe Kleine-König <ukleinek@kernel.org>
2026-05-26 07:50:42 +02:00
Yixun Lan
e7abbff5e8 dt-bindings: pwm: marvell,pxa-pwm: Add SpacemiT K3 PWM support
The PWM controller in SpacemiT K3 SoC reuse the same IP as previous K1
generation, while the difference is that one additional bus clock is
added.

Signed-off-by: Yixun Lan <dlan@kernel.org>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://patch.msgid.link/20260428-03-k3-pwm-drv-v2-1-a532bbe45556@kernel.org
Signed-off-by: Uwe Kleine-König <ukleinek@kernel.org>
2026-05-26 07:50:42 +02:00
Rosen Penev
3c8cec6dda pwm: ipq: Add missing module description
Add a MODULE_DESCRIPTION() entry to fix the modpost warning:

WARNING: modpost: missing MODULE_DESCRIPTION() in drivers/pwm/pwm-ipq.o

Assisted-by: Codex:GPT-5.5
Signed-off-by: Rosen Penev <rosenp@gmail.com>
Fixes: 728796fc4193 ("pwm: Driver for qualcomm ipq6018 pwm block")
Link: https://patch.msgid.link/20260509023609.1007698-1-rosenp@gmail.com
Signed-off-by: Uwe Kleine-König <ukleinek@kernel.org>
2026-05-26 07:50:42 +02:00
Uwe Kleine-König
35ce15049e pwm: stm32: Make use of mul_u64_u64_div_u64_roundup()
When the driver was converted to the waveform API the need for this
function arised but at that time this function didn't exist yet. In the
meantime it's available, so switch to the global function and drop the
driver specific implementation.

Signed-off-by: Uwe Kleine-König <u.kleine-koenig@baylibre.com>
Link: https://patch.msgid.link/788319f0fff963feca4df3c5fcdd471dcf70ccdf.1776264104.git.u.kleine-koenig@baylibre.com
Signed-off-by: Uwe Kleine-König <ukleinek@kernel.org>
2026-05-26 07:50:42 +02:00
Uwe Kleine-König (The Capable Hub)
5ac9b13e3f pwm: Consistently define pci_device_ids using named initializers
The .driver_data member in the various struct pci_device_id arrays were
initialized by list expressions. This isn't easily readable if you're
not into PCI. Using named initializers is more explicit and thus easier
to parse.

The secret plan is to make struct pci_device_id::driver_data an
anonymous union (similar to
https://lore.kernel.org/all/cover.1776579304.git.u.kleine-koenig@baylibre.com/)
and that requires named initializers. But it's also a nice cleanup on
its own.

This change doesn't introduce changes to the compiled pci_device_id
arrays. Tested on x86 and arm64.

Signed-off-by: Uwe Kleine-König (The Capable Hub) <u.kleine-koenig@baylibre.com>
Link: https://patch.msgid.link/20260504085535.1914668-2-u.kleine-koenig@baylibre.com
Signed-off-by: Uwe Kleine-König <ukleinek@kernel.org>
2026-05-26 07:50:42 +02:00
Devi Priya
c436e3e9c2 pwm: Driver for qualcomm ipq6018 pwm block
Driver for the PWM block in Qualcomm IPQ6018 line of SoCs. Based on
driver from downstream Codeaurora kernel tree. Removed support for older
(V1) variants because I have no access to that hardware.

Tested on IPQ5018 and IPQ6010 based hardware.

Co-developed-by: Baruch Siach <baruch.siach@siklu.com>
Signed-off-by: Baruch Siach <baruch.siach@siklu.com>
Signed-off-by: Devi Priya <quic_devipriy@quicinc.com>
Reviewed-by: Bjorn Andersson <andersson@kernel.org>
Signed-off-by: George Moussalem <george.moussalem@outlook.com>
Link: https://patch.msgid.link/20260406-ipq-pwm-v21-2-6ed1e868e4c2@outlook.com
[ukleinek: Fixed a few nitpicks as agreed on the mailing list]
Signed-off-by: Uwe Kleine-König <ukleinek@kernel.org>
2026-05-26 07:50:42 +02:00
Yixun Lan
844c291973 riscv: dts: spacemit: k3: Add pwm support
Populate all pwm device tree nodes for SpacemiT K3 SoC, also documents
the pinctrl info which would easily help to enable them in future.

Link: https://patch.msgid.link/20260521-04-k3-pwm-dts-v4-1-04d4de0f2fc8@kernel.org
Signed-off-by: Yixun Lan <dlan@kernel.org>
2026-05-26 04:26:07 +00:00
Borislav Petkov (AMD)
80501dff81 Documentation/arch/x86: Hide clearcpuid=
This option was never meant to be used in production because it solely
clears the X86_FEATURE kernel-internal representation of what CPUID bits
it has detected and doesn't do any *proper* feature disablement like
clearing CR4.CET in the user shadow stack case, for example.

So remove its documentation so that it doesn't get used in production
and people get silly ideas. It is meant strictly for debugging; and if
a chicken bit for properly disabling a feature is warranted, then that
would need proper enablement.

No functional changes.

Signed-off-by: Borislav Petkov (AMD) <bp@alien8.de>
Signed-off-by: Ingo Molnar <mingo@kernel.org>
Cc: Mathias Krause <minipli@grsecurity.net>
Cc: Linus Torvalds <torvalds@linux-foundation.org>
Link: https://patch.msgid.link/20260520202508.160112-1-bp@kernel.org
2026-05-26 05:37:20 +02:00
Guo Ren (Alibaba DAMO Academy)
11a713db43 RISC-V: KVM: AIA: Make HGEI number management fully per-CPU
Previously, the number of Hypervisor Guest External Interrupt (HGEI)
lines was stored in a single global variable `kvm_riscv_aia_nr_hgei`
and assumed to be the same for all HARTs. This assumption does not
hold on heterogeneous RISC-V SoCs where different cores may expose
different HGEIE CSR widths.

Introduce `nr_hgei` field into the per-CPU `struct aia_hgei_control`
and probe the actual supported HGEI count for the current HART in
`kvm_riscv_aia_enable()` using the standard RISC-V CSR probe technique:

    csr_write(CSR_HGEIE, -1UL);
    nr = fls_long(csr_read(CSR_HGEIE));
    if (nr)
        nr--;

All HGEI allocation, free and disable paths (`kvm_riscv_aia_free_hgei()`,
`kvm_riscv_aia_disable()`, etc.) now use the per-CPU value instead of
the global one.

The global `kvm_riscv_aia_nr_hgei` now represents the minimum number
of HGEI lines across HARTs and can be used to check whether HGEI
support is available or not.

This makes KVM AIA robust on big.LITTLE-style asymmetric platforms.

Signed-off-by: Guo Ren (Alibaba DAMO Academy) <guoren@kernel.org>
Signed-off-by: Anup Patel <anup.patel@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260525094945.3721783-3-anup.patel@oss.qualcomm.com
Signed-off-by: Anup Patel <anup@brainfault.org>
2026-05-26 09:05:10 +05:30
Guo Ren (Alibaba DAMO Academy)
59ebc16276 irqchip/riscv-imsic: Add nr_guest_files in per-HART local config
Add nr_guest_files in per-HART local config to represent the number of
guest files available on a particular HART whereas the nr_guest_files
in the global config represents the number of guest files available
across all HARTs.

This allows KVM RISC-V to use nr_guest_files from per-HART local
config for asymmetric big.Little systems.

Signed-off-by: Guo Ren (Alibaba DAMO Academy) <guoren@kernel.org>
Acked-by: Thomas Gleixner <tglx@kernel.org>
Signed-off-by: Anup Patel <anup.patel@oss.qualcomm.com>
Link: https://lore.kernel.org/r/20260525094945.3721783-2-anup.patel@oss.qualcomm.com
Signed-off-by: Anup Patel <anup@brainfault.org>
2026-05-26 09:05:10 +05:30
Mayuresh Chitale
5eb6d68fe2 RISC-V: KVM: Fix ebreak self test failure
The ebreak self test enables/disables guest debugging as a part of the
test. However the KVM_SET_GUEST_DEBUG ioctl doesn't actually do it.
Fixing it by calling kvm_riscv_vcpu_config_guest_debug.

Fixes: 6ed523e2b6 ("RISC-V: KVM: Factor-out VCPU config into separate sources")
Signed-off-by: Mayuresh Chitale <mayuresh.chitale@oss.qualcomm.com>
Reviewed-by: Anup Patel <anup@brainfault.org>
Link: https://lore.kernel.org/r/20260525095930.3924905-1-mayuresh.chitale@oss.qualcomm.com
Signed-off-by: Anup Patel <anup@brainfault.org>
2026-05-26 09:04:22 +05:30
Adrian Ng Ho Yin
1e7f562058 clk: socfpga: agilex: implement l3_main_free_clk
The AGILEX_L3_MAIN_FREE_CLK is defined in the dt-bindings header but
was never implemented in the clock driver. Per the Agilex TRM,
l3_main_free_clk has no divider or mux and is a fixed 1:1 derivative
of noc_free_clk that clocks most of the interconnect datapath.

Signed-off-by: Adrian Ng Ho Yin <adrian.ho.yin.ng@altera.com>
Signed-off-by: Dinh Nguyen <dinguyen@kernel.org>
2026-05-25 21:46:56 -05:00
Dave Airlie
a97a23ce34 New feature and cleanup for Exynos fbdev
- Move fbdev emulation to DRM client buffers
   . Reuses standard ADDFB2/GEM paths and simplifies cleanup.
 - Use DRM format helpers for geometry and size
   . Applies 4CC-based format/pitch/size calculation with stronger checks and PAGE_SIZE alignment.
   . Sets screen_size and fix.smem_len from actual allocated size.
 
 Exynos DRM internal cleanup
 - Adopt DRM core DMA tracking and drop redundant code
   . Removes private DMA tracking, exynos_drm_gem_prime_import(), and obsolete iommu_dma_init_domain() stub.
 - Reduce duplication and tighten local scope
   . Replaces MAX_FB_BUFFER with DRM_FORMAT_MAX_PLANES.
   . Drops redundant exynos_drm_gem.size and internalizes local-only helpers.
 
 Bug fix for Exynos fbdev behavior
 - Fix screen_buffer offset handling
   . Keeps screen_buffer at framebuffer base and avoids applying scanout offset.
   . Includes Fixes and stable Cc for backporting.
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Merge tag 'exynos-drm-next-for-v7.2' of git://git.kernel.org/pub/scm/linux/kernel/git/daeinki/drm-exynos into drm-next

New feature and cleanup for Exynos fbdev
- Move fbdev emulation to DRM client buffers
  . Reuses standard ADDFB2/GEM paths and simplifies cleanup.
- Use DRM format helpers for geometry and size
  . Applies 4CC-based format/pitch/size calculation with stronger checks and PAGE_SIZE alignment.
  . Sets screen_size and fix.smem_len from actual allocated size.

Exynos DRM internal cleanup
- Adopt DRM core DMA tracking and drop redundant code
  . Removes private DMA tracking, exynos_drm_gem_prime_import(), and obsolete iommu_dma_init_domain() stub.
- Reduce duplication and tighten local scope
  . Replaces MAX_FB_BUFFER with DRM_FORMAT_MAX_PLANES.
  . Drops redundant exynos_drm_gem.size and internalizes local-only helpers.

Bug fix for Exynos fbdev behavior
- Fix screen_buffer offset handling
  . Keeps screen_buffer at framebuffer base and avoids applying scanout offset.
  . Includes Fixes and stable Cc for backporting.

Signed-off-by: Dave Airlie <airlied@redhat.com>

From: Inki Dae <inki.dae@samsung.com>
Link: https://patch.msgid.link/20260521143624.56906-1-inki.dae@samsung.com
2026-05-26 11:01:23 +10:00
Dave Airlie
f12f8a5780 Mediatek DRM Next - 20260521
1. hdmi: Convert DRM_ERROR() to drm_err()
 2. Simplify mtk_crtc allocation
 3. mtk_dpi: Open-code drm_simple_encoder_init()
 4. Convert legacy DRM logging to drm_* helpers in mtk_dsi.c
 5. dsi: Add compatible for mt8167-dsi
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Merge tag 'mediatek-drm-next-20260521' of https://git.kernel.org/pub/scm/linux/kernel/git/chunkuang.hu/linux into drm-next

Mediatek DRM Next - 20260521

1. hdmi: Convert DRM_ERROR() to drm_err()
2. Simplify mtk_crtc allocation
3. mtk_dpi: Open-code drm_simple_encoder_init()
4. Convert legacy DRM logging to drm_* helpers in mtk_dsi.c
5. dsi: Add compatible for mt8167-dsi

Signed-off-by: Dave Airlie <airlied@redhat.com>

From: Chun-Kuang Hu <chunkuang.hu@kernel.org>
Link: https://patch.msgid.link/20260521140841.5103-1-chunkuang.hu@kernel.org
2026-05-26 10:46:58 +10:00
Dave Airlie
57b5fd7cb2 Driver Changes:
- drm/xe/oa: Fix exec_queue leak on width check in stream open (Shuicheng Lin)
 - drm/xe/memirq: Drop cached iosys_map for MEMIRQ status (Michal Wajdeczko)
 - drm/xe/memirq: Drop cached iosys_map for MEMIRQ mask (Michal Wajdeczko)
 - drm/xe/memirq: Dump all source pages if MSI-X (Michal Wajdeczko)
 - drm/xe/memirq: Update diagnostic message (Michal Wajdeczko)
 - drm/xe/memirq: Reduce buffer size (Michal Wajdeczko)
 - drm/xe/memirq: Use IRQ page from HW engine definition (Michal Wajdeczko)
 - drm/xe/memirq: Update GuC initialization and IRQ handler (Michal Wajdeczko)
 - drm/xe/memirq: Make page layout macros private (Michal Wajdeczko)
 - drm/xe: Add IRQ page to HW engine definition (Michal Wajdeczko)
 - drm/xe/guc: Use xe_device_is_l2_flush_optimized() (Gustavo Sousa)
 - drm/xe/multi_queue: Fix secondary queue error case (Niranjana Vishwanathapura)
 - drm/xe/reg_sr: Do sanity check for MCR vs non-MCR (Gustavo Sousa)
 - drm/xe/mcr: Extract reg_in_steering_type_ranges() (Gustavo Sousa)
 - drm/xe/kunit: Use KUNIT_EXPECT_EQ() in xe_wa_gt() (Gustavo Sousa)
 - drm/xe: Extract xe_hw_engine_setup_reg_lrc() (Gustavo Sousa)
 - drm/xe: Define and use MCR version of COMMON_SLICE_CHICKEN4 (Gustavo Sousa)
 - drm/xe: Define and use MCR version of COMMON_SLICE_CHICKEN1 (Gustavo Sousa)
 - drm/xe: Define CACHE_MODE_1 as MCR register (Gustavo Sousa)
 - drm/xe/pf: Fix CFI failure in debugfs access (Mohanram Meenakshisundaram)
 - drm/xe/vf: Fix signature of print functions (Michal Wajdeczko)
 - drm/xe: Make drm_driver const (Michal Wajdeczko)
 - drm/xe/display: Drop xe_display_driver_set_hooks() (Michal Wajdeczko)
 - drm/xe/display: Add macro with display driver features (Michal Wajdeczko)
 - drm/xe/display: Add macro with display driver ops (Michal Wajdeczko)
 - drm/xe/display: Prefer forward declarations (Michal Wajdeczko)
 - drm/xe/display: Drop xe_display_driver_remove() stub (Michal Wajdeczko)
 - drm/xe: Drop unused drm/drm_atomic_helper.h include (Michal Wajdeczko)
 - drm/xe/sriov: Mark NVL as SR-IOV capable (Jakub Kolakowski)
 - drm/xe/gt_idle: Use NSEC_PER_MSEC instead of float literal (Shuicheng Lin)
 - drm/xe/gsc: Fix double-free of managed BO in error path (Shuicheng Lin)
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Merge tag 'drm-xe-next-2026-05-21' of https://gitlab.freedesktop.org/drm/xe/kernel into drm-next

Driver Changes:
- drm/xe/oa: Fix exec_queue leak on width check in stream open (Shuicheng Lin)
- drm/xe/memirq: Drop cached iosys_map for MEMIRQ status (Michal Wajdeczko)
- drm/xe/memirq: Drop cached iosys_map for MEMIRQ mask (Michal Wajdeczko)
- drm/xe/memirq: Dump all source pages if MSI-X (Michal Wajdeczko)
- drm/xe/memirq: Update diagnostic message (Michal Wajdeczko)
- drm/xe/memirq: Reduce buffer size (Michal Wajdeczko)
- drm/xe/memirq: Use IRQ page from HW engine definition (Michal Wajdeczko)
- drm/xe/memirq: Update GuC initialization and IRQ handler (Michal Wajdeczko)
- drm/xe/memirq: Make page layout macros private (Michal Wajdeczko)
- drm/xe: Add IRQ page to HW engine definition (Michal Wajdeczko)
- drm/xe/guc: Use xe_device_is_l2_flush_optimized() (Gustavo Sousa)
- drm/xe/multi_queue: Fix secondary queue error case (Niranjana Vishwanathapura)
- drm/xe/reg_sr: Do sanity check for MCR vs non-MCR (Gustavo Sousa)
- drm/xe/mcr: Extract reg_in_steering_type_ranges() (Gustavo Sousa)
- drm/xe/kunit: Use KUNIT_EXPECT_EQ() in xe_wa_gt() (Gustavo Sousa)
- drm/xe: Extract xe_hw_engine_setup_reg_lrc() (Gustavo Sousa)
- drm/xe: Define and use MCR version of COMMON_SLICE_CHICKEN4 (Gustavo Sousa)
- drm/xe: Define and use MCR version of COMMON_SLICE_CHICKEN1 (Gustavo Sousa)
- drm/xe: Define CACHE_MODE_1 as MCR register (Gustavo Sousa)
- drm/xe/pf: Fix CFI failure in debugfs access (Mohanram Meenakshisundaram)
- drm/xe/vf: Fix signature of print functions (Michal Wajdeczko)
- drm/xe: Make drm_driver const (Michal Wajdeczko)
- drm/xe/display: Drop xe_display_driver_set_hooks() (Michal Wajdeczko)
- drm/xe/display: Add macro with display driver features (Michal Wajdeczko)
- drm/xe/display: Add macro with display driver ops (Michal Wajdeczko)
- drm/xe/display: Prefer forward declarations (Michal Wajdeczko)
- drm/xe/display: Drop xe_display_driver_remove() stub (Michal Wajdeczko)
- drm/xe: Drop unused drm/drm_atomic_helper.h include (Michal Wajdeczko)
- drm/xe/sriov: Mark NVL as SR-IOV capable (Jakub Kolakowski)
- drm/xe/gt_idle: Use NSEC_PER_MSEC instead of float literal (Shuicheng Lin)
- drm/xe/gsc: Fix double-free of managed BO in error path (Shuicheng Lin)

Signed-off-by: Dave Airlie <airlied@redhat.com>

From: Thomas Hellstrom <thomas.hellstrom@linux.intel.com>
Link: https://patch.msgid.link/ag9RLujZiYYnSc_F@fedora
2026-05-26 09:11:14 +10:00
Luka Gejak
f229426072 net: hsr: fix potential OOB access in supervision frame handling
Ensure the entire TLV header is linearized before access by adding
sizeof(struct hsr_sup_tlv) to the pskb_may_pull() calls. Without this,
a truncated frame could cause an out-of-bounds access.

Fixes: eafaa88b3e ("net: hsr: Add support for redbox supervision frames")
Signed-off-by: Luka Gejak <luka.gejak@linux.dev>
Reviewed-by: Fernando Fernandez Mancera <fmancera@suse.de>
Link: https://patch.msgid.link/20260523130330.61880-1-luka.gejak@linux.dev
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-05-25 14:18:15 -07:00
Len Bao
3baa7ba4ab eth: dpaa2: constify dpaa2_ethtool_stats and dpaa2_ethtool_extras
The 'dpaa2_ethtool_stats' and 'dpaa2_ethtool_extras' structures are
initialized in their declarations and never changed. So, constify them
to reduce the attack surface.

Before the patch (size dpaa2-ethtool.o):

   text	   data	    bss	    dec	    hex
  33433	   5992	      0	  39425	   9a01

After the patch (size dpaa2-ethtool.o):

   text	   data	    bss	    dec	    hex
  34937	   4488	      0	  39425	   9a01

Signed-off-by: Len Bao <len.bao@gmx.us>
Reviewed-by: Ioana Ciornei <ioana.ciornei@nxp.com>
Link: https://patch.msgid.link/20260523150737.36988-1-len.bao@gmx.us
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-05-25 14:17:40 -07:00
Rosen Penev
da91508bdd net: ibm: emac: Use napi_gro_receive() for Rx packets
emac_poll_rx() already runs in NAPI context and TAH-equipped EMACs set
CHECKSUM_UNNECESSARY on verified frames, which lets GRO coalesce TCP
segments without a software checksum on the merge path. Replace the
per-poll rx_list batched with netif_receive_skb_list() with direct
napi_gro_receive() calls so the stack can merge segments into super-skbs
and skip a full traversal per packet -- a meaningful win on the slow
4xx-class CPUs this driver targets.

Small routing speed improvement tested on a Cisco Meraki MX60W:

Tested with iperf3

Before:

[ ID] Interval           Transfer     Bitrate         Retr
[  5]   0.00-10.00  sec   494 MBytes   414 Mbits/sec  839             sender
[  5]   0.00-10.04  sec   492 MBytes   411 Mbits/sec                  receiver

After:

[ ID] Interval           Transfer     Bitrate         Retr
[  5]   0.00-10.00  sec   510 MBytes   428 Mbits/sec  580             sender
[  5]   0.00-10.04  sec   508 MBytes   424 Mbits/sec                  receiver

Traffic to and from the router seems to be slow no matter what:

Tested with iperf3 --bidir

Before:

[ ID][Role] Interval           Transfer     Bitrate         Retr
[  8][TX-C]   0.00-10.00  sec   297 MBytes   249 Mbits/sec   35            sender
[  8][TX-C]   0.00-10.00  sec   293 MBytes   245 Mbits/sec                  receiver
[ 10][RX-C]   0.00-10.00  sec   184 MBytes   154 Mbits/sec    0            sender
[ 10][RX-C]   0.00-10.00  sec   184 MBytes   154 Mbits/sec                  receiver

After:

[ ID][Role] Interval           Transfer     Bitrate         Retr
[  8][TX-C]   0.00-10.00  sec   295 MBytes   248 Mbits/sec   31            sender
[  8][TX-C]   0.00-10.00  sec   294 MBytes   246 Mbits/sec                  receiver
[ 10][RX-C]   0.00-10.00  sec   181 MBytes   152 Mbits/sec    0            sender
[ 10][RX-C]   0.00-10.00  sec   181 MBytes   152 Mbits/sec                  receiver

Signed-off-by: Rosen Penev <rosenp@gmail.com>
Link: https://patch.msgid.link/20260521215908.257118-1-rosenp@gmail.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-05-25 14:12:01 -07:00
Jakub Kicinski
0e235b1055 Merge branch 'octeontx2-af-npc-enhancements'
Ratheesh Kannoth says:

====================
octeontx2-af: npc: Enhancements. [part]

Patch 1 reduces stack usage in mlx5e_pcie_cong_get_thresh_config()
by reusing a single union devlink_param_value across four
devl_param_driverinit_value_get() calls (instead of
union devlink_param_value val[4] on the stack) and assigning each
vu16 into mlx5e_pcie_cong_thresh, so the helper stays under the
frame-size warning limit as the union grows.

Patch 2 changes devlink_nl_param_value_put() and
devlink_nl_param_value_fill_one() to pass union devlink_param_value
by pointer instead of by value. Passing two copies of the union
by value in the param netlink path consumes over 500 bytes of argument
stack and risks CONFIG_FRAME_WARN as the union grows beyond its
historical size.
====================

Picking a couple of uncontroversial changes from the series
since it's making very slow progress.

Link: https://patch.msgid.link/20260521095303.2395584-1-rkannoth@marvell.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-05-25 14:04:28 -07:00
Ratheesh Kannoth
d603517771 devlink: pass param values by pointer
union devlink_param_value grows substantially once U64 array
parameters are added to devlink (from 32 bytes to over 264 bytes).
devlink_nl_param_value_fill_one() and devlink_nl_param_value_put()
copy the union by value in several places. Passing two instances as
value arguments alone consumes over 528 bytes of stack; combined with
deeper call chains the parameter stack can approach 800 bytes and trip
CONFIG_FRAME_WARN more easily.

Switch internal helpers and exported driver APIs to pass pointers to
union devlink_param_value rather than passing the union by value.

Reviewed-by: Petr Machata <petrm@nvidia.com> # for mlxsw
Acked-by: Przemek Kitszel <przemyslaw.kitszel@intel.com>
Reviewed-by: Arthur Kiyanovski <akiyano@amazon.com> #for ena
Signed-off-by: Ratheesh Kannoth <rkannoth@marvell.com>
Link: https://patch.msgid.link/20260521095303.2395584-4-rkannoth@marvell.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-05-25 14:03:06 -07:00
Ratheesh Kannoth
e57516529a net/mlx5e: Reduce stack use reading PCIe congestion thresholds
union devlink_param_value grew when U64 array parameters were added.
Keeping union devlink_param_value val[4] in
mlx5e_pcie_cong_get_thresh_config() exceeded the compiler's
-Wframe-larger-than limit.

Reuse one union: call devl_param_driverinit_value_get() once per
MLX5 PCIe congestion threshold and assign each vu16 to the
corresponding mlx5e_pcie_cong_thresh member.

Reviewed-by: Dragos Tatulea <dtatulea@nvidia.com>
Signed-off-by: Ratheesh Kannoth <rkannoth@marvell.com>
Link: https://patch.msgid.link/20260521095303.2395584-3-rkannoth@marvell.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-05-25 14:03:06 -07:00
Dave Airlie
40149d887c Merge tag 'drm-misc-next-2026-05-21' of https://gitlab.freedesktop.org/drm/misc/kernel into drm-next
drm-misc-next for v7.2-rc1:

UAPI Changes:
- Add VIRTIO_GPU_F_BLOB_ALIGNMENT flag.

Cross-subsystem Changes:
- Add common TMDS character rate constants to video/hdmi and use those
  in bridge drivers.

Core Changes:
- Fix leak in drm_syncobj_find_fence.
- Fix OOB reads related to DP-MST.
- Create drm_get_bridge_by_endpoint and convert drivers to use it in
  preparation of hotplug.

Driver Changes:
- Assorted bugfixes and cleanups to accel/ethosu, imagination, virtio,
  rockchip.
- Expandable device heap support to amdxdna, bridge/chipone-icn6211.
- Add Surface Pro 12 panels.
- Convert ite-it6211 to use drm hdmi audio helpers.

Signed-off-by: Dave Airlie <airlied@redhat.com>
From: Maarten Lankhorst <maarten.lankhorst@linux.intel.com>
Link: https://patch.msgid.link/f4034e3c-8290-49e1-9410-dc1f449265f4@linux.intel.com
2026-05-26 06:51:31 +10:00
Jakub Kicinski
bfea46abf6 Merge branch 'net-mlx5-add-satellite-pf-support'
Tariq Toukan says:

====================
net/mlx5: Add satellite PF support

A satellite PF is a new SmartNIC configuration that adds another
physical function on the DPU that is not an eswitch manager and not a
page manager. The satellite PF can have its own SFs and can be passed
through to a VM on the DPU, providing an isolated function for users who
should not have access to the privileged ECPF. The ECPF handles the
satellite PF and the host PF in a similar way, using the same management
framework.

This series adds support for satellite PFs (SPFs) in the mlx5 eswitch.
SPFs are discovered through the v1 response layout of the
query_esw_functions command, introduced in the previous infrastructure
preparation series.

The first four patches discover satellite PFs, allocate eswitch vports
for them and their SFs, and extend the SF hardware table to manage SPF
SF entries.

The next five patches expose PF numbers from firmware, map SF
controllers to their pfnum, register devlink ports with proper
attributes, and register SF resource on satellite PF ports.

The final four patches add devlink port state management, FDB peer miss
rules, dedicated page accounting, and SF resource registration for
satellite PF vports.

This series builds on the eswitch infrastructure preparation series
previously submitted.
====================

Link: https://patch.msgid.link/20260521110843.367329-1-tariqt@nvidia.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-05-25 13:48:52 -07:00
Moshe Shemesh
ea0dada719 net/mlx5: Add SPF function type for page management
Add MLX5_SPF to enum mlx5_func_type so SPFs get their own page counter,
and add the corresponding WARN check at page cleanup. Wait for SPF pages
to be reclaimed during ECPF teardown, alongside the existing host PF and
VF page waits.

SPF page requests are always identified by vhca_id, so the legacy
func_id_to_type() path is not reached for satellite PFs.

Signed-off-by: Moshe Shemesh <moshe@nvidia.com>
Signed-off-by: Tariq Toukan <tariqt@nvidia.com>
Link: https://patch.msgid.link/20260521110843.367329-13-tariqt@nvidia.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-05-25 13:48:51 -07:00
Moshe Shemesh
652be53b37 net/mlx5: Add FDB peer miss rules for satellite PFs
Add satellite PF (SPF) vports to the FDB peer miss rules flow.
Introduce mlx5_esw_for_each_spf_vport() macro to iterate SPF vports.

Signed-off-by: Moshe Shemesh <moshe@nvidia.com>
Signed-off-by: Tariq Toukan <tariqt@nvidia.com>
Link: https://patch.msgid.link/20260521110843.367329-12-tariqt@nvidia.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-05-25 13:48:51 -07:00
Moshe Shemesh
425ac0e7a6 net/mlx5: Support state get/set for satellite PF ports
Extend mlx5_devlink_pf_port_fn_state_get() to support satellite PF
vports by querying their vhca_state from the query_esw_functions output
using the vport's vhca_id.

Extend mlx5_devlink_pf_port_fn_state_set() to support satellite PFs by
using the generic mlx5_esw_pf_enable/disable_hca() functions.

Signed-off-by: Moshe Shemesh <moshe@nvidia.com>
Signed-off-by: Tariq Toukan <tariqt@nvidia.com>
Link: https://patch.msgid.link/20260521110843.367329-11-tariqt@nvidia.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-05-25 13:48:51 -07:00
Or Har-Toov
ac338d8011 net/mlx5: Register SF resource on satellite PF ports
Extend port-level resource registration to satellite PF vports.

Signed-off-by: Or Har-Toov <ohartoov@nvidia.com>
Signed-off-by: Tariq Toukan <tariqt@nvidia.com>
Link: https://patch.msgid.link/20260521110843.367329-10-tariqt@nvidia.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-05-25 13:48:51 -07:00
Moshe Shemesh
e020a70672 net/mlx5: Register devlink ports for satellite PFs
Include satellite PFs in mlx5_eswitch_is_pf_vf_vport() so they receive
the standard PF/VF devlink port operations. Update
mlx5_esw_devlink_port_supported() and devlink port attribute setup to
register SPF devlink ports with controller number and PF number.

Add mlx5_esw_spf_vport_to_idx() to look up the SPF array index by vport
number, and mlx5_esw_is_spf_vport() boolean wrapper to identify
satellite PF vports.

Signed-off-by: Moshe Shemesh <moshe@nvidia.com>
Signed-off-by: Tariq Toukan <tariqt@nvidia.com>
Link: https://patch.msgid.link/20260521110843.367329-9-tariqt@nvidia.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-05-25 13:48:51 -07:00
Moshe Shemesh
90a6aabb74 net/mlx5: Map SF controller to pfnum for satellite PFs
SF devlink port creation and registration used the ECPF's PCI function
as pfnum. Extend this to support satellite PF controllers by introducing
mlx5_esw_sf_controller_to_pfnum() that maps a controller number to the
corresponding PF number, and use it in SF port attribute setup and SF
creation validation.

Reorder the checks in mlx5_devlink_sf_port_new() so that
mlx5_sf_table_supported() runs before attribute validation, since the
new helper requires the eswitch to be initialized.

Signed-off-by: Moshe Shemesh <moshe@nvidia.com>
Signed-off-by: Tariq Toukan <tariqt@nvidia.com>
Link: https://patch.msgid.link/20260521110843.367329-8-tariqt@nvidia.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-05-25 13:48:51 -07:00
Moshe Shemesh
0b43d2b76c net/mlx5: Expose PF number from query_esw_functions
Extract pci_device_function from the query_esw_functions output for both
the host PF and satellite PFs, storing it alongside the existing
host_number field.

Add mlx5_esw_get_hpf_pf_num() helper that returns the host PF's actual
PCI device function when the new query format is supported, falling back
to PCI_FUNC(dev->pdev->devfn) for older firmware. Use it in devlink port
attribute setup so that host PF and VF devlink ports report the correct
PF number rather than the ECPF's own PCI function number.

Signed-off-by: Moshe Shemesh <moshe@nvidia.com>
Signed-off-by: Tariq Toukan <tariqt@nvidia.com>
Link: https://patch.msgid.link/20260521110843.367329-7-tariqt@nvidia.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-05-25 13:48:51 -07:00
Moshe Shemesh
beca1cd919 net/mlx5: Support SPF SFs in SF hardware table
Convert the SF hardware table from a fixed-size hwc array to a
dynamically allocated one, supporting satellite PF (SPF) SFs alongside
local and external host SFs. Initialize hwc entries for each SPF using
its host_number as controller. Rename MLX5_SF_HWC_EXTERNAL to
MLX5_SF_HWC_EXT_HOST and add MLX5_SF_HWC_FIRST_SPF for clarity.

Signed-off-by: Moshe Shemesh <moshe@nvidia.com>
Signed-off-by: Tariq Toukan <tariqt@nvidia.com>
Link: https://patch.msgid.link/20260521110843.367329-6-tariqt@nvidia.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-05-25 13:48:51 -07:00
Moshe Shemesh
7aed78522d net/mlx5: Initialize satellite PF SF vports
Extend satellite PF (SPF) initialization to allocate SF vports for each
SPF. For each discovered SPF, query its SF capabilities, allocate SF
vports, and store the host_number for controller identification.

Add accessor APIs mlx5_esw_get_num_spfs(),
mlx5_esw_spf_get_host_number(), mlx5_esw_sf_max_spf_functions(), and
mlx5_esw_has_spf_sfs() for use by the SF hardware table in a subsequent
patch. Also extend mlx5_esw_offloads_controller_valid() to accept SPF
controllers in addition to the host PF controller.

Signed-off-by: Moshe Shemesh <moshe@nvidia.com>
Signed-off-by: Tariq Toukan <tariqt@nvidia.com>
Link: https://patch.msgid.link/20260521110843.367329-5-tariqt@nvidia.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-05-25 13:48:51 -07:00
Moshe Shemesh
171b7fb59f net/mlx5: Initialize host PF host number earlier
Move host_number from esw->offloads to esw->esw_funcs as hpf_host_number
and initialize it during vports_init instead of offloads_enable. This
makes the host PF host number available earlier in the initialization
sequence, which is required for upcoming SF hardware table support for
satellite PFs.

Add a mlx5_esw_get_hpf_host_number() accessor to retrieve the stored
host number.

Signed-off-by: Moshe Shemesh <moshe@nvidia.com>
Signed-off-by: Tariq Toukan <tariqt@nvidia.com>
Link: https://patch.msgid.link/20260521110843.367329-4-tariqt@nvidia.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-05-25 13:48:51 -07:00
Moshe Shemesh
69978da9bb net/mlx5: Introduce generic helper for PF SFs info
Introduce mlx5_esw_sf_max_pf_functions() that queries a PF's max_num_sf
and sf_base_id using mlx5_vport_get_other_func_general_cap(), which
supports both function_id and vhca_id based addressing.

Refactor mlx5_esw_sf_max_hpf_functions() into a thin wrapper that adds
the host PF precondition checks and calls the new generic helper. Remove
mlx5_query_hca_cap_host_pf() as it is not used anymore.

This prepares for querying SFs info of Satellite PFs.

Signed-off-by: Moshe Shemesh <moshe@nvidia.com>
Signed-off-by: Tariq Toukan <tariqt@nvidia.com>
Link: https://patch.msgid.link/20260521110843.367329-3-tariqt@nvidia.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-05-25 13:48:51 -07:00
Moshe Shemesh
ed9671b8bd net/mlx5: Add satellite PF vport support
Discover satellite PFs from query_esw_functions output and allocate
eswitch vports for them. For each satellite PF, create a vport via the
CREATE_ESW_VPORT command using its vhca_id and allocate it in the
eswitch vport table.

When enabling switchdev mode, the ECPF acting as the eswitch manager
activates each satellite PF with enable_hca, loads its vport and adds
a representor. Since satellite PF devlink ports are registered in a
later patch, guard mlx5_esw_offloads_devlink_port() against vports
with no devlink port to avoid NULL dereference during representor
attach.

Signed-off-by: Moshe Shemesh <moshe@nvidia.com>
Signed-off-by: Tariq Toukan <tariqt@nvidia.com>
Link: https://patch.msgid.link/20260521110843.367329-2-tariqt@nvidia.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
2026-05-25 13:48:51 -07:00
Costa Shulyupin
d7391997ea docs: sysctl/net: Remove ax25, netrom, rose entries
These networking subsystems were removed in commit dd8d4bc28a
("net: remove ax25 and amateur radio (hamradio) subsystem"),
but the sysctl directory table still listed them.

Assisted-by: Claude:claude-opus-4-6
Signed-off-by: Costa Shulyupin <costa.shul@redhat.com>
Acked-by: Randy Dunlap <rdunlap@infradead.org>
Signed-off-by: Jonathan Corbet <corbet@lwn.net>
Message-ID: <20260515180200.1490926-1-costa.shul@redhat.com>
2026-05-25 14:31:44 -06:00
Daniel Pereira
1af866584f docs: pt_BR: update minimal software requirements in changes.rst
Update the Brazilian Portuguese translation of changes.rst to align with
the latest English version.

Key changes include:
- Updated minimum versions for Rust (1.85.0), bindgen (0.71.1), and
  pahole (1.22).
- Fixed ReST syntax for internal references (:ref:) and external links.
- Corrected formatting for tool names and config options using inline
  code backticks.
- Synchronized technical descriptions for udev, kmod, and NFS-utils.

v2:
- Fix alignment in the minimal software requirements table that broke the build.
- Fix Sphinx footnote syntax.

Signed-off-by: Daniel Pereira <danielmaraboo@gmail.com>
Signed-off-by: Jonathan Corbet <corbet@lwn.net>
Message-ID: <20260515182200.654324-1-danielmaraboo@gmail.com>
2026-05-25 14:29:44 -06:00
Akiyoshi Kurita
04dba9d9b2 docs/ja_JP: translate more of submitting-patches.rst (no-mime)
Translate the "No MIME, no links, no compression, no attachments.
Just plain text" and "Respond to review comments" sections in
Documentation/translations/ja_JP/process/submitting-patches.rst.

Keep the wording close to the English text and wrap lines to match
the style used in the surrounding Japanese translation.

Signed-off-by: Akiyoshi Kurita <weibu@redadmin.org>
Acked-by: Akira Yokosawa <akiyks@gmail.com>
Signed-off-by: Jonathan Corbet <corbet@lwn.net>
Message-ID: <20260513131111.432772-1-weibu@redadmin.org>
2026-05-25 14:29:01 -06:00