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1,385,397 commits

Author SHA1 Message Date
FUJITA Tomonori
8ad470d4e3 riscv/bug: Add ARCH_WARN_ASM macro for BUG/WARN asm code sharing with Rust
Add new ARCH_WARN_ASM macro for BUG/WARN assembly code sharing with
Rust to avoid the duplication.

No functional changes.

Acked-by: Alexandre Ghiti <alexghiti@rivosinc.com>
Signed-off-by: FUJITA Tomonori <fujita.tomonori@gmail.com>
Link: https://lore.kernel.org/r/20250502094537.231725-3-fujita.tomonori@gmail.com
[ Remove ending newline in `ARCH_WARN_ASM` content to be closer to the
  original. - Miguel ]
Signed-off-by: Miguel Ojeda <ojeda@kernel.org>
2025-07-23 00:04:53 +02:00
FUJITA Tomonori
8c8efa93db x86/bug: Add ARCH_WARN_ASM macro for BUG/WARN asm code sharing with Rust
Add new ARCH_WARN_ASM macro for BUG/WARN assembly code sharing with
Rust to avoid the duplication.

No functional changes.

Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Signed-off-by: FUJITA Tomonori <fujita.tomonori@gmail.com>
Link: https://lore.kernel.org/r/20250502094537.231725-2-fujita.tomonori@gmail.com
[ Fixed typo in macro parameter name. - Miguel ]
Signed-off-by: Miguel Ojeda <ojeda@kernel.org>
2025-07-22 23:58:55 +02:00
Moon Hee Lee
661e9cd196 selftests/kexec: fix test_kexec_jump build
The test_kexec_jump program builds correctly when invoked from the top-level
selftests/Makefile, which explicitly sets the OUTPUT variable. However,
building directly in tools/testing/selftests/kexec fails with:

  make: *** No rule to make target '/test_kexec_jump', needed by 'test_kexec_jump.sh'.  Stop.

This failure occurs because the Makefile rule relies on $(OUTPUT), which is
undefined in direct builds.

Fix this by listing test_kexec_jump in TEST_GEN_PROGS, the standard way to
declare generated test binaries in the kselftest framework. This ensures the
binary is built regardless of invocation context and properly removed by
make clean.

Link: https://lore.kernel.org/r/20250702171704.22559-2-moonhee.lee.ca@gmail.com
Acked-by: Shuah Khan <skhan@linuxfoundation.org>
Signed-off-by: Moon Hee Lee <moonhee.lee.ca@gmail.com>
Acked-by: Baoquan He <bhe@redhat.com>
Acked-by: David Woodhouse <dwmw@amazon.co.uk>
Signed-off-by: Shuah Khan <skhan@linuxfoundation.org>
2025-07-22 15:10:52 -06:00
Arnd Bergmann
cd7dace093 Apple SoC device tree changes for v6.17
- Added the bindings and nodes for Apple SoC GPU. The driver itself
   isn't ready for upstreaming yet due to rust dependencies but we're
   confident that the bindings are stable at this point.
 - Added a missing node for the touchbar framebuffer to Apple T2 device
   trees, which is the BMC for some x86 Macs
 - Fixed a W=1 warning by adding bit offsets to NVMEM node names. This
   required a change to the generic NVMEM cell binding which will be part
   of 6.17 through the NVMEM tree.
 
 Signed-off-by: Sven Peter <sven@kernel.org>
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Merge tag 'apple-soc-dt-6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/sven/linux into soc/dt

Apple SoC device tree changes for v6.17

- Added the bindings and nodes for Apple SoC GPU. The driver itself
  isn't ready for upstreaming yet due to rust dependencies but we're
  confident that the bindings are stable at this point.
- Added a missing node for the touchbar framebuffer to Apple T2 device
  trees, which is the BMC for some x86 Macs
- Fixed a W=1 warning by adding bit offsets to NVMEM node names. This
  required a change to the generic NVMEM cell binding which will be part
  of 6.17 through the NVMEM tree.

Signed-off-by: Sven Peter <sven@kernel.org>

* tag 'apple-soc-dt-6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/sven/linux:
  arm64: dts: apple: Add Apple SoC GPU
  dt-bindings: gpu: Add Apple SoC GPU
  arm64: dts: apple: t8012-j132: Include touchbar framebuffer node
  arm64: dts: apple: Add bit offset to PMIC NVMEM node names

Link: https://lore.kernel.org/r/20250722163258.62424-2-sven@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-07-22 23:03:11 +02:00
Arnd Bergmann
dc56e105c5 Microchip AT91 device tree updates for v6.17
This update includes:
 - controllers enabled for SAMA7D65 SoC (crypto controllers, PWM, CAN)
 - controllers enabled for SAM9X7 SoC (LCD, LVDS)
 - cache configuration updates for SAMA5D2, SAMA5D3, SAMA5D4, SAMA7G5,
   SAMA7D65
 - cleanups
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Merge tag 'at91-dt-6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into soc/dt

Microchip AT91 device tree updates for v6.17

This update includes:
- controllers enabled for SAMA7D65 SoC (crypto controllers, PWM, CAN)
- controllers enabled for SAM9X7 SoC (LCD, LVDS)
- cache configuration updates for SAMA5D2, SAMA5D3, SAMA5D4, SAMA7G5,
  SAMA7D65
- cleanups

* tag 'at91-dt-6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux: (22 commits)
  ARM: dts: microchip: sama7g5: Add cache configuration for cpu node
  ARM: dts: microchip: sama7d65: Add cache configuration for cpu node
  ARM: dts: microchip: sama5d4: Update the cache configuration for CPU
  ARM: dts: microchip: sama5d3: Update the cache configuration for CPU
  ARM: dts: microchip: sama5d2: Update the cache configuration for CPU
  ARM: dts: microchip: sam9x7: Add LVDS controller
  ARM: dts: microchip: sama5d2_icp: rename spi-cs-setup-ns property to spi-cs-setup-delay-ns
  ARM: dts: microchip: sama5d27_wlsom1: rename spi-cs-setup-ns property to spi-cs-setup-delay-ns
  ARM: dts: microchip: sama5d27_som1: rename spi-cs-setup-ns property to spi-cs-setup-delay-ns
  ARM: dts: microchip: sam9x60ek: rename spi-cs-setup-ns property to spi-cs-setup-delay-ns
  ARM: dts: at91-sama5d27_wlsom1: Improve the Wifi compatible
  ARM: dts: microchip: gardena-smart-gateway: Fix power LED
  ARM: dts: microchip: sam9x7: Add clock name property
  ARM: dts: microchip: sama7d65: Add clock name property
  ARM: dts: microchip: sama7g5: Adjust clock xtal phandle
  ARM: dts: microchip: sam9x7: Add HLCD controller
  ARM: dts: microchip: sama7d65: Enable CAN bus
  ARM: dts: microchip: sama7d65: Clean up extra space
  ARM: dts: microchip: sama7d65: Add CAN bus support
  ARM: dts: microchip: sama7d65: Add PWM support
  ...

Link: https://lore.kernel.org/r/20250721100904.568575-2-claudiu.beznea@tuxon.dev
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-07-22 23:02:24 +02:00
Arnd Bergmann
95e4ade2b7 T-HEAD Devicetrees for v6.17
There are several additions for the T-Head TH1520 SoC:
 
  - Add PVT node for thermal sensor which works with the existing Moortec
    MR75203 driver.
  - Add "gpu-clkgen" reset property to the AON node which allows the power
    domain driver to detect the capability to power sequence the GPU.
 
 All of these patches have been tested in linux-next.
 
 Signed-off-by: Drew Fustini <fustini@kernel.org>
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Merge tag 'thead-dt-for-v6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/fustini/linux into soc/dt

T-HEAD Devicetrees for v6.17

There are several additions for the T-Head TH1520 SoC:

 - Add PVT node for thermal sensor which works with the existing Moortec
   MR75203 driver.
 - Add "gpu-clkgen" reset property to the AON node which allows the power
   domain driver to detect the capability to power sequence the GPU.

All of these patches have been tested in linux-next.

Signed-off-by: Drew Fustini <fustini@kernel.org>

* tag 'thead-dt-for-v6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/fustini/linux:
  riscv: dts: thead: Add PVT node
  riscv: dts: thead: th1520: Add GPU clkgen reset to AON node

Link: https://lore.kernel.org/r/aHtnwthmTpfkIBMr@x1
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-07-22 23:01:36 +02:00
Arnd Bergmann
dd9f821369 New board: FriendlyElec NanoPi M5
Camera support for the PinePhone Pro.
 A bunch of cleanups to make DTC happier, fix ordering of DMA uart
 channels on rk3528 and some video output enablement as well as some
 button definitions.
 An interesting tidbit is the reset behaviour addition in that some
 boards have specific requirements as to how the PMIC needs to do the
 restart. DT-maintainers did not consider the header with helper-constants
 as part of the binding, so that header ended up in the Rockchip directory
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Merge tag 'v6.17-rockchip-dts64-2' of https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into soc/dt

New board: FriendlyElec NanoPi M5
Camera support for the PinePhone Pro.
A bunch of cleanups to make DTC happier, fix ordering of DMA uart
channels on rk3528 and some video output enablement as well as some
button definitions.
An interesting tidbit is the reset behaviour addition in that some
boards have specific requirements as to how the PMIC needs to do the
restart. DT-maintainers did not consider the header with helper-constants
as part of the binding, so that header ended up in the Rockchip directory

* tag 'v6.17-rockchip-dts64-2' of https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: (29 commits)
  arm64: dts: rockchip: Add maskrom button to NanoPi R5S + R5C
  arm64: dts: rockchip: Drop regulator-compatible property on rk3399
  arm64: dts: rockchip: Drop unneeded address+size-cells on px30
  arm64: dts: rockchip: Fix LCD panel port on rk3566-pinetab2
  arm64: dts: rockchip: Move mipi_out node on rk3399 haikou demo dtso
  arm64: dts: rockchip: Simplify mipi_out endpoint on rk3399 RP64 dtso
  arm64: dts: rockchip: Simplify edp endpoints on several rk3399 boards
  arm64: dts: rockchip: Simplify VOP port definition on rk3328
  arm64: dts: rockchip: Move dsi address+size-cells from SoC to rk3399 boards
  arm64: dts: rockchip: Move dsi address+size-cells from SoC to px30 boards
  arm64: dts: rockchip: Fix UART DMA support for RK3528
  arm64: dts: rockchip: Add reset button to NanoPi R5S
  arm64: dts: rockchip: Add rtc0 alias for NanoPi R5S + R5C
  arm64: dts: rockchip: describe the OV8858 user camera on PinePhone Pro
  arm64: dts: rockchip: describe I2c Bus 1 and IMX258 world camera on PinePhone Pro
  arm64: dts: rockchip: Fix pinctrl node names for RK3528
  arm64: dts: rockchip: Add FriendlyElec NanoPi M5 support
  dt-bindings: arm: rockchip: add FriendlyElec NanoPi M5 board
  arm64: dts: rockchip: force PMIC reset behavior to restart PMU on RK3588 Tiger
  arm64: dts: rockchip: force PMIC reset behavior to restart PMU on RK3588 Jaguar
  ...

Link: https://lore.kernel.org/r/11552292.NyiUUSuA9g@phil
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-07-22 23:00:25 +02:00
Krzysztof Kozlowski
dda1d84a0c
ARM: dts: st: spear: Use generic "ethernet" as node name
Common name for Ethernet controllers is "ethernet", not "eth", also
recommended by Devicetree specification in "Generic Names
Recommendation".  Verified lack of impact using dtx_diff.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Link: https://lore.kernel.org/r/20250717142245.92492-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-07-22 23:00:06 +02:00
Arnd Bergmann
5cfe03e1ca Enable Rockchip DFI + PM_DEVFREQ_EVENT and RGA modules.
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Merge tag 'v6.17-rockchip-defconfig64-1' of https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into soc/defconfig

Enable Rockchip DFI + PM_DEVFREQ_EVENT and RGA modules.

* tag 'v6.17-rockchip-defconfig64-1' of https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  arm64: defconfig: enable further Rockchip platform drivers

Link: https://lore.kernel.org/r/9025082.MhkbZ0Pkbq@phil
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-07-22 22:58:01 +02:00
Arnd Bergmann
4252ec9ff8 Qualcomm Arm64 defconfig updates for v6.17
Enable camera and video clock controllers for SM8450, SM8550, and SM8650
 platforms.
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Merge tag 'qcom-arm64-defconfig-for-6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/defconfig

Qualcomm Arm64 defconfig updates for v6.17

Enable camera and video clock controllers for SM8450, SM8550, and SM8650
platforms.

* tag 'qcom-arm64-defconfig-for-6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux:
  arm64: defconfig: Enable camcc and videocc on Qualcomm SM8450+

Link: https://lore.kernel.org/r/20250720031134.286063-1-andersson@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-07-22 22:56:47 +02:00
Arnd Bergmann
0d0807814b Microchip AT91 defconfig updates for v6.17
This update includes:
 - the WILC1000 SDIO module
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Merge tag 'at91-defconfig-6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux into soc/defconfig

Microchip AT91 defconfig updates for v6.17

This update includes:
- the WILC1000 SDIO module

* tag 'at91-defconfig-6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/at91/linux:
  ARM: configs: sama5_defconfig: Select CONFIG_WILC1000_SDIO

Link: https://lore.kernel.org/r/20250721100904.568575-1-claudiu.beznea@tuxon.dev
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-07-22 22:56:17 +02:00
Arnd Bergmann
5b8141596b Qualcomm driver updates for v6.17
Perform input validation in the MDT loader, as this was not properly
 done in the non-remoteproc cases.
 
 Fix endian issues in the QMI encoder/decoder.
 
 Support reading DDR statistic using the Qualcomm stats driver.
 
 Add support for reading TME firmware details to the socinfo driver.
 
 Document the Kryo 470 CPU, and add SM7150 to the DCC to DeviceTree
 bindings.
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Merge tag 'qcom-drivers-for-6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/drivers

Qualcomm driver updates for v6.17

Perform input validation in the MDT loader, as this was not properly
done in the non-remoteproc cases.

Fix endian issues in the QMI encoder/decoder.

Support reading DDR statistic using the Qualcomm stats driver.

Add support for reading TME firmware details to the socinfo driver.

Document the Kryo 470 CPU, and add SM7150 to the DCC to DeviceTree
bindings.

* tag 'qcom-drivers-for-6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux:
  soc: qcom: mdt_loader: Fix error return values in mdt_header_valid()
  dt-bindings: sram: qcom,imem: Add a number of missing compatibles
  dt-bindings: arm: cpus: Add Kryo 470 CPUs
  dt-bindings: sram: qcom,imem: Add the SM7150 compatible
  dt-bindings: soc: qcom: aoss-qmp: Add the SM7150 compatible
  dt-bindings: soc: qcom,dcc: Add the SM7150 compatible
  soc: qcom: socinfo: Add support to retrieve TME build details
  soc: qcom: fix endianness for QMI header
  soc: qcom: QMI encoding/decoding for big endian
  dt-bindings: soc: qcom: add qcom,qcs615-imem compatible
  soc: qcom: qcom_stats: Add QMP support for syncing ddr stats
  soc: qcom: qcom_stats: Add support to read DDR statistic
  soc: qcom: mdt_loader: Actually use the e_phoff
  soc: qcom: mdt_loader: Rename mdt_phdr_valid()
  soc: qcom: mdt_loader: Ensure we don't read past the ELF header

Link: https://lore.kernel.org/r/20250715021454.14516-1-andersson@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-07-22 22:47:47 +02:00
Arnd Bergmann
9841d92754 Memory controller drivers for v6.17
1. Several cleanups: Use dev_fwnode() in OMAP GPMX, convert
    arm,pl172.txt DT bindings to DT schema, use
    syscon_regmap_lookup_by_phandle_args() wrapper, correct kerneldoc.
 
 2. Mediatek MT8186 SMI: Extend hardware bandwidth limits to fix VENC
    hardware during stress testing.
 
 3. Broadcom brcmstb_memc: Add additional fallback compatible and
    simplify device driver matching.  The change comes from Broadcom
    SoC maintainer (Florian Fainelli), thus its ABI impact is
    acknowledged.
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Merge tag 'memory-controller-drv-6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl into soc/drivers

Memory controller drivers for v6.17

1. Several cleanups: Use dev_fwnode() in OMAP GPMX, convert
   arm,pl172.txt DT bindings to DT schema, use
   syscon_regmap_lookup_by_phandle_args() wrapper, correct kerneldoc.

2. Mediatek MT8186 SMI: Extend hardware bandwidth limits to fix VENC
   hardware during stress testing.

3. Broadcom brcmstb_memc: Add additional fallback compatible and
   simplify device driver matching.  The change comes from Broadcom
   SoC maintainer (Florian Fainelli), thus its ABI impact is
   acknowledged.

* tag 'memory-controller-drv-6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux-mem-ctrl:
  dt-bindings: memory: renesas,rzg3e-xspi: Document RZ/V2H(P) and RZ/V2N support
  memory: brcmstb_memc: Simplify compatible matching
  dt-bindings: memory-controller: Define fallback compatible
  memory: omap-gpmx: Use dev_fwnode()
  memory: mtk-smi: Add ostd setting for mt8186
  dt-bindings: memory-controllers: convert arm,pl172.txt to yaml format
  memory: stm32_omm: Use syscon_regmap_lookup_by_phandle_args
  memory: emif: Add missing kerneldoc for lpmode

Link: https://lore.kernel.org/r/20250715095315.59299-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-07-22 22:47:00 +02:00
Michal Simek
28fa0dcb57 dt-bindings: riscv: cpus: Add AMD MicroBlaze V 64bit compatible
32bit version has been added by commit 4a6b93f562 ("dt-bindings: riscv:
cpus: Add AMD MicroBlaze V compatible") but 64bit version also exists and
should be covered by binding too.

Signed-off-by: Michal Simek <michal.simek@amd.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
2025-07-22 21:45:40 +01:00
Arnd Bergmann
1c37b63aab i.MX drivers changes for 6.17:
- A couple of MAINTAINERS updates
 - A new bus driver for i.MX AIPSTZ bridge and a follow-up fix from
   Laurentiu Mihalcea
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Merge tag 'imx-drivers-6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into soc/drivers

i.MX drivers changes for 6.17:

- A couple of MAINTAINERS updates
- A new bus driver for i.MX AIPSTZ bridge and a follow-up fix from
  Laurentiu Mihalcea

* tag 'imx-drivers-6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  bus: imx-aipstz: allow creating pdevs for child buses
  MAINTAINERS: Update i.MX entry
  bus: add driver for IMX AIPSTZ bridge
  MAINTAINERS: add NXP S32G RTC driver

Link: https://lore.kernel.org/r/20250713055441.221235-1-shawnguo2@yeah.net
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-07-22 22:45:33 +02:00
Arnd Bergmann
62bd59ca1c memory: tegra: Updates for v6.17-rc1
Enable support for the memory and external memory controllers found on
 Tegra264.
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Merge tag 'tegra-for-6.17-memory' of https://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into soc/drivers

memory: tegra: Updates for v6.17-rc1

Enable support for the memory and external memory controllers found on
Tegra264.

* tag 'tegra-for-6.17-memory' of https://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  memory: tegra: Add Tegra264 MC and EMC support
  dt-bindings: memory: tegra: Add Tegra264 support

Link: https://lore.kernel.org/r/20250711220943.2389322-4-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-07-22 22:44:36 +02:00
Arnd Bergmann
27d0ff5a60 firmware: tegra: Updates for v6.17-rc1
Add Tegra264 support for the BPMP, fix some dependency issues and clean
 up some code using new OF helpers.
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Merge tag 'tegra-for-6.17-firmware' of https://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into soc/drivers

firmware: tegra: Updates for v6.17-rc1

Add Tegra264 support for the BPMP, fix some dependency issues and clean
up some code using new OF helpers.

* tag 'tegra-for-6.17-firmware' of https://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  firmware: tegra: bpmp: Fix build failure for tegra264-only config
  firmware: tegra: bpmp: Use of_reserved_mem_region_to_resource() for "memory-region"
  firmware: tegra: bpmp: Add support on Tegra264
  firmware: tegra: Fix IVC dependency problems

Link: https://lore.kernel.org/r/20250711220943.2389322-2-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-07-22 22:43:55 +02:00
Diederik de Haas
912b1f2a79
arm64: dts: rockchip: Drop netdev led-triggers on NanoPi R5S
Sometimes the netdev triggers causes tasks to get blocked for more then
120 seconds, which in turn makes the (WAN) network port on the NanoPi
R5S fail to come up.
This results in the following (partial) trace:

  INFO: task kworker/0:1:11 blocked for more than 120 seconds.
        Not tainted 6.16-rc6+unreleased-arm64-cknow #1 Debian 6.16~rc6-1~exp1
  "echo 0 > /proc/sys/kernel/hung_task_timeout_secs" disables this message.
  task:kworker/0:1     state:D stack:0     pid:11    tgid:11    ppid:2      task_flags:0x4208060 flags:0x00000010
  Workqueue: events_power_efficient reg_check_chans_work [cfg80211]
  Call trace:
   __switch_to+0xf8/0x168 (T)
   __schedule+0x3f8/0xda8
   schedule+0x3c/0x120
   schedule_preempt_disabled+0x2c/0x58
   __mutex_lock.constprop.0+0x4d0/0xab8
   __mutex_lock_slowpath+0x1c/0x30
   mutex_lock+0x50/0x68
   rtnl_lock+0x20/0x38
   reg_check_chans_work+0x40/0x478 [cfg80211]
   process_one_work+0x178/0x3e0
   worker_thread+0x260/0x390
   kthread+0x150/0x250
   ret_from_fork+0x10/0x20
  INFO: task kworker/0:1:11 is blocked on a mutex likely owned by task dhcpcd:615.
  task:dhcpcd          state:D stack:0     pid:615   tgid:615   ppid:614    task_flags:0x400140 flags:0x00000018
  Call trace:
   __switch_to+0xf8/0x168 (T)
   __schedule+0x3f8/0xda8
   schedule+0x3c/0x120
   schedule_preempt_disabled+0x2c/0x58
   rwsem_down_write_slowpath+0x1e4/0x750
   down_write+0x98/0xb0
   led_trigger_register+0x134/0x1c0
   phy_led_triggers_register+0xf4/0x258 [libphy]
   phy_attach_direct+0x30c/0x390 [libphy]
   phylink_fwnode_phy_connect+0xb0/0x138 [phylink]
   __stmmac_open+0xec/0x520 [stmmac]
   stmmac_open+0x4c/0xe8 [stmmac]
   __dev_open+0x130/0x2e0
   __dev_change_flags+0x1c4/0x248
   netif_change_flags+0x2c/0x80
   dev_change_flags+0x88/0xc8
   devinet_ioctl+0x35c/0x610
   inet_ioctl+0x204/0x260
   sock_do_ioctl+0x6c/0x140
   sock_ioctl+0x2e4/0x388
   __arm64_sys_ioctl+0xb4/0x120
   invoke_syscall+0x6c/0x100
   el0_svc_common.constprop.0+0x48/0xf0
   do_el0_svc+0x24/0x38
   el0_svc+0x3c/0x188
   el0t_64_sync_handler+0x10c/0x140
   el0t_64_sync+0x198/0x1a0

In order to not introduce a regression with kernel 6.16, drop the netdev
triggers for now while the problem is being investigated further.

Fixes: 1631cbdb80 ("arm64: dts: rockchip: Improve LED config for NanoPi R5S")
Helped-by: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Diederik de Haas <didi.debian@cknow.org>
Link: https://lore.kernel.org/r/20250722123628.25660-1-didi.debian@cknow.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-07-22 22:33:36 +02:00
Marc Zyngier
e612423be3 cpu/hotplug: Remove unused cpuhp_state CPUHP_PCI_XGENE_DEAD
Now that the XGene MSI driver has been mostly rewritten and doesn't
use the CPU hotplug infrastructure, CPUHP_PCI_XGENE_DEAD is unused.

Remove it to reduce the size of cpuhp_hp_states[].

Signed-off-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Lorenzo Pieralisi <lpieralisi@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Link: https://lore.kernel.org/r/20250708173404.1278635-14-maz@kernel.org
2025-07-22 15:33:16 -05:00
Marc Zyngier
6aceb36f17 PCI: xgene-msi: Restructure handler setup/teardown
Another utterly pointless aspect of the xgene-msi driver is that
it is built around CPU hotplug. Which is quite amusing since this
is one of the few arm64 platforms that, by construction, cannot
do CPU hotplug in a supported way (no EL3, no PSCI, no luck).

Drop the CPU hotplug nonsense and just setup the IRQs and handlers
in a less overdesigned way, grouping things more logically in the
process.

Signed-off-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Lorenzo Pieralisi <lpieralisi@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Link: https://lore.kernel.org/r/20250708173404.1278635-13-maz@kernel.org
2025-07-22 15:33:16 -05:00
Marc Zyngier
cd5ffaf2b1 PCI: xgene-msi: Probe as a standard platform driver
Now that we have made the dependency between the PCI driver and
the MSI driver explicit, there is no need to use subsys_initcall()
as a probing hook, and we can rely on builtin_platform_driver()
instead.

Signed-off-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Lorenzo Pieralisi <lpieralisi@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Link: https://lore.kernel.org/r/20250708173404.1278635-12-maz@kernel.org
2025-07-22 15:33:16 -05:00
Marc Zyngier
3cc8f625e4 PCI: xgene-msi: Resend an MSI racing with itself on a different CPU
Since changing the affinity of an MSI really is about changing
the target address and that it isn't possible to mask an individual
MSI, it is completely possible for an interrupt to race with itself,
usually resulting in a lost interrupt.

Paper over the design blunder by informing the core code of this
sad state of affairs.

Signed-off-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Lorenzo Pieralisi <lpieralisi@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Link: https://lore.kernel.org/r/20250708173404.1278635-11-maz@kernel.org
2025-07-22 15:33:16 -05:00
Marc Zyngier
17c1f960cb PCI: xgene-msi: Sanitise MSI allocation and affinity setting
Plugging a device that doesn't use managed affinity on an XGene-1
machine results in messages such as:

  genirq: irq_chip PCI-MSIX-0000:01:00.0 did not update eff. affinity mask of irq 39

As it turns out, the driver was never updated to populate the effective
affinity on irq_set_affinity() call, and the core code is prickly about
that.

But upon further investigation, it appears that the driver keeps repainting
the hwirq field of the irq_data structure as a way to track the affinity
of the MSI, something that is very much frowned upon as it breaks the
fundamentals of an IRQ domain (an array indexed by hwirq).

Fixing this results more or less in a rewrite of the driver:

- Define how a hwirq and a CPU affinity map onto the MSI termination
  registers

- Allocate a single entry in the bitmap per MSI instead of *8*

- Correctly track CPU affinity

- Fix the documentation so that it actually means something (to me)

- Use standard bitmap iterators

- and plenty of other cleanups

With this, the driver behaves correctly on my vintage Mustang board.

Signed-off-by: Marc Zyngier <maz@kernel.org>
[lpieralisi: replaced open coded GENMASK(6, 4) with MSInRx_HWIRQ_MASK]
Signed-off-by: Lorenzo Pieralisi <lpieralisi@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Link: https://lore.kernel.org/r/20250708173404.1278635-10-maz@kernel.org
2025-07-22 15:33:16 -05:00
Marc Zyngier
011f4fc1e8 PCI: xgene-msi: Get rid of intermediate tracking structure
The xgene-msi driver uses an odd construct in the form of an
intermediate tracking structure, evidently designed to deal with
multiple instances of the MSI widget. However, the existing HW
only has one set, and it is obvious that there won't be new HW
coming down that particular line.

Simplify the driver by using a bit of pointer arithmetic instead,
directly tracking the interrupt and avoiding extra memory allocation.

Signed-off-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Lorenzo Pieralisi <lpieralisi@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Link: https://lore.kernel.org/r/20250708173404.1278635-9-maz@kernel.org
2025-07-22 15:33:16 -05:00
Marc Zyngier
c9c1578f11 PCI: xgene-msi: Use device-managed memory allocations
Since the MSI driver is probed as a platform device, there is no
reason to not use device-managed allocations. That's including
the top-level bookkeeping structure, which is better dynamically
allocated than being static.

Signed-off-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Lorenzo Pieralisi <lpieralisi@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Link: https://lore.kernel.org/r/20250708173404.1278635-8-maz@kernel.org
2025-07-22 15:33:16 -05:00
Marc Zyngier
0756244d4c PCI: xgene-msi: Drop superfluous fields from xgene_msi structure
The xgene_msi structure remembers both the of_node of the device
and the number of CPUs. All of which are perfectly useless.

Signed-off-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Lorenzo Pieralisi <lpieralisi@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Link: https://lore.kernel.org/r/20250708173404.1278635-7-maz@kernel.org
2025-07-22 15:33:16 -05:00
Marc Zyngier
d17e3f8a93 PCI: xgene-msi: Make per-CPU interrupt setup robust
The way the per-CPU interrupts are dealt with in the XGene MSI
driver isn't great:

- the affinity is set after the interrupt is enabled

- nothing prevents userspace from moving the interrupt around

- the affinity setting code pointlessly allocates memory

- the driver checks for conditions that cannot possibly happen

Address all of this in one go, resulting in slightly simpler setup
code.

Signed-off-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Lorenzo Pieralisi <lpieralisi@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Link: https://lore.kernel.org/r/20250708173404.1278635-6-maz@kernel.org
2025-07-22 15:33:16 -05:00
Marc Zyngier
fddf72ed7b PCI: xgene: Drop XGENE_PCIE_IP_VER_UNKN
XGENE_PCIE_IP_VER_UNKN is only refered to when probing for the
original XGene PCIe implementation, and get immediately overridden
if the device has the "apm,xgene-pcie" compatible string.

Given that the only way to get there is by finding this very string in
the DT, it is obvious that we will always overwrite the version with
XGENE_PCIE_IP_VER_1.

Drop the whole thing.

Signed-off-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Lorenzo Pieralisi <lpieralisi@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Link: https://lore.kernel.org/r/20250708173404.1278635-5-maz@kernel.org
2025-07-22 15:33:16 -05:00
Marc Zyngier
e3ac25cc95 PCI: xgene: Drop useless conditional compilation
pci-xgene.c only gets compiled if CONFIG_PCI_XGENE is selected.
It is therefore pointless to check for CONFIG_PCI_XGENE inside
the driver.

Signed-off-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Lorenzo Pieralisi <lpieralisi@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Link: https://lore.kernel.org/r/20250708173404.1278635-4-maz@kernel.org
2025-07-22 15:33:12 -05:00
Marc Zyngier
0d402bd41a PCI: xgene: Defer probing if the MSI widget driver hasn't probed yet
As a preparatory work to make the XGene MSI driver probe less of
a sorry hack, make the PCI driver check for the availability of
the MSI parent domain, and defer the probing otherwise.

Signed-off-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Lorenzo Pieralisi <lpieralisi@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Link: https://lore.kernel.org/r/20250708173404.1278635-3-maz@kernel.org
2025-07-22 15:33:08 -05:00
Marc Zyngier
2c9e7f8574 genirq: Teach handle_simple_irq() to resend an in-progress interrupt
It appears that the defect outlined in 9c15eeb536 ("genirq: Allow
fasteoi handler to resend interrupts on concurrent handling") also
affects some other less stellar MSI controllers, this time using
the handle_simple_irq() flow.

Teach this flow about irqd_needs_resend_when_in_progress(). Given
the invasive nature of this workaround, only this flow is updated.

Signed-off-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Lorenzo Pieralisi <lpieralisi@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Link: https://lore.kernel.org/r/20250708173404.1278635-2-maz@kernel.org
2025-07-22 15:33:00 -05:00
Arnd Bergmann
dceb36675b Merge branch 'newsoc/axiado' into soc/newsoc
Support for the AX3000 SoC, from Harshit Shah <hshah@axiado.com>:

The AX3000 is a multi-core system-on-chip featuring four ARM Cortex-A53
cores, secure vault, hardware firewall, and AI acceleration engines. This
initial support enables basic bring-up of the SoC and evaluation platform
with CPU, timer, UART, and I3C functionality.

The series begins by adding the "axiado" vendor prefix and compatible
strings for the SoC and board. It then introduces the device tree files
and minimal ARCH_AXIADO platform support in arm64.

* newsoc/axiado:
  MAINTAINERS: Add entry for Axiado
  arm64: defconfig: enable the Axiado family
  arm64: dts: axiado: Add initial support for AX3000 SoC and eval board
  arm64: add Axiado SoC family
  dt-bindings: i3c: cdns: add Axiado AX3000 I3C controller
  dt-bindings: serial: cdns: add Axiado AX3000 UART controller
  dt-bindings: gpio: cdns: add Axiado AX3000 GPIO variant
  dt-bindings: gpio: cdns: convert to YAML
  dt-bindings: arm: axiado: add AX3000 EVK compatible strings
  dt-bindings: vendor-prefixes: Add Axiado Corporation
2025-07-22 22:30:38 +02:00
Harshit Shah
a6beb2bdb0 MAINTAINERS: Add entry for Axiado
Add entry for Axiado maintainer and related files

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Harshit Shah <hshah@axiado.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-07-22 22:30:18 +02:00
Harshit Shah
525f46c7e3 arm64: defconfig: enable the Axiado family
Enable the Axiado SoC family in the arm64 defconfig.

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Harshit Shah <hshah@axiado.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-07-22 22:30:18 +02:00
Harshit Shah
1f70557790 arm64: dts: axiado: Add initial support for AX3000 SoC and eval board
Add initial device tree support for the AX3000 SoC and its evaluation
platform. The AX3000 is a multi-core SoC featuring 4 Cortex-A53 cores,
Secure Vault, AI Engine and Firewall.

It adds support for Cortex-A53 CPUs, timer, UARTs, and I3C
controllers on the AX3000 evaluation board.

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Harshit Shah <hshah@axiado.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-07-22 22:30:18 +02:00
Harshit Shah
729b770bb4 arm64: add Axiado SoC family
Add ARCH_AXIADO for the support of the Axiado SoC for arm64 architecture.

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Harshit Shah <hshah@axiado.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-07-22 22:30:18 +02:00
Harshit Shah
678fefdfe9 dt-bindings: i3c: cdns: add Axiado AX3000 I3C controller
Add binding for AX3000 I3C controller. So far, no changes known,
so it can fallback to default compatible.

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Harshit Shah <hshah@axiado.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-07-22 22:30:17 +02:00
Harshit Shah
7346be495b dt-bindings: serial: cdns: add Axiado AX3000 UART controller
Add binding for AX3000 UART controller. So far, no changes known,
so it can fallback to default compatible.

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Harshit Shah <hshah@axiado.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-07-22 22:30:17 +02:00
Harshit Shah
4c5250ebc3 dt-bindings: gpio: cdns: add Axiado AX3000 GPIO variant
Add binding for Axiado AX3000 GPIO controller. So far, no changes
are known, so it can fallback to default compatible.

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Harshit Shah <hshah@axiado.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-07-22 22:30:17 +02:00
Harshit Shah
36f4223449 dt-bindings: gpio: cdns: convert to YAML
Convert Cadence family GPIO controller bindings to DT schema.

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Harshit Shah <hshah@axiado.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-07-22 22:30:17 +02:00
Harshit Shah
c1fbbb76ec dt-bindings: arm: axiado: add AX3000 EVK compatible strings
Add device tree binding schema for Axiado platforms, specifically the
AX3000 SoC and its associated evaluation board. This binding will be
used for the board-level DTS files that support the AX3000 platforms.

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Harshit Shah <hshah@axiado.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-07-22 22:30:17 +02:00
Harshit Shah
ffab86698c dt-bindings: vendor-prefixes: Add Axiado Corporation
Link: https://axiado.com
Acked-by: Rob Herring (Arm) <robh@kernel.org>
Signed-off-by: Harshit Shah <hshah@axiado.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-07-22 22:30:17 +02:00
Arnd Bergmann
8c25d964e8 RISC-V soc defconfig for v6.17
spacemit:
 Enable sdhci and pwm drivers for the k1 soc in defconfig, the former as
 a builtin and the latter a module.
 
 starfive:
 Remove a no-longer required config for the starfive sound driver.
 
 Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
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Merge tag 'riscv-config-for-v6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux into soc/defconfig

RISC-V soc defconfig for v6.17

spacemit:
Enable sdhci and pwm drivers for the k1 soc in defconfig, the former as
a builtin and the latter a module.

starfive:
Remove a no-longer required config for the starfive sound driver.

Signed-off-by: Conor Dooley <conor.dooley@microchip.com>

* tag 'riscv-config-for-v6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux:
  riscv: defconfig: spacemit: enable sdhci driver for K1 SoC
  riscv: defconfig: Enable PWM support for SpacemiT K1 SoC
  riscv: defconfig: Remove CONFIG_SND_SOC_STARFIVE=m

Link: https://lore.kernel.org/r/20250716-defrost-regime-20a55ed925ad@spud
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-07-22 22:27:45 +02:00
Arnd Bergmann
c18b21c5d5 i.MX defconfig changes for 6.17:
- Enable S32G RTC driver as module in arm64 defconfig
 - Enable drivers used by imx28-amarula-rmm board in mxs_defconfig
 - Enable INPUT_PWM_BEEPER, USB_HSIC_USB3503 and BT_HCIUART_BCM in
   imx_v6_v7_defconfig
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Merge tag 'imx-defconfig-6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into soc/defconfig

i.MX defconfig changes for 6.17:

- Enable S32G RTC driver as module in arm64 defconfig
- Enable drivers used by imx28-amarula-rmm board in mxs_defconfig
- Enable INPUT_PWM_BEEPER, USB_HSIC_USB3503 and BT_HCIUART_BCM in
  imx_v6_v7_defconfig

* tag 'imx-defconfig-6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
  ARM: imx_v6_v7_defconfig: select CONFIG_USB_HSIC_USB3503
  ARM: imx_v6_v7_defconfig: select CONFIG_INPUT_PWM_BEEPER
  ARM: imx_v6_v7_defconfig: cleanup with savedefconfig
  ARM: mxs_defconfig: select new drivers used by imx28-amarula-rmm
  ARM: mxs_defconfig: Cleanup mxs_defconfig
  arm64: defconfig: add S32G RTC module support
  ARM: imx_v6_v7_defconfig: Select BT_HCIUART_BCM

Link: https://lore.kernel.org/r/20250713055441.221235-5-shawnguo2@yeah.net
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-07-22 22:26:11 +02:00
Arnd Bergmann
0570e9064c arm64: tegra: Default configuration updates for v6.17-rc1
Enable the HSP and BPMP via the configuration instead of selecting them,
 which can lead to problems. Also enable support for Tegra241, which was
 never done after support for it was added, and Tegra264.
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Merge tag 'tegra-for-6.17-arm64-defconfig' of https://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into soc/defconfig

arm64: tegra: Default configuration updates for v6.17-rc1

Enable the HSP and BPMP via the configuration instead of selecting them,
which can lead to problems. Also enable support for Tegra241, which was
never done after support for it was added, and Tegra264.

* tag 'tegra-for-6.17-arm64-defconfig' of https://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
  arm64: defconfig: Enable Tegra241 and Tegra264
  arm64: defconfig: Enable Tegra HSP and BPMP

Link: https://lore.kernel.org/r/20250711220943.2389322-8-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-07-22 22:23:35 +02:00
Li Jun
8adc8e1657
bus: del unnecessary init var
The compiler generates initialization instructions,
which consume additional CPU cycles. the
sysc_clockdomain_init should assign a value
to 'error' before it is read.so the var don't need init
to 0.

Signed-off-by: Li Jun <lijun01@kylinos.cn>
Link: https://lore.kernel.org/r/20250604081712.119523-1-lijun01@kylinos.cn
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-07-22 22:23:07 +02:00
Kory Maincent
acbf491e07
arm: multi_v7_defconfig: Enable TPS65219 regulator
Enable the TPS65219 regulator in the defconfig, as the TPS65214
variant is used by the newly introduced BeagleBoard Green Eco board.

Signed-off-by: Kory Maincent <kory.maincent@bootlin.com>
Reviewed-by: Andreas Kemnade <andreas@kemnade.info>
Tested-by: Judith Mendez <jm@ti.com>
Link: https://lore.kernel.org/r/20250620-bbg-v5-5-84f9b9a2e3a8@bootlin.com
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-07-22 22:22:54 +02:00
Kory Maincent
d50faff722
arm: omap2plus_defconfig: Enable TPS65219 regulator
Enable the TPS65219 regulator in the defconfig, as the TPS65214
variant is used by the newly introduced BeagleBoard Green Eco board.

Reviewed-by: Andreas Kemnade <andreas@kemnade.info>
Signed-off-by: Kory Maincent <kory.maincent@bootlin.com>
Tested-by: Judith Mendez <jm@ti.com>
Link: https://lore.kernel.org/r/20250620-bbg-v5-4-84f9b9a2e3a8@bootlin.com
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-07-22 22:22:52 +02:00
Arnd Bergmann
a4bb91d128 mvebu dt for 6.17 (part 1)
Use recent scl/sda gpio bindings on kirkwood boards (Keymile ones)
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Merge tag 'mvebu-dt-6.17-1' of https://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu into soc/dt

mvebu dt for 6.17 (part 1)

Use recent scl/sda gpio bindings on kirkwood boards (Keymile ones)

* tag 'mvebu-dt-6.17-1' of https://git.kernel.org/pub/scm/linux/kernel/git/gclement/mvebu:
  ARM: dts: marvell: kirkwood: use recent scl/sda gpio bindings

Link: https://lore.kernel.org/r/87ms94xzr8.fsf@BLaptop.bootlin.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-07-22 22:20:16 +02:00
Arnd Bergmann
7097d52d55 Amlogic ARM64 DT for v6.17:
- Align wifi node name with bindings
 - Add pinctrl nodes for Amlogic S7/S7D/S6 nodes
 - Enable the NPU nodes on Alta & VIM3
 - New boards:
   - Ugoos AM3
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Merge tag 'amlogic-arm64-dt-for-v6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux into soc/dt

Amlogic ARM64 DT for v6.17:
- Align wifi node name with bindings
- Add pinctrl nodes for Amlogic S7/S7D/S6 nodes
- Enable the NPU nodes on Alta & VIM3
- New boards:
  - Ugoos AM3

* tag 'amlogic-arm64-dt-for-v6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/amlogic/linux:
  arm64: dts: amlogic: Enable the npu node for Alta and VIM3
  dts: arm64: amlogic: add S6 pinctrl node
  dts: arm64: amlogic: add S7D pinctrl node
  dts: arm64: amlogic: add S7 pinctrl node
  arm64: dts: amlogic: Add Ugoos AM3
  dt-bindings: arm: amlogic: Add Ugoos AM3
  arm64: dts: amlogic: Align wifi node name with bindings

Link: https://lore.kernel.org/r/3d93b621-9544-4a68-85db-6f87a9e8fa5c@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
2025-07-22 22:19:54 +02:00