Add new ARCH_WARN_ASM macro for BUG/WARN assembly code sharing with
Rust to avoid the duplication.
No functional changes.
Acked-by: Alexandre Ghiti <alexghiti@rivosinc.com>
Signed-off-by: FUJITA Tomonori <fujita.tomonori@gmail.com>
Link: https://lore.kernel.org/r/20250502094537.231725-3-fujita.tomonori@gmail.com
[ Remove ending newline in `ARCH_WARN_ASM` content to be closer to the
original. - Miguel ]
Signed-off-by: Miguel Ojeda <ojeda@kernel.org>
Add new ARCH_WARN_ASM macro for BUG/WARN assembly code sharing with
Rust to avoid the duplication.
No functional changes.
Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Signed-off-by: FUJITA Tomonori <fujita.tomonori@gmail.com>
Link: https://lore.kernel.org/r/20250502094537.231725-2-fujita.tomonori@gmail.com
[ Fixed typo in macro parameter name. - Miguel ]
Signed-off-by: Miguel Ojeda <ojeda@kernel.org>
The test_kexec_jump program builds correctly when invoked from the top-level
selftests/Makefile, which explicitly sets the OUTPUT variable. However,
building directly in tools/testing/selftests/kexec fails with:
make: *** No rule to make target '/test_kexec_jump', needed by 'test_kexec_jump.sh'. Stop.
This failure occurs because the Makefile rule relies on $(OUTPUT), which is
undefined in direct builds.
Fix this by listing test_kexec_jump in TEST_GEN_PROGS, the standard way to
declare generated test binaries in the kselftest framework. This ensures the
binary is built regardless of invocation context and properly removed by
make clean.
Link: https://lore.kernel.org/r/20250702171704.22559-2-moonhee.lee.ca@gmail.com
Acked-by: Shuah Khan <skhan@linuxfoundation.org>
Signed-off-by: Moon Hee Lee <moonhee.lee.ca@gmail.com>
Acked-by: Baoquan He <bhe@redhat.com>
Acked-by: David Woodhouse <dwmw@amazon.co.uk>
Signed-off-by: Shuah Khan <skhan@linuxfoundation.org>
- Added the bindings and nodes for Apple SoC GPU. The driver itself
isn't ready for upstreaming yet due to rust dependencies but we're
confident that the bindings are stable at this point.
- Added a missing node for the touchbar framebuffer to Apple T2 device
trees, which is the BMC for some x86 Macs
- Fixed a W=1 warning by adding bit offsets to NVMEM node names. This
required a change to the generic NVMEM cell binding which will be part
of 6.17 through the NVMEM tree.
Signed-off-by: Sven Peter <sven@kernel.org>
-----BEGIN PGP SIGNATURE-----
iHUEABYKAB0WIQS3vz815OHsEaWy0u9EEX0kKnUe6QUCaH+8XwAKCRBEEX0kKnUe
6ZgFAQCOqbUyJPz0oxSTrrHQRwumhx0P6CIhVBtSaOtDnHYBJwD8CpPxfXXqMvgm
Wqr/bugw4pnR/LZRTScSoiqlwT3gZQs=
=L1MH
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmh//I8ACgkQmmx57+YA
GNmY9RAAmw4mkjv7ptPq1s323GHuqUFMDhmrScTeg5W3+rrlWSOYDkWYJFBcUdMa
d+camZ2Ey4RHcRDqOmcQvx93lcUoyBzoa9EQ8xU8wm1G2p4myIF2eFBlR6LiggZN
bV9naAl+4/7lRKzD35scGRlsvD2TRhYpff6ow1Kw8QfRk9N4P4j8TVHu+niE5088
lMtNTLnli7HUu2TbqgwZ8tG8CdJVJb3n5Xxi/V8gnG+tYnxQAEGBXkR3JznQZuSG
5PHZnyRhkk8/Qbcfb9W87OWIEhW53K2IVrqp2uStdv4AqvEyZYtMI4TOToZGi0t0
EpV2EZIEMq+fgu2DnihQ702JbjkxReqky+86mYkXWAfxJ+BW2mO4xqqZ+LQsjhbk
/Vxfvaf5y1iUh/W+hETaAePOFvo00m+ur+Rh2FG8/TG7Avow01cbOTmj37Mt6L3l
gT31yxv5Ys3YsClpQygvrnZPQj6Fxc3khbU8VRyL3GJJKQWs14+Bw3/q/zXnZdpq
oTrkMwGd9EdW/6p/ReL8deL1Lfc4mWkf9BwpbGzFdvkKmuiv0+okRxwslBqvK3l2
Jx59AkkdyqBvsQ1a5F5/6tvPnyUynF7PAaAW6jnnK8FZfuDetnfxoNpMfoB2O4fS
d1lScQGR9CPDiTiL94XN2DKAJQLNNeAtuzhaayUjHvAN+Mq+Acw=
=um3t
-----END PGP SIGNATURE-----
Merge tag 'apple-soc-dt-6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/sven/linux into soc/dt
Apple SoC device tree changes for v6.17
- Added the bindings and nodes for Apple SoC GPU. The driver itself
isn't ready for upstreaming yet due to rust dependencies but we're
confident that the bindings are stable at this point.
- Added a missing node for the touchbar framebuffer to Apple T2 device
trees, which is the BMC for some x86 Macs
- Fixed a W=1 warning by adding bit offsets to NVMEM node names. This
required a change to the generic NVMEM cell binding which will be part
of 6.17 through the NVMEM tree.
Signed-off-by: Sven Peter <sven@kernel.org>
* tag 'apple-soc-dt-6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/sven/linux:
arm64: dts: apple: Add Apple SoC GPU
dt-bindings: gpu: Add Apple SoC GPU
arm64: dts: apple: t8012-j132: Include touchbar framebuffer node
arm64: dts: apple: Add bit offset to PMIC NVMEM node names
Link: https://lore.kernel.org/r/20250722163258.62424-2-sven@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
There are several additions for the T-Head TH1520 SoC:
- Add PVT node for thermal sensor which works with the existing Moortec
MR75203 driver.
- Add "gpu-clkgen" reset property to the AON node which allows the power
domain driver to detect the capability to power sequence the GPU.
All of these patches have been tested in linux-next.
Signed-off-by: Drew Fustini <fustini@kernel.org>
-----BEGIN PGP SIGNATURE-----
iHUEABYIAB0WIQSy8G7QpEpV9aCf6Lbb7CzD2SixDAUCaHtRSAAKCRDb7CzD2Six
DMonAP4jtzBtR4SnzrruTktZ27Q4zXsWs4JmnbQQaL+gl4x3VAD8Dcq+rlzAUHsT
YmyQckLo6ioMbzsETuw2/lUGKkwL+Qg=
=+LQL
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmh//DAACgkQmmx57+YA
GNke3w//Zbyeby/GC5uEfMw/Wh/evyn3tTwITFfVlRXNJxQVusU3FFsCnNXnQQYd
QavMb5htZIUAGAdINANxJnDSMm+8hTrWIW5B0Tw9TJIVoJIyAAKkwP4j6UnCWyqt
WODGt+2/1L1ykGSYBHZWaRT8nnDo3s35Duip7DgA2Xoq4tUdLNYCeKYWM+YV0VNC
84YHH3kktLzT5FULk+SMPfEutNYUWlPFF9nwPlP7iEWpiK/PkFS8BzDzQGWfJNPS
Iskrq6Dh7hfI5IMZnSzcwUvvB2nZS4/f4h0vl2U9YVXQIExKK6Fp8o3zvKsdw8HR
4kiGczWmzNGv28empHjg5HiuSz0HCY9fpH2ptjCCx0YdbQ5RI8qUQfQ+AdJxuKji
+wOxpSXu+6oO6QAO/1MSa8eidCw1NMA8emj8B+GYkiva0FjlcTCJ2gM7IpkMZFYg
CbRbpdR4P3akexl4RMHNGEijnX5QrVCZO3v+kYKTYepYZ1NshAaS6c+xwQbyP2Vp
VAfwqvf9TCjKVFJHY7zELeAFt9IL7eXK6Syxq55FjXBNCh7J6e7A1cw4FMeP38Eb
wtGIzmAOb7tNo7Nj1u3v4bOyC1ujuKEpXJaCZTaJu2XckGOv4MnB13S5PdC1vEaP
ku2B4X3Ea7EO2OXB+T80JnC1KgbWaVMQmsBejdk/sGLFe+CFyyw=
=PdaW
-----END PGP SIGNATURE-----
Merge tag 'thead-dt-for-v6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/fustini/linux into soc/dt
T-HEAD Devicetrees for v6.17
There are several additions for the T-Head TH1520 SoC:
- Add PVT node for thermal sensor which works with the existing Moortec
MR75203 driver.
- Add "gpu-clkgen" reset property to the AON node which allows the power
domain driver to detect the capability to power sequence the GPU.
All of these patches have been tested in linux-next.
Signed-off-by: Drew Fustini <fustini@kernel.org>
* tag 'thead-dt-for-v6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/fustini/linux:
riscv: dts: thead: Add PVT node
riscv: dts: thead: th1520: Add GPU clkgen reset to AON node
Link: https://lore.kernel.org/r/aHtnwthmTpfkIBMr@x1
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Camera support for the PinePhone Pro.
A bunch of cleanups to make DTC happier, fix ordering of DMA uart
channels on rk3528 and some video output enablement as well as some
button definitions.
An interesting tidbit is the reset behaviour addition in that some
boards have specific requirements as to how the PMIC needs to do the
restart. DT-maintainers did not consider the header with helper-constants
as part of the binding, so that header ended up in the Rockchip directory
-----BEGIN PGP SIGNATURE-----
iQFEBAABCAAuFiEE7v+35S2Q1vLNA3Lx86Z5yZzRHYEFAmh6tRwQHGhlaWtvQHNu
dGVjaC5kZQAKCRDzpnnJnNEdgbsjCACMBjOtz2pLx0K76/51SGDzM12+ORi5K/ev
In1kcYSOIJySrQCUPDpma+k/JwptphdQlOfy4pewu/QFUaFln8ei9YGaQtmmyHTi
d/tDbv9/1bnCvTG8m9wbOkVYpLxvGMfpFZFH3WvNib4oaSxyc34q4zW0T1VTl0DZ
s3Q57dZsH0VnijFoj1VKz7gjz8jSuO6LksaYVcb7U4b9GQOCfMS1iDs1UJnfG1Xg
z4molRvAU5rfzlNNRnHIEAeh42b9tOU+jFy7Qlig7RD2eM0BudyziGau3nQGjEP3
WjDCfwHRo62EOoUSBRbdD9wCD6QsZJteSLMCA/J8EAA0xraEvKYy
=65EK
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmh/++kACgkQmmx57+YA
GNmHIxAAr9aW2c1JkYwquZcD1dWoR/+vsdyoukha3KAWUftYL2/kK0LTL3Dfi4yR
V8F21OPExHC/n2B93bTPYBSBJ8wvJqhZHdX7dcOeglu+M+4iwm+5PPkR0LwelcyI
/NFVMLAQuvcoBOVv2bX+bJHpQDELBu7M0PhJLiIwtJFFLvW/8Dj8RLXAIOQ4yEQg
kYBbjLzeotd+QjvRyw2PdA+Mj7hnA/E2c6aIQoWf60ey62hZaXRIIAEveuW4lR84
raM8gDE9XsiD00wPOctsPkIg4aD6R0z/HqNhan2zbUVH/6wW5qd8fXuwpEk7jE53
WFP0ZEVYEVrRzMiHn+FOhw7S8m/btKVsDrmqF4SNuTrVqXwfkEomFfiNcEWAp3FY
rmkY1KNGsc7oK9mRwKl2Qv84VgPM92E4nyCuUbsTGAlTED0E1FuT7KmGW+vvKtL5
TryUA5UdqBzmiAnxzEblcHpmXw38JsAwNxZqtRysLFt9/GUdDEAz34ZfO3qk8P49
naxASDEAJmYISdpUtk9Xw6CO5vQMuGFKTvaW+m9R5b2ig+USihuDg46JRMFyg7wG
4eIc9DIPN/mgJy2dP0CRkoNkU9+9KW3DvuI88cOaAEJhvLG/iqeymDHsrsecns14
RdfdJdeIHwPMSoOW5n/MUEjx3GdIHMICu/CHt88PcfuQGiAK7t0=
=bA8m
-----END PGP SIGNATURE-----
Merge tag 'v6.17-rockchip-dts64-2' of https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into soc/dt
New board: FriendlyElec NanoPi M5
Camera support for the PinePhone Pro.
A bunch of cleanups to make DTC happier, fix ordering of DMA uart
channels on rk3528 and some video output enablement as well as some
button definitions.
An interesting tidbit is the reset behaviour addition in that some
boards have specific requirements as to how the PMIC needs to do the
restart. DT-maintainers did not consider the header with helper-constants
as part of the binding, so that header ended up in the Rockchip directory
* tag 'v6.17-rockchip-dts64-2' of https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: (29 commits)
arm64: dts: rockchip: Add maskrom button to NanoPi R5S + R5C
arm64: dts: rockchip: Drop regulator-compatible property on rk3399
arm64: dts: rockchip: Drop unneeded address+size-cells on px30
arm64: dts: rockchip: Fix LCD panel port on rk3566-pinetab2
arm64: dts: rockchip: Move mipi_out node on rk3399 haikou demo dtso
arm64: dts: rockchip: Simplify mipi_out endpoint on rk3399 RP64 dtso
arm64: dts: rockchip: Simplify edp endpoints on several rk3399 boards
arm64: dts: rockchip: Simplify VOP port definition on rk3328
arm64: dts: rockchip: Move dsi address+size-cells from SoC to rk3399 boards
arm64: dts: rockchip: Move dsi address+size-cells from SoC to px30 boards
arm64: dts: rockchip: Fix UART DMA support for RK3528
arm64: dts: rockchip: Add reset button to NanoPi R5S
arm64: dts: rockchip: Add rtc0 alias for NanoPi R5S + R5C
arm64: dts: rockchip: describe the OV8858 user camera on PinePhone Pro
arm64: dts: rockchip: describe I2c Bus 1 and IMX258 world camera on PinePhone Pro
arm64: dts: rockchip: Fix pinctrl node names for RK3528
arm64: dts: rockchip: Add FriendlyElec NanoPi M5 support
dt-bindings: arm: rockchip: add FriendlyElec NanoPi M5 board
arm64: dts: rockchip: force PMIC reset behavior to restart PMU on RK3588 Tiger
arm64: dts: rockchip: force PMIC reset behavior to restart PMU on RK3588 Jaguar
...
Link: https://lore.kernel.org/r/11552292.NyiUUSuA9g@phil
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Common name for Ethernet controllers is "ethernet", not "eth", also
recommended by Devicetree specification in "Generic Names
Recommendation". Verified lack of impact using dtx_diff.
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: Viresh Kumar <viresh.kumar@linaro.org>
Link: https://lore.kernel.org/r/20250717142245.92492-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Perform input validation in the MDT loader, as this was not properly
done in the non-remoteproc cases.
Fix endian issues in the QMI encoder/decoder.
Support reading DDR statistic using the Qualcomm stats driver.
Add support for reading TME firmware details to the socinfo driver.
Document the Kryo 470 CPU, and add SM7150 to the DCC to DeviceTree
bindings.
-----BEGIN PGP SIGNATURE-----
iQJJBAABCAAzFiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmh1uXIVHGFuZGVyc3Nv
bkBrZXJuZWwub3JnAAoJEAsfOT8Nma3FZvEQAIoDwwkAySjthXxfuh7ajhVKbT5j
GMAua5ZdK0jI/SoKKb+y4MSCaJncmB2tScuqxoElVS/4Hjsz/+RSFPIM/TlK9Vab
6FVI4zC5bdre8153H6JqiucSGyaup1gpwbNB6WGkgHxuX2NcRp9tFa/7bJR0HbO4
bfXBU10G1f3Cy4QtZG1+Q1wgfMgqDLcsCKVtj/7TifuFN9YW/858lyzZ4xC+oYnS
WkMz6r98VwA5xasC6vtC0S9KDfXfbpjD3PViaGdrBqHQ7Zn8xWwDKjB6ZuyHyV/l
NwzmQoNn+jLb5TCepBUvJyekdlICawLnGahJ1UNvA07ASz/Dsu0LpzTxA9bbr2b7
Towt1ffJ186J6vcrxO67xN3W/fYE9CUgd2U/ISIMLkmbZZ1l2m/PlTVawvkxwlJC
0DF3UeUhwQgE6aogjyeSUAuOBsPNBxEZhZaKDdjigC8yhyt8Gifiq2W2ar667zbp
E/IoyJ5dzfO/0DTRsdfWx2hAUMB8to4b5PPbccccuAbNI9Bx4FBa7cXc4atRHRdB
Uy1v/hVqStRGGwGu0O5Q07Pq+4DVNx0Nrrujlh53jqAh+gdALJgDgVb8Fd7+KjcF
KhA6rDWO941pDVeyDIIjs+Y95g8xDVKKGuObPkLifcfpKSDkwHVYSM+ksnYwRRKc
badJm1kmFIqjFZOV
=jo4F
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmh/+PMACgkQmmx57+YA
GNnYlhAAqiwfs+qnSYtn9Mwk9qviDns8ptfXlYulwCxTMLGL/hGwXJbURI/wVFsj
hlqQDDC3iTCkgQBDXN340EIktRsCJ9ElqOiAGEF0Q6PhQ/idK4r2qIM6yNDCzf/F
5XJFcKpyrJXB3W5MB0Xcbw80RNsh6+fCCDdhwZxNzMaIVG3KfmYHylH7xmk5sg+w
nkm6g03ovmrYDg++IbKXxPp80neqJu0KmMBXIZlrKTkTNI/kmqmrVsvmeo0gi3nz
n9wL7WEXjJMSu4TXYgNx2hp0RWGKDcl91ab7QKG+n0+tqcPbkfjdSAfq71mUAbAq
uHO2WaMfnl2Sxp3xDv83/Dk5qNoL2CDj33sdxWhEmJVg157OKN5qaFzwmALdGEjI
h3DndeGSQLk7MVNjfQA8W/ZcJgk51Ef6sKqYbRZjiiHKW2tKE1XK/VLceldGMYyI
F1ngCJTVL/rg6py+ia6l3RqqfDijJ1jUH1Q4Rf6DoH5RqfHcjcEaEUXP6+wvd2NW
uUKd/OXYItc4T3DJ33d6T94TjRBtl6GyE794u4rRo1frskOScMF85HUOUbGdGobc
7uE6Xs4AQ20EcolJcuAPi2HBn66q9OFqQPHQgK5jkvw/pb1hKdbIVMiOoMNpdtHz
oBxBG6ElPsVDrNB1nqQ+POuIqDmtKJ9NJOngGUsy1NRQfCxnT6Q=
=ZBKF
-----END PGP SIGNATURE-----
Merge tag 'qcom-drivers-for-6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/drivers
Qualcomm driver updates for v6.17
Perform input validation in the MDT loader, as this was not properly
done in the non-remoteproc cases.
Fix endian issues in the QMI encoder/decoder.
Support reading DDR statistic using the Qualcomm stats driver.
Add support for reading TME firmware details to the socinfo driver.
Document the Kryo 470 CPU, and add SM7150 to the DCC to DeviceTree
bindings.
* tag 'qcom-drivers-for-6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux:
soc: qcom: mdt_loader: Fix error return values in mdt_header_valid()
dt-bindings: sram: qcom,imem: Add a number of missing compatibles
dt-bindings: arm: cpus: Add Kryo 470 CPUs
dt-bindings: sram: qcom,imem: Add the SM7150 compatible
dt-bindings: soc: qcom: aoss-qmp: Add the SM7150 compatible
dt-bindings: soc: qcom,dcc: Add the SM7150 compatible
soc: qcom: socinfo: Add support to retrieve TME build details
soc: qcom: fix endianness for QMI header
soc: qcom: QMI encoding/decoding for big endian
dt-bindings: soc: qcom: add qcom,qcs615-imem compatible
soc: qcom: qcom_stats: Add QMP support for syncing ddr stats
soc: qcom: qcom_stats: Add support to read DDR statistic
soc: qcom: mdt_loader: Actually use the e_phoff
soc: qcom: mdt_loader: Rename mdt_phdr_valid()
soc: qcom: mdt_loader: Ensure we don't read past the ELF header
Link: https://lore.kernel.org/r/20250715021454.14516-1-andersson@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
32bit version has been added by commit 4a6b93f562 ("dt-bindings: riscv:
cpus: Add AMD MicroBlaze V compatible") but 64bit version also exists and
should be covered by binding too.
Signed-off-by: Michal Simek <michal.simek@amd.com>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
- A couple of MAINTAINERS updates
- A new bus driver for i.MX AIPSTZ bridge and a follow-up fix from
Laurentiu Mihalcea
-----BEGIN PGP SIGNATURE-----
iQEzBAABCgAdFiEEFmJXigPl4LoGSz08UFdYWoewfM4FAmhzO50ACgkQUFdYWoew
fM4kRwf/dvp+FsIahhfr1tACaoGvpLsLQwQ/l6ufjAJJk+vyVfFNh1/ttxInQqdL
OHot1qbdf8Zo8wfoYNTpSWqo50TfK4wQfvr6JBvUsfdpkkLWeyQOtu/0vKVvve8o
8AQhJc3tS73iLFScp+moUD4fyXiL9GnyRSmHyXxP4DdfM3wQRfZc9pNmXXAX00LV
R8xkAv+CeshVqgEPLliSB9269Yq9vCCBcapuVtW5ewW0anSb8ifzuiKNbOo6rY9j
LGxXCxx2OUiaxNiP0xa6RxITyPvAExl4+M5/up4+wjyIK5n9QHZNPjlI+etongAy
bbrgLKVSZYM1B4k9ANORElxxa+cdYA==
=6puG
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmh/+G0ACgkQmmx57+YA
GNn+yg//TZpDqdLvMdT7NsYa6z0qHgm9LiiAR57cSXZGwi0YlCc3prEQNfKclwfN
zjmPv6OR5wlNfiD9zUVlu39deWvpGraYfgcX/P8j4w4J7msMRnr0AxZbWPGaIiJT
3SNXOfeVe8267g/nC30QYDQYEKUkY5c0nvIesiojnF4mMTsuIromioECLJkpED4M
ISFCbK6zHkvjzOKpLJpdmo+XwaIZaLeO5PMKcTrGNw/dHYfNNakpfKh0BwQKqoKL
ux2r4XZL0WrqmUAMRTuEWYo1tPQrBT9A2C6cy8ZVn/8fc2JJkxy3UYC1i2bIqft+
cAC2/EczqwAwXHcMD0lBnhG/pg3nrd9/2OPqnMTBBdeUqHiz4dNiIJwVrvUVNW75
ZFuUEdwGNASRur+nf5t/YxTQcWHx+fXY+G5PW89TSCE5O+MdoKhRjQHO6leUJhLh
pUZWqA8881IeCYYBLWi4J3wMXqCeHp2f7rGUFTNPTuI+N0/sp1S73hPqJ47rK5VM
NU2viC3L/1gHXcaQzIepIPdlHf1b+Etbff0b5N1LKRsV6+JKHlGes2tSreBDQb0V
pdG18TYGLz0VPYObJJQryPJHRvMX8oX46bR032nfBXUzUrROktkrD0PP/4rxVMJ+
f1p8FUd50rYCJPNYM8KB0tpvYwYRnC3tsmgF3kiiC/zwisjCyxk=
=/Bru
-----END PGP SIGNATURE-----
Merge tag 'imx-drivers-6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into soc/drivers
i.MX drivers changes for 6.17:
- A couple of MAINTAINERS updates
- A new bus driver for i.MX AIPSTZ bridge and a follow-up fix from
Laurentiu Mihalcea
* tag 'imx-drivers-6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux:
bus: imx-aipstz: allow creating pdevs for child buses
MAINTAINERS: Update i.MX entry
bus: add driver for IMX AIPSTZ bridge
MAINTAINERS: add NXP S32G RTC driver
Link: https://lore.kernel.org/r/20250713055441.221235-1-shawnguo2@yeah.net
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Enable support for the memory and external memory controllers found on
Tegra264.
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAmhxiZwACgkQ3SOs138+
s6GwjA//WLLmpGF1BVk2o4tiREwMttyQ8FW5aJF0XUl2CP6H1D+aekbrSZaQ0TIU
vDxmtXZwaud8TWQ1OAsc2jVCzwEsowChQ8EO6+AcKejUlJNeFmJ+qm1OqP9OxzJY
9InZeTzYexsqxR4y9XPGAd6MWwCBlIrCzjfOZSRwEULCFlvzdZ1qFUbXBKboMMT7
Az2BFWiH8ecjlVAx0Ejy4rhrVTcGNznPDkPutUgQmWbamdET51h2/4tvUlNpM6jU
Zpmj7rfma8u318RRz0gcGXMHNg8w8JGUM8TPl9hYrl9Y1hd56EKENxUf+uOw5i8M
6iE7gYuglhfXQ9FVjMkoE5ISecLQpGnT5nNC6mmSoG4KTFGhwoo2AMBGf4MLlm1O
uE3F9+HTZzn0eZA6ney1EKcqpaf+MqdRVAduxYNXZpZN+Fe2QbwQ8ztRyAt3kOKL
XRmuofsS7fe9TLWB6uRCabA84UbGvQlnn9CwBaCqtaGcYHWojO942PPO6Rg0nRaM
V2WjmcIexXiiIp80xPQTp/+onj+STE+K/R0QzDjvImZQyXvUxBX8SY6TTAvO3gZm
EoVbdDQc+9KhmQnUmlSg4WVdD21NmlfM6goloHA3EJVOyjyrehIzjLVrVppu3dy4
LEA6xl1Jy5xkufFdeF8jLugtkoPLYY0PM5cXJLgooakayujEru4=
=4VeH
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmh/+DQACgkQmmx57+YA
GNmgmg/+MEcHxmHS+Eh394bl8dqHlqSBKIG5rijCZduUKYJUcws68B0+IeW2Gswd
s3Wk9y8O3lb8yACxDXdW9+Lt4AZEvUtM9ZFU2Wb09H0P83aqdNBWHWkwBrMuMlMH
Bg7OGA5SLjJ3ke1RJQ00ba6dMKhfhxAUkRFeySzqMq843hRGObIZFAp6BpADJf31
7UjSz+yePlA5ZdzCeUssDyZvRRVQdUj1Hg2+nJE8g5MGZK04yoFz4hWPxXLb2PEw
vcbQ4n7WZb3/MD2qdASAXk81vKYala8MHCdvBFALva5a1JjlY2h0JK/2jrcylx2W
RgbBXThAiOSJ46KipO1qn1jSoyS8SQre8OKCiLRSdg73xoE5on8wRnLul4SbIGyo
fzgC993YS2wCe3UUuhoa+Nm5dI630t0xdSFDeUEfAurDiNcLjsvOv0atHW572/fi
ZPifQW0Rd69zPG/dXJxBFuXJjrcXW2XXJiDuXq/YTxFmMiWqHXu0XvxwH346gY9V
P77MjSa2EJ1C8ZTTph5WOzkf2tO7gMKBL8shmHXz4DO/F81khKu6CIl275+JiEzn
nDz4e9bcFAbvsnb39ItdA1vTdpP0SiQ05VRVrRER1gBl+1EvJ/QMIuQi8Izky8DB
N3fiyuzxRhDaApXGRTWp/rrF6GEulzI7LEN9bCm6an/egYePQWQ=
=oTmk
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-6.17-memory' of https://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into soc/drivers
memory: tegra: Updates for v6.17-rc1
Enable support for the memory and external memory controllers found on
Tegra264.
* tag 'tegra-for-6.17-memory' of https://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
memory: tegra: Add Tegra264 MC and EMC support
dt-bindings: memory: tegra: Add Tegra264 support
Link: https://lore.kernel.org/r/20250711220943.2389322-4-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Add Tegra264 support for the BPMP, fix some dependency issues and clean
up some code using new OF helpers.
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAmhxiPMACgkQ3SOs138+
s6E/7BAAuYCphrnsKIwDydV4ipgZ+kZ0oHk7uJ2pFLg6BIjdqtKZhEyXk9Wbg3Ko
6HRofsiT8WPvtWxZ8adreB1nvgNt/Ak50jQgLjEVGTyqHpUoQgGUudz5umTK0pnT
SoHH0VgSk0xToShcdYaMIG2XM7O2e77ohMQnVC2jrY7nnDCO8i7NgPlKTqKHORth
KO5U9JlaVhvap+HAGqDQq7ZO6QNuM3XDjAmuvantTwd89tADvwWTEO86VPDrHgoh
e6MjUgWlvMgZLY9nXL3K2IhSTyVivxXzxxGyPHtsOZXEsI46KhMnSjMtX80q6NOp
gnPKumNyC/5+SCCiLesCDTMyAHBfmtT1I9OEPiq203x9xck9yLmjtpUEhHFl0++i
TJw7cm4YHf3AWnhVU49uMK285XMPL0HxvxaTFErbK0Mdg3SkGN0vJqyh7T1kQvU0
Rp7R1Le8jM7zczdY4wOqlJoMtZaGKSAoahKD2QhQNhZxNjmWimotApPI7oIXipez
WqumClMsl8dIxfKdoW+HhfBuoHHbpAXUcej0qjdgGNYrx8cVKJcQmj9xgiEZVJJW
Hg0CPfZMwKjRPFZOtreHsWpLpYoWMUFz7lxS7zbWO3nNhRNNDKmTpAy39WJOfA1e
uENI9uNyBD0FNnZ44urTqO3XlpWmo3axQlOZu4wTF1E/BqhacWw=
=UtKj
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmh/+AsACgkQmmx57+YA
GNlJgRAAmZooeXTkOcoyDaErbteExqLsEcvKbv6LgH5V/dd4uqGF5TX4tFumW6cC
+Gznd1gW60qdTwAWKHCuXiiLflYcyJPA8/KasW4jFZJZ+M/ZN+bIFlM6DlWV8eeo
+KXN24w3CQjU4JRcL18aw6k4MtDShLgRhldCb7nAwM91vZw6z4P9URyWtyqNEn48
Hey1sLMx8Mk3weErFhiIFMxIBi0zJI81MUE1Eake5U9FL95Vu/+m4i+crUXWzsVA
+fTPQ6H5AuSwQ2g7LA+7HIufBe6fGxIPU59acGV1Sc2ReuW2KpRMs7kAOdkIwJ1r
TZW4vu/tjO6DKVRlmV6GOfSQvrVxkGBe0j+wHUnmYuH+SReVKw8BtUsJJYpH12gx
ysyPU5sVPASOKIBbeMg3OHtfpMh7BFRjtHlXpqP1D9yzgEuTcGx80VNLFOnVZCcZ
OML481qUCc2PJw5K9Otd782Kud17/IgHitKem6jIrlvBUNNfrVlLyaggZuoaxn1C
PUwsikL0YaKhlIuCa7Qm+FMktCPDhmYdYdFvb5hwRZUKU7aSAJmRASodmRWOT3Za
VVFDgqsVipijqUjQ5WowvpTOPm3ecAlAt8Rev6ctCn4hQw1GL7PAcwWDhup/sEvM
2YchQtVc0E7+HCKhv0MWMTFgdMh34Vx1GfDGCPAi+Hea5MFadxY=
=QiXC
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-6.17-firmware' of https://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into soc/drivers
firmware: tegra: Updates for v6.17-rc1
Add Tegra264 support for the BPMP, fix some dependency issues and clean
up some code using new OF helpers.
* tag 'tegra-for-6.17-firmware' of https://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
firmware: tegra: bpmp: Fix build failure for tegra264-only config
firmware: tegra: bpmp: Use of_reserved_mem_region_to_resource() for "memory-region"
firmware: tegra: bpmp: Add support on Tegra264
firmware: tegra: Fix IVC dependency problems
Link: https://lore.kernel.org/r/20250711220943.2389322-2-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Sometimes the netdev triggers causes tasks to get blocked for more then
120 seconds, which in turn makes the (WAN) network port on the NanoPi
R5S fail to come up.
This results in the following (partial) trace:
INFO: task kworker/0:1:11 blocked for more than 120 seconds.
Not tainted 6.16-rc6+unreleased-arm64-cknow #1 Debian 6.16~rc6-1~exp1
"echo 0 > /proc/sys/kernel/hung_task_timeout_secs" disables this message.
task:kworker/0:1 state:D stack:0 pid:11 tgid:11 ppid:2 task_flags:0x4208060 flags:0x00000010
Workqueue: events_power_efficient reg_check_chans_work [cfg80211]
Call trace:
__switch_to+0xf8/0x168 (T)
__schedule+0x3f8/0xda8
schedule+0x3c/0x120
schedule_preempt_disabled+0x2c/0x58
__mutex_lock.constprop.0+0x4d0/0xab8
__mutex_lock_slowpath+0x1c/0x30
mutex_lock+0x50/0x68
rtnl_lock+0x20/0x38
reg_check_chans_work+0x40/0x478 [cfg80211]
process_one_work+0x178/0x3e0
worker_thread+0x260/0x390
kthread+0x150/0x250
ret_from_fork+0x10/0x20
INFO: task kworker/0:1:11 is blocked on a mutex likely owned by task dhcpcd:615.
task:dhcpcd state:D stack:0 pid:615 tgid:615 ppid:614 task_flags:0x400140 flags:0x00000018
Call trace:
__switch_to+0xf8/0x168 (T)
__schedule+0x3f8/0xda8
schedule+0x3c/0x120
schedule_preempt_disabled+0x2c/0x58
rwsem_down_write_slowpath+0x1e4/0x750
down_write+0x98/0xb0
led_trigger_register+0x134/0x1c0
phy_led_triggers_register+0xf4/0x258 [libphy]
phy_attach_direct+0x30c/0x390 [libphy]
phylink_fwnode_phy_connect+0xb0/0x138 [phylink]
__stmmac_open+0xec/0x520 [stmmac]
stmmac_open+0x4c/0xe8 [stmmac]
__dev_open+0x130/0x2e0
__dev_change_flags+0x1c4/0x248
netif_change_flags+0x2c/0x80
dev_change_flags+0x88/0xc8
devinet_ioctl+0x35c/0x610
inet_ioctl+0x204/0x260
sock_do_ioctl+0x6c/0x140
sock_ioctl+0x2e4/0x388
__arm64_sys_ioctl+0xb4/0x120
invoke_syscall+0x6c/0x100
el0_svc_common.constprop.0+0x48/0xf0
do_el0_svc+0x24/0x38
el0_svc+0x3c/0x188
el0t_64_sync_handler+0x10c/0x140
el0t_64_sync+0x198/0x1a0
In order to not introduce a regression with kernel 6.16, drop the netdev
triggers for now while the problem is being investigated further.
Fixes: 1631cbdb80 ("arm64: dts: rockchip: Improve LED config for NanoPi R5S")
Helped-by: Robin Murphy <robin.murphy@arm.com>
Signed-off-by: Diederik de Haas <didi.debian@cknow.org>
Link: https://lore.kernel.org/r/20250722123628.25660-1-didi.debian@cknow.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Now that the XGene MSI driver has been mostly rewritten and doesn't
use the CPU hotplug infrastructure, CPUHP_PCI_XGENE_DEAD is unused.
Remove it to reduce the size of cpuhp_hp_states[].
Signed-off-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Lorenzo Pieralisi <lpieralisi@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Link: https://lore.kernel.org/r/20250708173404.1278635-14-maz@kernel.org
Another utterly pointless aspect of the xgene-msi driver is that
it is built around CPU hotplug. Which is quite amusing since this
is one of the few arm64 platforms that, by construction, cannot
do CPU hotplug in a supported way (no EL3, no PSCI, no luck).
Drop the CPU hotplug nonsense and just setup the IRQs and handlers
in a less overdesigned way, grouping things more logically in the
process.
Signed-off-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Lorenzo Pieralisi <lpieralisi@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Link: https://lore.kernel.org/r/20250708173404.1278635-13-maz@kernel.org
Now that we have made the dependency between the PCI driver and
the MSI driver explicit, there is no need to use subsys_initcall()
as a probing hook, and we can rely on builtin_platform_driver()
instead.
Signed-off-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Lorenzo Pieralisi <lpieralisi@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Link: https://lore.kernel.org/r/20250708173404.1278635-12-maz@kernel.org
Since changing the affinity of an MSI really is about changing
the target address and that it isn't possible to mask an individual
MSI, it is completely possible for an interrupt to race with itself,
usually resulting in a lost interrupt.
Paper over the design blunder by informing the core code of this
sad state of affairs.
Signed-off-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Lorenzo Pieralisi <lpieralisi@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Link: https://lore.kernel.org/r/20250708173404.1278635-11-maz@kernel.org
Plugging a device that doesn't use managed affinity on an XGene-1
machine results in messages such as:
genirq: irq_chip PCI-MSIX-0000:01:00.0 did not update eff. affinity mask of irq 39
As it turns out, the driver was never updated to populate the effective
affinity on irq_set_affinity() call, and the core code is prickly about
that.
But upon further investigation, it appears that the driver keeps repainting
the hwirq field of the irq_data structure as a way to track the affinity
of the MSI, something that is very much frowned upon as it breaks the
fundamentals of an IRQ domain (an array indexed by hwirq).
Fixing this results more or less in a rewrite of the driver:
- Define how a hwirq and a CPU affinity map onto the MSI termination
registers
- Allocate a single entry in the bitmap per MSI instead of *8*
- Correctly track CPU affinity
- Fix the documentation so that it actually means something (to me)
- Use standard bitmap iterators
- and plenty of other cleanups
With this, the driver behaves correctly on my vintage Mustang board.
Signed-off-by: Marc Zyngier <maz@kernel.org>
[lpieralisi: replaced open coded GENMASK(6, 4) with MSInRx_HWIRQ_MASK]
Signed-off-by: Lorenzo Pieralisi <lpieralisi@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Link: https://lore.kernel.org/r/20250708173404.1278635-10-maz@kernel.org
The xgene-msi driver uses an odd construct in the form of an
intermediate tracking structure, evidently designed to deal with
multiple instances of the MSI widget. However, the existing HW
only has one set, and it is obvious that there won't be new HW
coming down that particular line.
Simplify the driver by using a bit of pointer arithmetic instead,
directly tracking the interrupt and avoiding extra memory allocation.
Signed-off-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Lorenzo Pieralisi <lpieralisi@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Link: https://lore.kernel.org/r/20250708173404.1278635-9-maz@kernel.org
Since the MSI driver is probed as a platform device, there is no
reason to not use device-managed allocations. That's including
the top-level bookkeeping structure, which is better dynamically
allocated than being static.
Signed-off-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Lorenzo Pieralisi <lpieralisi@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Link: https://lore.kernel.org/r/20250708173404.1278635-8-maz@kernel.org
The xgene_msi structure remembers both the of_node of the device
and the number of CPUs. All of which are perfectly useless.
Signed-off-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Lorenzo Pieralisi <lpieralisi@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Link: https://lore.kernel.org/r/20250708173404.1278635-7-maz@kernel.org
The way the per-CPU interrupts are dealt with in the XGene MSI
driver isn't great:
- the affinity is set after the interrupt is enabled
- nothing prevents userspace from moving the interrupt around
- the affinity setting code pointlessly allocates memory
- the driver checks for conditions that cannot possibly happen
Address all of this in one go, resulting in slightly simpler setup
code.
Signed-off-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Lorenzo Pieralisi <lpieralisi@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Link: https://lore.kernel.org/r/20250708173404.1278635-6-maz@kernel.org
XGENE_PCIE_IP_VER_UNKN is only refered to when probing for the
original XGene PCIe implementation, and get immediately overridden
if the device has the "apm,xgene-pcie" compatible string.
Given that the only way to get there is by finding this very string in
the DT, it is obvious that we will always overwrite the version with
XGENE_PCIE_IP_VER_1.
Drop the whole thing.
Signed-off-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Lorenzo Pieralisi <lpieralisi@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Link: https://lore.kernel.org/r/20250708173404.1278635-5-maz@kernel.org
pci-xgene.c only gets compiled if CONFIG_PCI_XGENE is selected.
It is therefore pointless to check for CONFIG_PCI_XGENE inside
the driver.
Signed-off-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Lorenzo Pieralisi <lpieralisi@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Link: https://lore.kernel.org/r/20250708173404.1278635-4-maz@kernel.org
As a preparatory work to make the XGene MSI driver probe less of
a sorry hack, make the PCI driver check for the availability of
the MSI parent domain, and defer the probing otherwise.
Signed-off-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Lorenzo Pieralisi <lpieralisi@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Link: https://lore.kernel.org/r/20250708173404.1278635-3-maz@kernel.org
It appears that the defect outlined in 9c15eeb536 ("genirq: Allow
fasteoi handler to resend interrupts on concurrent handling") also
affects some other less stellar MSI controllers, this time using
the handle_simple_irq() flow.
Teach this flow about irqd_needs_resend_when_in_progress(). Given
the invasive nature of this workaround, only this flow is updated.
Signed-off-by: Marc Zyngier <maz@kernel.org>
Signed-off-by: Lorenzo Pieralisi <lpieralisi@kernel.org>
Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
Reviewed-by: Thomas Gleixner <tglx@linutronix.de>
Link: https://lore.kernel.org/r/20250708173404.1278635-2-maz@kernel.org
Support for the AX3000 SoC, from Harshit Shah <hshah@axiado.com>:
The AX3000 is a multi-core system-on-chip featuring four ARM Cortex-A53
cores, secure vault, hardware firewall, and AI acceleration engines. This
initial support enables basic bring-up of the SoC and evaluation platform
with CPU, timer, UART, and I3C functionality.
The series begins by adding the "axiado" vendor prefix and compatible
strings for the SoC and board. It then introduces the device tree files
and minimal ARCH_AXIADO platform support in arm64.
* newsoc/axiado:
MAINTAINERS: Add entry for Axiado
arm64: defconfig: enable the Axiado family
arm64: dts: axiado: Add initial support for AX3000 SoC and eval board
arm64: add Axiado SoC family
dt-bindings: i3c: cdns: add Axiado AX3000 I3C controller
dt-bindings: serial: cdns: add Axiado AX3000 UART controller
dt-bindings: gpio: cdns: add Axiado AX3000 GPIO variant
dt-bindings: gpio: cdns: convert to YAML
dt-bindings: arm: axiado: add AX3000 EVK compatible strings
dt-bindings: vendor-prefixes: Add Axiado Corporation
Add entry for Axiado maintainer and related files
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Harshit Shah <hshah@axiado.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Enable the Axiado SoC family in the arm64 defconfig.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Harshit Shah <hshah@axiado.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Add initial device tree support for the AX3000 SoC and its evaluation
platform. The AX3000 is a multi-core SoC featuring 4 Cortex-A53 cores,
Secure Vault, AI Engine and Firewall.
It adds support for Cortex-A53 CPUs, timer, UARTs, and I3C
controllers on the AX3000 evaluation board.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Harshit Shah <hshah@axiado.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Add ARCH_AXIADO for the support of the Axiado SoC for arm64 architecture.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Harshit Shah <hshah@axiado.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Add binding for AX3000 I3C controller. So far, no changes known,
so it can fallback to default compatible.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Harshit Shah <hshah@axiado.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Add binding for AX3000 UART controller. So far, no changes known,
so it can fallback to default compatible.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Harshit Shah <hshah@axiado.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Add binding for Axiado AX3000 GPIO controller. So far, no changes
are known, so it can fallback to default compatible.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Harshit Shah <hshah@axiado.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Add device tree binding schema for Axiado platforms, specifically the
AX3000 SoC and its associated evaluation board. This binding will be
used for the board-level DTS files that support the AX3000 platforms.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Harshit Shah <hshah@axiado.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
spacemit:
Enable sdhci and pwm drivers for the k1 soc in defconfig, the former as
a builtin and the latter a module.
starfive:
Remove a no-longer required config for the starfive sound driver.
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
-----BEGIN PGP SIGNATURE-----
iHUEABYIAB0WIQRh246EGq/8RLhDjO14tDGHoIJi0gUCaHfIIQAKCRB4tDGHoIJi
0tO/AP45rPSVx3q1CkIWmwuwjfoM+jWJFwCUEjjn9c7riA1e6wD+O53C29GRv18c
5QaMuQ+SK3u1jVSVRI3QzFzlDEKt4AU=
=g3vT
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmh/9EEACgkQmmx57+YA
GNmkmRAAsVU+v1C9BZm1la4iZcD+2gOnt0UYe7jlU6Tb/JqJFDXt84ZXmx68tDCg
5pnYNAyWid7krmwwJkydrgHN3L38caFUpIkJfoTgLGXUYXT3GG2sfAUhVpcRBilh
sHFJLUNCwXXB0YTvAO7Wv3RpDiGzwrdQZtObwv0OsGCaiWp0vaWf2+Vu7oovmkdX
QE7pjB53psT9QJS2m+NpB+2sg5S+dbzyMFuB79hL8VmVn5aJKU3RPF8M+UaeCOfS
M17p99pjqSNbafNKB6pyL1mmH/INBQHw1VA8jMAnFfGgWmhRUd3a++IoIshfmjmU
N0On1RsOg4iWEFGNk20rilq/a3oNNTPz+yFCuaq2cSmxFX/RaMfgoS5xrWKUfHlW
CZ7YDh7iUg9ol/y2Ue0p6Q6o2We4+o8r/6UQDeQgbQpDJqiSIEHXA9t4IzwwkHUa
V0WHuYTt5hOkITfQjXrn55CwJwK/S7qqdov0RQ3KnqiuMYKSmxzOaQAaH7Le5PMG
3jj6s19Iy9fV3EitjUHBPJFG2fBx9Pv6kOZOUK1MPlW+R54RCyH/ruWq8w9hngGk
NQzKOxbkM6jTSgNVIHtvSqOExVTGItw8/EEAUTTrTTdy8DdvP16EwN3B24UiJQIt
vrV6uksJfy3OUng20mK1umHE6iWP+30lMXDlxSC3EGUnlDsJQIE=
=Z97i
-----END PGP SIGNATURE-----
Merge tag 'riscv-config-for-v6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux into soc/defconfig
RISC-V soc defconfig for v6.17
spacemit:
Enable sdhci and pwm drivers for the k1 soc in defconfig, the former as
a builtin and the latter a module.
starfive:
Remove a no-longer required config for the starfive sound driver.
Signed-off-by: Conor Dooley <conor.dooley@microchip.com>
* tag 'riscv-config-for-v6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux:
riscv: defconfig: spacemit: enable sdhci driver for K1 SoC
riscv: defconfig: Enable PWM support for SpacemiT K1 SoC
riscv: defconfig: Remove CONFIG_SND_SOC_STARFIVE=m
Link: https://lore.kernel.org/r/20250716-defrost-regime-20a55ed925ad@spud
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Enable the HSP and BPMP via the configuration instead of selecting them,
which can lead to problems. Also enable support for Tegra241, which was
never done after support for it was added, and Tegra264.
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiOrDCAFJzPfAjcif3SOs138+s6EFAmhxir0ACgkQ3SOs138+
s6FhJBAAmnjQOaQPOsmwTXRZcYERrvAw2opyVNhifDvhaf5CSb8y0Qq2/Sp8jraW
7odU3jSxEy+DDKscAhIseequMs8VyAHtkgeOcQ+VS2XXiJJq7B0m5X5Hso470cdr
hwnooio6Ljh9+S6t6gF7kF9vp1dZSl1JTdCqUGl6qJCAGcS2dfEc+YRZss40pyWt
p3NQiLnCpmWqo2te9VzUKOFsotOO0WtrVbwQ6qnwv8as3pzNfcK230OlpwKtkesn
oGqqgr1/cvXH1LSNZzQqZoZdNbQNuvvZbr7Lc0cOjeRmo7/2s1DDr6uq5DdqaXok
aG1ozW7HaIoaPSGPFULZF/1mt7Po/W/g7LaWaNIsqksTSJ2ye9c25T8qh4517Iq/
nyrsZxaXtXNah9PmwOiV3p5dPr1o3buvbyvWuIhW0jzdV6CcZQcG1q+yvvUJ2wDp
dunaQA8of4PnGbsTI6QX6NyBuZ8+xfXuj8Lbjzp7JCha+GXkXzQ94Oxt1lZQORNv
aggSg/T5ORAaXTJxYiyD5Zqf2sCsIMl8ZxOTJ9KySvOmBBr3Y7cnrTL1aJotIw0r
73b2As1NR7K24/VzmX2pvYbIpNmihsdid4SkAoxX24FQ7Mg2GCKqzOB9guFhQ0is
ri9U3GvuCMtnDD4O49jo83QM6CSWSVp36e2oOG/ACUpqAE785Ks=
=ARB0
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEo6/YBQwIrVS28WGKmmx57+YAGNkFAmh/80cACgkQmmx57+YA
GNmo9Q//fx+345Q7e7cRIXQc6WcLk35tpJ6Rp5AZ2DWF3gLR91sN3O5f63bZ3sb3
f2TFIj/inusc7ph6wh7GVA1aGQhW4ADWb4vrhEyHmCIMRCQ1tbeyOg8rm1AmiaJe
0nQIFR2m3i1dltgB8DW+ueQ7WnutV09uok/A1wPu4NXFVktVLOQHjp+C0M5SuAsT
6uCqctBaMGpQlnTP8KhnsdSF1VCItowHkSJ26zX9ALmV8t9eweAtwGsWy8oV8id4
IdsUDQ4Id0Ba4wWLdru0j6aNsSr6Jt6uPbX/WpCQ7/z/+IePTHvDLHdvTNTELmSz
kMLrqWZZTO77wi1Im02IERbA3ltJJTeSgBWt8AGSBq5XCD5Ti2yFoOBWrSp6Bg5x
IJDc3CbJX6s/U8e7grHBOU+w+sk38VcuelRkGCdsI5jo1Lglan7fN5n3/dnOrwn8
Q9YVi5BY7CU57559tI7np8sI1tZP3En9UBpKzJFfquu274xSGoLZWgspTt1d57t1
2pyPsh24lE0mgfYmTLTE50PLJbchagMwya0s0psJNJTmCmrMru0nssShdMzuWFDT
+Ehz+7twHLqRXiHzXFCdDk0MMdZb6Q2Wz95VWxEWeQNwu+SV58jlz/QtE3f8BBRD
h0i8zoLFGenVaCPrXiOuJg9f6mKnadEY/9uVghehZEMWfhcwky0=
=OiJ2
-----END PGP SIGNATURE-----
Merge tag 'tegra-for-6.17-arm64-defconfig' of https://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux into soc/defconfig
arm64: tegra: Default configuration updates for v6.17-rc1
Enable the HSP and BPMP via the configuration instead of selecting them,
which can lead to problems. Also enable support for Tegra241, which was
never done after support for it was added, and Tegra264.
* tag 'tegra-for-6.17-arm64-defconfig' of https://git.kernel.org/pub/scm/linux/kernel/git/tegra/linux:
arm64: defconfig: Enable Tegra241 and Tegra264
arm64: defconfig: Enable Tegra HSP and BPMP
Link: https://lore.kernel.org/r/20250711220943.2389322-8-thierry.reding@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The compiler generates initialization instructions,
which consume additional CPU cycles. the
sysc_clockdomain_init should assign a value
to 'error' before it is read.so the var don't need init
to 0.
Signed-off-by: Li Jun <lijun01@kylinos.cn>
Link: https://lore.kernel.org/r/20250604081712.119523-1-lijun01@kylinos.cn
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Enable the TPS65219 regulator in the defconfig, as the TPS65214
variant is used by the newly introduced BeagleBoard Green Eco board.
Signed-off-by: Kory Maincent <kory.maincent@bootlin.com>
Reviewed-by: Andreas Kemnade <andreas@kemnade.info>
Tested-by: Judith Mendez <jm@ti.com>
Link: https://lore.kernel.org/r/20250620-bbg-v5-5-84f9b9a2e3a8@bootlin.com
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Enable the TPS65219 regulator in the defconfig, as the TPS65214
variant is used by the newly introduced BeagleBoard Green Eco board.
Reviewed-by: Andreas Kemnade <andreas@kemnade.info>
Signed-off-by: Kory Maincent <kory.maincent@bootlin.com>
Tested-by: Judith Mendez <jm@ti.com>
Link: https://lore.kernel.org/r/20250620-bbg-v5-4-84f9b9a2e3a8@bootlin.com
Signed-off-by: Kevin Hilman <khilman@baylibre.com>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>