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Arnd Bergmann
4e61c011b0 Arm SCMI updates for v6.16 
1. Quirk framework to handle buggy firmware
 
    With SCMI gaining broader adoption across arm64 platforms, it's
    increasingly important to address how we consistently manage out-of-spec
    SCMI firmware already deployed in the field. This change introduces a
    lightweight quirk framework built around static_keys, enabling developers to:
     - Define quirks and their match criteria, which can include:
        o A list of compatibles ({ comp, comp2, NULL })
        o Vendor ID / Sub-Vendor ID
        o Firmware implementation version ranges ([Min_Vers, Max_Vers])
 
    Matching proceeds from the most specific (longest match) to the least
    specific. NULL entries are treated as wildcards (i.e., match any value).
    This flexibility allows matching very specific combinations or just a
    general compatible string.
 
    The quirk code blocks/snippets implementing the workaround are placed near
    their intended usage and guarded by a static_key that's tied to the quirk.
    Once the SCMI core stack is initialized and retrieves platform info via the
    base protocol, any matching quirks will have their associated static_keys
    enabled.
 
 2. Quirk for Qualcomm X1E platforms
 
    On some Qualcomm X1E platforms, such as the Lenovo ThinkPad T14s, the
    SCMI firmware fails to set the FastChannel support bit for PERF_LEVEL_GET,
    yet it crashes when the driver attempts to fall back to standard messaging
    which is clearly out-of-spec behavior.
 
    To work around this, the new SCMI quirk framework is used to
    unconditionally enable FC initialization for this firmware version.
 
    In the future, once the fixed firmware version is identified, an upper
    version bound can be added to the quirk match criteria. Alternatively,
    matching can be further restricted using a SoC-specific compatible string
    if always enabling FC proves problematic elsewhere.
 
 3. Support for NXP i.MX LMM/CPU vendor protocol extensions
 
    The i.MX95 System Manager (SM) implements Logical Machine Management (LMM)
    and a CPU protocol to manage Logical Machines (LM) and CPUs (e.g., M7).
 
    These changes integrate the vendor-specific protocol extensions
    implementing the LMM and CPU protocols for the i.MX95, facilitating
    standardized communication between the operating system and the platform's
    firmware, which will be used by remoteproc drivers. The changes also
    include the necessary device tree bindings.
 
 4. Miscellaneous cleanups/changes
 
    These mainly include polling support in SCMI raw mode. The cleanups
    centralize error logging for SCMI device creation into a single helper
    function, consolidate the device matching logic into a single function, and
    ensure that devices must have a name for registration—removing support for
    unnamed devices when matching drivers and devices for probing. Transport
    devices are now excluded from bus matching, and the correct assignment of
    the parent device for the arm-scmi platform device is ensured in the
    transport drivers.
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Merge tag 'scmi-updates-6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into soc/drivers

Arm SCMI updates for v6.16

1. Quirk framework to handle buggy firmware

   With SCMI gaining broader adoption across arm64 platforms, it's
   increasingly important to address how we consistently manage out-of-spec
   SCMI firmware already deployed in the field. This change introduces a
   lightweight quirk framework built around static_keys, enabling developers to:
    - Define quirks and their match criteria, which can include:
       o A list of compatibles ({ comp, comp2, NULL })
       o Vendor ID / Sub-Vendor ID
       o Firmware implementation version ranges ([Min_Vers, Max_Vers])

   Matching proceeds from the most specific (longest match) to the least
   specific. NULL entries are treated as wildcards (i.e., match any value).
   This flexibility allows matching very specific combinations or just a
   general compatible string.

   The quirk code blocks/snippets implementing the workaround are placed near
   their intended usage and guarded by a static_key that's tied to the quirk.
   Once the SCMI core stack is initialized and retrieves platform info via the
   base protocol, any matching quirks will have their associated static_keys
   enabled.

2. Quirk for Qualcomm X1E platforms

   On some Qualcomm X1E platforms, such as the Lenovo ThinkPad T14s, the
   SCMI firmware fails to set the FastChannel support bit for PERF_LEVEL_GET,
   yet it crashes when the driver attempts to fall back to standard messaging
   which is clearly out-of-spec behavior.

   To work around this, the new SCMI quirk framework is used to
   unconditionally enable FC initialization for this firmware version.

   In the future, once the fixed firmware version is identified, an upper
   version bound can be added to the quirk match criteria. Alternatively,
   matching can be further restricted using a SoC-specific compatible string
   if always enabling FC proves problematic elsewhere.

3. Support for NXP i.MX LMM/CPU vendor protocol extensions

   The i.MX95 System Manager (SM) implements Logical Machine Management (LMM)
   and a CPU protocol to manage Logical Machines (LM) and CPUs (e.g., M7).

   These changes integrate the vendor-specific protocol extensions
   implementing the LMM and CPU protocols for the i.MX95, facilitating
   standardized communication between the operating system and the platform's
   firmware, which will be used by remoteproc drivers. The changes also
   include the necessary device tree bindings.

4. Miscellaneous cleanups/changes

   These mainly include polling support in SCMI raw mode. The cleanups
   centralize error logging for SCMI device creation into a single helper
   function, consolidate the device matching logic into a single function, and
   ensure that devices must have a name for registration—removing support for
   unnamed devices when matching drivers and devices for probing. Transport
   devices are now excluded from bus matching, and the correct assignment of
   the parent device for the arm-scmi platform device is ensured in the
   transport drivers.

* tag 'scmi-updates-6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux:
  firmware: arm_scmi: quirk: Force perf level get fastchannel
  firmware: arm_scmi: quirk: Fix CLOCK_DESCRIBE_RATES triplet
  firmware: arm_scmi: Add common framework to handle firmware quirks
  firmware: arm_scmi: Ensure that the message-id supports fastchannel
  MAINTAINERS: add entry for i.MX SCMI extensions
  firmware: imx: Add i.MX95 SCMI CPU driver
  firmware: imx: Add i.MX95 SCMI LMM driver
  firmware: arm_scmi: imx: Add i.MX95 CPU Protocol
  firmware: arm_scmi: imx: Add i.MX95 LMM protocol
  dt-bindings: firmware: Add i.MX95 SCMI LMM and CPU protocol
  firmware: arm_scmi: imx: Add LMM and CPU documentation
  firmware: arm_scmi: Add polling support to raw mode
  firmware: arm_scmi: Exclude transport devices from bus matching
  firmware: arm_scmi: Assign correct parent to arm-scmi platform device
  firmware: arm_scmi: Refactor error logging from SCMI device creation to single helper
  firmware: arm_scmi: Refactor device matching logic to eliminate duplication
  firmware: arm_scmi: Ensure scmi_devices are always matched by name as well

Link: https://lore.kernel.org/r/20250507134713.49039-1-sudeep.holla@arm.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
 2025-05-09 23:09:01 +02:00
Arnd Bergmann
5dcee6dd09 MediaTek driver updates for v6.16 
This brings some cleanups to the MediaTek DVFSRC driver, commonizing
 the bandwidth constraints platform data, and also adds support for
 the DVFSRC hardware found in the MediaTek Dimensity 1200 MT6893 SoC.
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Merge tag 'mtk-soc-for-v6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/mediatek/linux into soc/drivers

MediaTek driver updates for v6.16

This brings some cleanups to the MediaTek DVFSRC driver, commonizing
the bandwidth constraints platform data, and also adds support for
the DVFSRC hardware found in the MediaTek Dimensity 1200 MT6893 SoC.

* tag 'mtk-soc-for-v6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/mediatek/linux:
  soc: mediatek: mtk-dvfsrc: remove an unused variable
  soc: mediatek: mtk-dvfsrc: Add support for Dimensity 1200 MT6893
  soc: mediatek: mtk-dvfsrc: Rename and move bw constraints data
  dt-bindings: soc: mediatek: dvfsrc: Add support for MT6893

Link: https://lore.kernel.org/r/20250506091736.125733-2-angelogioacchino.delregno@collabora.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
 2025-05-09 23:08:05 +02:00
Arnd Bergmann
29bf77f080 This pull request contains Broadcom SoC driver updates for 6.16, please 
pull the following:
 
 - Ovidiu updates the brcmstb_gisb driver to use the dev_groups instead
   of manually adding those
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Merge tag 'arm-soc/for-6.16/drivers' of https://github.com/Broadcom/stblinux into soc/drivers

This pull request contains Broadcom SoC driver updates for 6.16, please
pull the following:

- Ovidiu updates the brcmstb_gisb driver to use the dev_groups instead
  of manually adding those

* tag 'arm-soc/for-6.16/drivers' of https://github.com/Broadcom/stblinux:
  bus: brcmstb_gisb: use dev_groups to register attribute groups

Link: https://lore.kernel.org/r/20250505165810.1948927-3-florian.fainelli@broadcom.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
 2025-05-09 23:07:28 +02:00
Linus Torvalds
0e1329d404 Rust fixes for v6.15 (2nd) 
Toolchain and infrastructure:
 
  - Make CFI_AUTO_DEFAULT depend on !RUST or Rust >= 1.88.0.
 
  - Clean Rust (and Clippy) lints for the upcoming Rust 1.87.0 and Rust
    1.88.0 releases.
 
  - Clean objtool warning for the upcoming Rust 1.87.0 release by adding
    one more noreturn function.
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Merge tag 'rust-fixes-6.15-2' of git://git.kernel.org/pub/scm/linux/kernel/git/ojeda/linux

Pull rust fixes from Miguel Ojeda:

 - Make CFI_AUTO_DEFAULT depend on !RUST or Rust >= 1.88.0

 - Clean Rust (and Clippy) lints for the upcoming Rust 1.87.0 and 1.88.0
   releases

 - Clean objtool warning for the upcoming Rust 1.87.0 release by adding
   one more noreturn function

* tag 'rust-fixes-6.15-2' of git://git.kernel.org/pub/scm/linux/kernel/git/ojeda/linux:
  x86/Kconfig: make CFI_AUTO_DEFAULT depend on !RUST or Rust >= 1.88
  rust: clean Rust 1.88.0's `clippy::uninlined_format_args` lint
  rust: clean Rust 1.88.0's warning about `clippy::disallowed_macros` configuration
  rust: clean Rust 1.88.0's `unnecessary_transmutes` lint
  rust: allow Rust 1.87.0's `clippy::ptr_eq` lint
  objtool/rust: add one more `noreturn` Rust function for Rust 1.87.0
 2025-05-09 14:06:34 -07:00
Arnd Bergmann
7ebbb8416a Samsung SoC drivers for v6.16 
Several improvements to Exynos ACPM (Alive Clock and Power Manager)
 driver:
 1. Handle communication timeous better.
 2. Avoid sleeping, so users (PMIC) can still transfer during system
    shutdown.
 3. Fix reading longer messages from them firmware.
 4. Deferred probe improvements.
 5. Model the user of ACPM - PMIC - a as child device and export
    devm_acpm_get_by_node() for such use case.
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Merge tag 'samsung-drivers-6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into soc/drivers

Samsung SoC drivers for v6.16

Several improvements to Exynos ACPM (Alive Clock and Power Manager)
driver:
1. Handle communication timeous better.
2. Avoid sleeping, so users (PMIC) can still transfer during system
   shutdown.
3. Fix reading longer messages from them firmware.
4. Deferred probe improvements.
5. Model the user of ACPM - PMIC - a as child device and export
   devm_acpm_get_by_node() for such use case.

* tag 'samsung-drivers-6.16' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
  firmware: exynos-acpm: Correct kerneldoc and use typical np argument name
  firmware: exynos-acpm: introduce devm_acpm_get_by_node()
  firmware: exynos-acpm: populate devices from device tree data
  firmware: exynos-acpm: silence EPROBE_DEFER error on boot
  firmware: exynos-acpm: fix reading longer results
  dt-bindings: firmware: google,gs101-acpm-ipc: add PMIC child node
  firmware: exynos-acpm: allow use during system shutdown
  firmware: exynos-acpm: use ktime APIs for timeout detection

Link: https://lore.kernel.org/r/20250501103541.13795-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
 2025-05-09 23:06:22 +02:00
Arnd Bergmann
8f10d9b87b Renesas driver updates for v6.16 
- Enable all Renesas SoCs by default when ARCH_RENESAS is set, which
     will allow up to remove all individual Renesas SoC entries from the
     various defconfigs,
   - Initial support for the Renesas RZ/V2N (R9A09G056) SoC.
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Merge tag 'renesas-drivers-for-v6.16-tag1' of https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into soc/drivers

Renesas driver updates for v6.16

  - Enable all Renesas SoCs by default when ARCH_RENESAS is set, which
    will allow up to remove all individual Renesas SoC entries from the
    various defconfigs,
  - Initial support for the Renesas RZ/V2N (R9A09G056) SoC.

* tag 'renesas-drivers-for-v6.16-tag1' of https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
  soc: renesas: Add config option for RZ/V2N (R9A09G056) SoC
  soc: renesas: Kconfig: Enable SoCs by default when ARCH_RENESAS is set

Link: https://lore.kernel.org/r/cover.1745582592.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
 2025-05-09 23:05:41 +02:00
Arnd Bergmann
109c5aedf6 Graphics support for the old rk3066-marsboard (hdmi + Mali400 gpu), 
rk3036 improvements (mmc asliases, hdmi refclk), dropping of
 redundant clock-latency props.
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Merge tag 'v6.16-rockchip-dts32-1' of https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into soc/dt

Graphics support for the old rk3066-marsboard (hdmi + Mali400 gpu),
rk3036 improvements (mmc asliases, hdmi refclk), dropping of
redundant clock-latency props.

* tag 'v6.16-rockchip-dts32-1' of https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip:
  ARM: dts: rockchip: enable Mali gpu on rk3066 marsboard
  ARM: dts: rockchip: enable hdmi on rk3066 marsboard
  Revert "ARM: dts: rockchip: drop grf reference from rk3036 hdmi"
  ARM: dts: rockchip: Add ref clk for hdmi
  ARM: dts: rockchip: Drop redundant CPU "clock-latency"
  ARM: dts: rockchip: Add aliases for rk3036-kylin MMC devices

Link: https://lore.kernel.org/r/22686731.EfDdHjke4D@diego
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
 2025-05-09 23:04:33 +02:00
Dan Carpenter
a223ce1957 cxl/hdm: Clean up a debug printk 
Smatch complains that %pa is for phys_addr_t types and "size" is a u64.

    drivers/cxl/core/hdm.c:521 cxl_dpa_alloc() error: '%pa' expects
    argument of type 'phys_addr_t*', argument 4 has type 'ullong*

Looking at this, to me it seems more useful to print the sizes as
decimal instead of hex.  Let's do that.

[dj: Adjusted based on latest code changes. ]

Signed-off-by: Dan Carpenter <dan.carpenter@linaro.org>
Reviewed-by: Fan Ni <fan.ni@samsung.com>
Reviewed-by: Dave Jiang <dave.jiang@intel.com>
Reviewed-by: Ira Weiny <ira.weiny@intel.com>
Link: https://patch.msgid.link/3d3d969d-651d-4e9d-a892-900876a60ab5@moroto.mountain
Signed-off-by: Dave Jiang <dave.jiang@intel.com>
 2025-05-09 14:04:08 -07:00
Arnd Bergmann
b386d064c8 - New boards: rk3588-evb2, rk3588-tiger-haikou-video-demo-overlay 
- New peripherals: RNG+PCIe+SATA on rk3576; eDP on rk3588;
   DMA+I2C+PWM on rk3528; DSI on rk3588
 - SPI-flash binding got a supply-property, so a number of boards add
   this supply.
 - RK3588 wrongly declared the shared memory with SCMI in the peripheral
   space - moved to the correct reserved-memory structure now.
 - The rest is peripheral enablement accross many boards - like hdmi
   output for a big number of boards, regulators, eeprom, etc.
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Merge tag 'v6.16-rockchip-dts64-1' of https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into soc/dt

- New boards: rk3588-evb2, rk3588-tiger-haikou-video-demo-overlay
- New peripherals: RNG+PCIe+SATA on rk3576; eDP on rk3588;
  DMA+I2C+PWM on rk3528; DSI on rk3588
- SPI-flash binding got a supply-property, so a number of boards add
  this supply.
- RK3588 wrongly declared the shared memory with SCMI in the peripheral
  space - moved to the correct reserved-memory structure now.
- The rest is peripheral enablement accross many boards - like hdmi
  output for a big number of boards, regulators, eeprom, etc.

* tag 'v6.16-rockchip-dts64-1' of https://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: (52 commits)
  arm64: dts: rockchip: Add vcc-supply to SPI flash on rk3566-rock3c
  arm64: dts: rockchip: Enable regulators for Radxa E20C
  arm64: dts: rockchip: Add pwm nodes for RK3528
  arm64: dts: rockchip: Add onboard EEPROM for Radxa E20C
  arm64: dts: rockchip: Add I2C controllers for RK3528
  arm64: dts: rockchip: add RK3576 RNG node
  arm64: dts: rockchip: Switch to undeprecated qcom,calibration-variant on RK3399
  arm64: dts: rockchip: Add vcc-supply to SPI flash on rk3566-quartz64-b
  arm64: dts: rockchip: Add phy-supply to gmac0 on NanoPi R5S
  arm64: dts: rockchip: fix usb-c port functionality on rk3588-nanopc-t6
  arm64: dts: rockchip: Enable bluetooth of AP6611s on OrangePI5 Max/Ultra
  arm64: dts: rockchip: add SATA nodes to RK3576
  arm64: dts: rockchip: Add vcc-supply to SPI flash on rk3588-rock-5b
  arm64: dts: rockchip: Add vcc-supply to SPI flash on rk3566-pinetab2
  arm64: dts: rockchip: Add vcc-supply to SPI flash on rk3399-rockpro64
  arm64: dts: rockchip: Add vcc-supply to SPI flash on rk3328-rock64
  arm64: dts: rockchip: Add vcc supply to spi flash on rk3399-roc-pc
  arm64: dts: rockchip: enable pcie on Sige5
  arm64: dts: rockchip: Add HDMI support for roc-rk3576-pc
  arm64: dts: rockchip: Enable HDMI0 audio output for Indiedroid Nova
  ...

Link: https://lore.kernel.org/r/2307187.iZASKD2KPV@diego
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
 2025-05-09 22:56:21 +02:00
Arnd Bergmann
2f57af5636 Apple SoC Device Tree updates for 6.16: 
- A-series SoCs: CPU cache information has been added to device trees
 - M-series SoCs: SPMI controller and SPMI NVMEM nodes have been added
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Merge tag 'asahi-soc-dt-6.16' of https://github.com/AsahiLinux/linux into soc/dt

Apple SoC Device Tree updates for 6.16:

- A-series SoCs: CPU cache information has been added to device trees
- M-series SoCs: SPMI controller and SPMI NVMEM nodes have been added

* tag 'asahi-soc-dt-6.16' of https://github.com/AsahiLinux/linux:
  arm64: dts: apple: Add PMIC NVMEM
  arm64: dts: apple: Add SPMI controller nodes
  arm64: dts: apple: t8015: Add CPU caches
  arm64: dts: apple: t8012: Add CPU caches
  arm64: dts: apple: t8011: Add CPU caches
  arm64: dts: apple: t8010: Add CPU caches
  arm64: dts: apple: s8001: Add CPU caches
  arm64: dts: apple: s800-0-3: Add CPU caches
  arm64: dts: apple: t7001: Add CPU caches
  arm64: dts: apple: t7000: Add CPU caches
  arm64: dts: apple: s5l8960x: Add CPU caches

Link: https://lore.kernel.org/r/20250507160827.87725-1-sven@svenpeter.dev
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
 2025-05-09 22:55:28 +02:00
Arnd Bergmann
fecf15fab3 This pull request contains Broadcom ARM64-based SoCs Device Tree updates 
for 6.16, please pull the following:
 
 - Stanimir adds and enables the PCIe root complex Device Tree nodes present on the
   Raspberry Pi 5
 
 - Rob updates the BCM2712 L2 cache node names to use a more comforming
   name
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Merge tag 'arm-soc/for-6.16/devicetree-arm64' of https://github.com/Broadcom/stblinux into soc/dt

This pull request contains Broadcom ARM64-based SoCs Device Tree updates
for 6.16, please pull the following:

- Stanimir adds and enables the PCIe root complex Device Tree nodes present on the
  Raspberry Pi 5

- Rob updates the BCM2712 L2 cache node names to use a more comforming
  name

* tag 'arm-soc/for-6.16/devicetree-arm64' of https://github.com/Broadcom/stblinux:
  arm64: dts: broadcom: bcm2712: Use "l2-cache" for L2 cache node names
  arm64: dts: broadcom: bcm2712-rpi-5-b: Enable PCIe DT nodes
  arm64: dts: broadcom: bcm2712: Add PCIe DT nodes

Link: https://lore.kernel.org/r/20250505165810.1948927-2-florian.fainelli@broadcom.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
 2025-05-09 22:44:05 +02:00
Arnd Bergmann
7b2c407968 This pull request contains Broadcom ARM-based SoC Device Tree changes 
for 6.16, please pull the following:
 
 - Arthur adds a pinctrl node for BCM21664 and updates BCM23550 to use
   it, he also drops the DTS file for the BCM59056 PMU chip and leaving
   that board level DTS files
 
 - Stefan documents and adds support for the Raspberry Pi 2 2nd revision.
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Merge tag 'arm-soc/for-6.16/devicetree' of https://github.com/Broadcom/stblinux into soc/dt

This pull request contains Broadcom ARM-based SoC Device Tree changes
for 6.16, please pull the following:

- Arthur adds a pinctrl node for BCM21664 and updates BCM23550 to use
  it, he also drops the DTS file for the BCM59056 PMU chip and leaving
  that board level DTS files

- Stefan documents and adds support for the Raspberry Pi 2 2nd revision.

* tag 'arm-soc/for-6.16/devicetree' of https://github.com/Broadcom/stblinux:
  arm64: dts: bcm: Add reference to RPi 2 (2nd rev)
  ARM: dts: bcm: Add support for Raspberry Pi 2 (2nd rev)
  dt-bindings: arm: bcm2835: Add Raspberry Pi 2 (2nd rev)
  ARM: dts: Drop DTS for BCM59056 PMU
  ARM: dts: bcm2166x: Add bcm2166x-pinctrl DTSI
  ARM: dts: bcm2166x-common: Add pinctrl node

Link: https://lore.kernel.org/r/20250505165810.1948927-1-florian.fainelli@broadcom.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
 2025-05-09 22:42:53 +02:00
Arnd Bergmann
1d55886c96 Renesas DTS updates for v6.16 (take two) 
- Add CANFD support for the RZ/G3E SoC and the RZ/G3E SMARC Carrier-II
     EVK development board,
   - Add support for Ethernet port A, 9-pin D-sub serial, and USB on the
     RZN1D-DB and RZN1D-EB development and expansion boards,
   - Add sound support for the Retronix Sparrow Hawk board,
   - Add General PWM Timer (GPT) support for the RZ/G2L and RZ/V2L SoCs
     and SMARC EVK boards,
   - Miscellaneous fixes and improvements.
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Merge tag 'renesas-dts-for-v6.16-tag2' of https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into soc/dt

Renesas DTS updates for v6.16 (take two)

  - Add CANFD support for the RZ/G3E SoC and the RZ/G3E SMARC Carrier-II
    EVK development board,
  - Add support for Ethernet port A, 9-pin D-sub serial, and USB on the
    RZN1D-DB and RZN1D-EB development and expansion boards,
  - Add sound support for the Retronix Sparrow Hawk board,
  - Add General PWM Timer (GPT) support for the RZ/G2L and RZ/V2L SoCs
    and SMARC EVK boards,
  - Miscellaneous fixes and improvements.

* tag 'renesas-dts-for-v6.16-tag2' of https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
  ARM: dts: renesas: r9a06g032-rzn1d400-eb: Enable USB host port
  ARM: dts: renesas: r9a06g032-rzn1d400-db: Add pinmux for the CPLD
  arm64: dts: renesas: white-hawk-single: Improve Ethernet TSN description
  ARM: dts: renesas: r9a06g032-rzn1d400-db: Enable USB device port
  ARM: dts: renesas: r9a06g032-rzn1d400-eb: Describe 9-pin D-sub serial port
  arm64: dts: renesas: beacon-renesom: Align wifi node name with bindings
  arm64: dts: renesas: rzg2l-smarc: Enable GPT on carrier board
  arm64: dts: renesas: r9a07g054: Add GPT support
  arm64: dts: renesas: r9a07g044: Add GPT support
  arm64: dts: renesas: sparrow-hawk: Add MSIOF Sound support
  ARM: dts: renesas: r9a06g032-rzn1d400-eb: Add GMAC1 port
  arm64: dts: renesas: r9a09g047e57-smarc: Enable CAN Transceiver
  arm64: dts: renesas: r9a09g047e57-smarc: Enable CANFD
  arm64: dts: renesas: r9a09g047: Add CANFD node

Link: https://lore.kernel.org/r/cover.1746798755.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
 2025-05-09 22:42:03 +02:00
Arnd Bergmann
47ce18de8b Renesas DTS updates for v6.16 
- Add SDHI, ICU, I2C, PMIC, and GPU support on the RZ/G3E SoC and the
     RZ/G3E SoM and SMARC Carrier-II EVK development board,
   - Add internal SDHI regulator support on the RZ/V2H(P) SoC,
   - Add UFS tuning parameters in E-FUSE on the R-Car S4-8 ES1.2 SoC,
   - Add support for Ethernet ports C and D, I2C, keys, and SDHI on the
     RZ/N1D SoC and the RZN1D-DB and RZN1D-EB development and expansion
     boards,
   - Add initial support for the RZ/V2N (R9A09G056) and the RZ/V2N EVK
     board,
   - Add support for the Retronix Sparrow Hawk board, which is based on
     R-Car V4H ES3.0,
   - Add ISP core support on R-Car V3U, V4H, and V4M,
   - Miscellaneous fixes and improvements.
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Merge tag 'renesas-dts-for-v6.16-tag1' of https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into soc/dt

Renesas DTS updates for v6.16

  - Add SDHI, ICU, I2C, PMIC, and GPU support on the RZ/G3E SoC and the
    RZ/G3E SoM and SMARC Carrier-II EVK development board,
  - Add internal SDHI regulator support on the RZ/V2H(P) SoC,
  - Add UFS tuning parameters in E-FUSE on the R-Car S4-8 ES1.2 SoC,
  - Add support for Ethernet ports C and D, I2C, keys, and SDHI on the
    RZ/N1D SoC and the RZN1D-DB and RZN1D-EB development and expansion
    boards,
  - Add initial support for the RZ/V2N (R9A09G056) and the RZ/V2N EVK
    board,
  - Add support for the Retronix Sparrow Hawk board, which is based on
    R-Car V4H ES3.0,
  - Add ISP core support on R-Car V3U, V4H, and V4M,
  - Miscellaneous fixes and improvements.

* tag 'renesas-dts-for-v6.16-tag1' of https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel: (29 commits)
  arm64: dts: renesas: r8a779h0: Add ISP core function block
  arm64: dts: renesas: r8a779g0: Add ISP core function block
  arm64: dts: renesas: r8a779a0: Add ISP core function block
  arm64: dts: renesas: r8a779g3: Add Retronix R-Car V4H Sparrow Hawk board support
  arm64: dts: renesas: rzg3e-smarc-som: Enable Mali-G52
  arm64: dts: renesas: r9a09g047: Add Mali-G52 GPU node
  arm64: dts: renesas: rzg3e-smarc-som: Add RAA215300 pmic support
  arm64: dts: renesas: rzg3e-smarc-som: Add I2C2 device pincontrol
  ARM: dts: renesas: r9a06g032-rzn1d400-eb: describe SD card port
  ARM: dts: renesas: r9a06g032: Describe SDHCI controllers
  arm64: dts: renesas: Add initial device tree for RZ/V2N EVK
  arm64: dts: renesas: Add initial SoC DTSI for RZ/V2N
  dt-bindings: pinctrl: renesas: Document RZ/V2N SoC
  dt-bindings: clock: renesas: Document RZ/V2N SoC CPG
  dt-bindings: soc: renesas: Document SYS for RZ/V2N SoC
  dt-bindings: soc: renesas: Document Renesas RZ/V2N SoC variants and EVK
  ARM: dts: renesas: r9a06g032-rzn1d400-db: Describe keys
  ARM: dts: renesas: r9a06g032-rzn1d400-eb: Describe I2C bus
  ARM: dts: renesas: r9a06g032-rzn1d400-db: Describe I2C bus
  ARM: dts: renesas: r9a06g032: Describe I2C controllers
  ...

Link: https://lore.kernel.org/r/cover.1745582596.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
 2025-05-09 22:40:20 +02:00
Pawan Gupta
7a9b709e7c selftest/x86/bugs: Add selftests for ITS 
Below are the tests added for Indirect Target Selection (ITS):

- its_sysfs.py - Check if sysfs reflects the correct mitigation status for
  the mitigation selected via the kernel cmdline.

- its_permutations.py - tests mitigation selection with cmdline
  permutations with other bugs like spectre_v2 and retbleed.

- its_indirect_alignment.py - verifies that for addresses in
  .retpoline_sites section that belong to lower half of cacheline are
  patched to ITS-safe thunk. Typical output looks like below:

  Site 49: function symbol: __x64_sys_restart_syscall+0x1f <0xffffffffbb1509af>
  #     vmlinux: 0xffffffff813509af:    jmp     0xffffffff81f5a8e0
  #     kcore:   0xffffffffbb1509af:    jmpq    *%rax
  #     ITS thunk NOT expected for site 49
  #     PASSED: Found *%rax
  #
  Site 50: function symbol: __resched_curr+0xb0 <0xffffffffbb181910>
  #     vmlinux: 0xffffffff81381910:    jmp     0xffffffff81f5a8e0
  #     kcore:   0xffffffffbb181910:    jmp     0xffffffffc02000fc
  #     ITS thunk expected for site 50
  #     PASSED: Found 0xffffffffc02000fc -> jmpq *%rax <scattered-thunk?>

- its_ret_alignment.py - verifies that for addresses in .return_sites
  section that belong to lower half of cacheline are patched to
  its_return_thunk. Typical output looks like below:

  Site 97: function symbol: collect_event+0x48 <0xffffffffbb007f18>
  #     vmlinux: 0xffffffff81207f18:    jmp     0xffffffff81f5b500
  #     kcore:   0xffffffffbb007f18:    jmp     0xffffffffbbd5b560
  #     PASSED: Found jmp 0xffffffffbbd5b560 <its_return_thunk>
  #
  Site 98: function symbol: collect_event+0xa4 <0xffffffffbb007f74>
  #     vmlinux: 0xffffffff81207f74:    jmp     0xffffffff81f5b500
  #     kcore:   0xffffffffbb007f74:    retq
  #     PASSED: Found retq

Some of these tests have dependency on tools like virtme-ng[1] and drgn[2].
When the dependencies are not met, the test will be skipped.

[1] https://github.com/arighi/virtme-ng
[2] https://github.com/osandov/drgn

Co-developed-by: Tao Zhang <tao1.zhang@linux.intel.com>
Signed-off-by: Tao Zhang <tao1.zhang@linux.intel.com>
Signed-off-by: Pawan Gupta <pawan.kumar.gupta@linux.intel.com>
Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com>
 2025-05-09 13:39:45 -07:00
Peter Zijlstra
e52c1dc745 x86/its: FineIBT-paranoid vs ITS 
FineIBT-paranoid was using the retpoline bytes for the paranoid check,
disabling retpolines, because all parts that have IBT also have eIBRS
and thus don't need no stinking retpolines.

Except... ITS needs the retpolines for indirect calls must not be in
the first half of a cacheline :-/

So what was the paranoid call sequence:

  <fineibt_paranoid_start>:
   0:   41 ba 78 56 34 12       mov    $0x12345678, %r10d
   6:   45 3b 53 f7             cmp    -0x9(%r11), %r10d
   a:   4d 8d 5b <f0>           lea    -0x10(%r11), %r11
   e:   75 fd                   jne    d <fineibt_paranoid_start+0xd>
  10:   41 ff d3                call   *%r11
  13:   90                      nop

Now becomes:

  <fineibt_paranoid_start>:
   0:   41 ba 78 56 34 12       mov    $0x12345678, %r10d
   6:   45 3b 53 f7             cmp    -0x9(%r11), %r10d
   a:   4d 8d 5b f0             lea    -0x10(%r11), %r11
   e:   2e e8 XX XX XX XX	cs call __x86_indirect_paranoid_thunk_r11

  Where the paranoid_thunk looks like:

   1d:  <ea>                    (bad)
   __x86_indirect_paranoid_thunk_r11:
   1e:  75 fd                   jne 1d
   __x86_indirect_its_thunk_r11:
   20:  41 ff eb                jmp *%r11
   23:  cc                      int3

[ dhansen: remove initialization to false ]

Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Signed-off-by: Pawan Gupta <pawan.kumar.gupta@linux.intel.com>
Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com>
Reviewed-by: Alexandre Chartre <alexandre.chartre@oracle.com>
 2025-05-09 13:39:36 -07:00
Arnd Bergmann
5c8cec86a4 Renesas DT binding updates for v6.16 
- Document support for the Renesas RZ/T2H (R9A09G077) SoC and the
     RZT2H-EVK evaluation board,
   - Document support for the Retronix Sparrow Hawk board, which is based
     on R-Car V4H ES3.0.
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Merge tag 'renesas-dt-bindings-for-v6.16-tag1' of https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into soc/dt

Renesas DT binding updates for v6.16

  - Document support for the Renesas RZ/T2H (R9A09G077) SoC and the
    RZT2H-EVK evaluation board,
  - Document support for the Retronix Sparrow Hawk board, which is based
    on R-Car V4H ES3.0.

* tag 'renesas-dt-bindings-for-v6.16-tag1' of https://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
  dt-bindings: soc: renesas: Document Retronix R-Car V4H Sparrow Hawk board support
  dt-bindings: vendor-prefixes: Add Retronix Technology Inc.
  dt-bindings: soc: renesas: Add Renesas RZ/T2H (R9A09G077) SoC

Link: https://lore.kernel.org/r/cover.1745582594.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
 2025-05-09 22:39:31 +02:00
Peter Zijlstra
872df34d7c x86/its: Use dynamic thunks for indirect branches 
ITS mitigation moves the unsafe indirect branches to a safe thunk. This
could degrade the prediction accuracy as the source address of indirect
branches becomes same for different execution paths.

To improve the predictions, and hence the performance, assign a separate
thunk for each indirect callsite. This is also a defense-in-depth measure
to avoid indirect branches aliasing with each other.

As an example, 5000 dynamic thunks would utilize around 16 bits of the
address space, thereby gaining entropy. For a BTB that uses
32 bits for indexing, dynamic thunks could provide better prediction
accuracy over fixed thunks.

Have ITS thunks be variable sized and use EXECMEM_MODULE_TEXT such that
they are both more flexible (got to extend them later) and live in 2M TLBs,
just like kernel code, avoiding undue TLB pressure.

Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Signed-off-by: Pawan Gupta <pawan.kumar.gupta@linux.intel.com>
Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com>
Reviewed-by: Alexandre Chartre <alexandre.chartre@oracle.com>
 2025-05-09 13:36:58 -07:00
Arnd Bergmann
0d57ac1f92 SoCFPGA DTS updates for v6.15 
- Updates to dt-bindings
         - Document Agilex5 NAND daughter board
         - Convert Stratix10 FPGA Manager to json-schema
         - Convert Stratix10 Service Layer to json-schema
         - Add document for Terasic's DE10-nano board
 - Add support for Agilex5 NAND daughter board
 - Add basic support for Terasic's DE10-nano board
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Merge tag 'socfpga_dts_updates_for_v6.15' of https://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux into soc/dt

SoCFPGA DTS updates for v6.15
- Updates to dt-bindings
        - Document Agilex5 NAND daughter board
        - Convert Stratix10 FPGA Manager to json-schema
        - Convert Stratix10 Service Layer to json-schema
        - Add document for Terasic's DE10-nano board
- Add support for Agilex5 NAND daughter board
- Add basic support for Terasic's DE10-nano board

* tag 'socfpga_dts_updates_for_v6.15' of https://git.kernel.org/pub/scm/linux/kernel/git/dinguyen/linux:
  arm64: dts: socfpga: agilex: Add dma channel id for spi
  arm64: dts: socfpga: agilex5: add led and memory nodes
  arm64: dts: intel: socfpga_agilex: add frequencies to internal oscillators
  ARM: dts: socfpga: Add basic support for Terrasic's de10-nano
  dt-bindings: altera: Add compatible for Terasic's DE10-nano
  arm64: dts: socfpga: agilex5: add qspi flash node
  dt-bindings: firmware: stratix10: Convert to json-schema
  dt-bindings: fpga: stratix10: Convert to json-schema
  arm64: dts: socfpga: agilex5: fix gpio0 address
  arm64: dts: socfpga: agilex5: add NAND daughter board
  dt-bindings: intel: document Agilex5 NAND daughter board

Link: https://lore.kernel.org/r/20250326121152.1739873-1-dinguyen@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
 2025-05-09 22:34:37 +02:00
Pawan Gupta
ebebe30794 x86/ibt: Keep IBT disabled during alternative patching 
cfi_rewrite_callers() updates the fineIBT hash matching at the caller side,
but except for paranoid-mode it relies on apply_retpoline() and friends for
any ENDBR relocation. This could temporarily cause an indirect branch to
land on a poisoned ENDBR.

For instance, with para-virtualization enabled, a simple wrmsrl() could
have an indirect branch pointing to native_write_msr() who's ENDBR has been
relocated due to fineIBT:

<wrmsrl>:
       push   %rbp
       mov    %rsp,%rbp
       mov    %esi,%eax
       mov    %rsi,%rdx
       shr    $0x20,%rdx
       mov    %edi,%edi
       mov    %rax,%rsi
       call   *0x21e65d0(%rip)        # <pv_ops+0xb8>
       ^^^^^^^^^^^^^^^^^^^^^^^

Such an indirect call during the alternative patching could #CP if the
caller is not *yet* adjusted for the new target ENDBR. To prevent a false
 #CP, keep CET-IBT disabled until all callers are patched.

Patching during the module load does not need to be guarded by IBT-disable
because the module code is not executed until the patching is complete.

Signed-off-by: Pawan Gupta <pawan.kumar.gupta@linux.intel.com>
Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com>
Reviewed-by: Alexandre Chartre <alexandre.chartre@oracle.com>
 2025-05-09 13:33:35 -07:00
Peter Zijlstra
d6d1e3e658 mm/execmem: Unify early execmem_cache behaviour 
Early kernel memory is RWX, only at the end of early boot (before SMP)
do we mark things ROX. Have execmem_cache mirror this behaviour for
early users.

This avoids having to remember what code is execmem and what is not --
we can poke everything with impunity ;-) Also performance for not
having to do endless text_poke_mm switches.

Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org>
Signed-off-by: Pawan Gupta <pawan.kumar.gupta@linux.intel.com>
Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com>
Reviewed-by: Alexandre Chartre <alexandre.chartre@oracle.com>
 2025-05-09 13:33:20 -07:00
Wolfram Sang
7dc891191e
 		ARM: dts: vt8500: use correct ohci/ehci node names 
They should be named "usb@".

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20250330193833.21970-12-wsa+renesas@sang-engineering.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
 2025-05-09 22:31:19 +02:00
Wolfram Sang
a31e23eb5e
 		ARM: dts: ti: omap: use correct ohci/ehci node names 
They should be named "usb@".

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20250330193833.21970-11-wsa+renesas@sang-engineering.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
 2025-05-09 22:31:19 +02:00
Wolfram Sang
e06534a1bd
 		ARM: dts: st: use correct ohci/ehci node names 
They should be named "usb@".

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20250330193833.21970-10-wsa+renesas@sang-engineering.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
 2025-05-09 22:31:18 +02:00
Wolfram Sang
dd8d5cd90b
 		ARM: dts: nxp: lpc: use correct ohci/ehci node names 
They should be named "usb@".

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20250330193833.21970-9-wsa+renesas@sang-engineering.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
 2025-05-09 22:31:18 +02:00
Wolfram Sang
49683c02d8
 		ARM: dts: marvell: use correct ohci/ehci node names 
They should be named "usb@".

Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20250330193833.21970-8-wsa+renesas@sang-engineering.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
 2025-05-09 22:31:18 +02:00
Rob Herring (Arm)
09acc3266c
 		arm64: dts: amazon: Fix simple-bus node name schema warnings 
Fix a couple of node name warnings from the schema checks:

arch/arm64/boot/dts/amazon/alpine-v2-evp.dt.yaml: io-fabric: $nodename:0: 'io-fabric' does not match '^(bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$'
arch/arm64/boot/dts/amazon/alpine-v3-evp.dt.yaml: io-fabric: $nodename:0: 'io-fabric' does not match '^(bus|soc|axi|ahb|apb)(@[0-9a-f]+)?$'

Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Link: https://lore.kernel.org/r/20250409210255.1541298-1-robh@kernel.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
 2025-05-09 22:28:46 +02:00
Wolfram Sang
3238532ba5
 		MAINTAINERS: delete email for Shiraz Hashim 
The email address bounced. I couldn't find a newer one in recent git
history (last activity 9 years ago), so delete this email entry.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20250331190731.5094-2-wsa+renesas@sang-engineering.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
 2025-05-09 22:27:27 +02:00
Pawan Gupta
f0cd7091cc x86/its: Align RETs in BHB clear sequence to avoid thunking 
The software mitigation for BHI is to execute BHB clear sequence at syscall
entry, and possibly after a cBPF program. ITS mitigation thunks RETs in the
lower half of the cacheline. This causes the RETs in the BHB clear sequence
to be thunked as well, adding unnecessary branches to the BHB clear
sequence.

Since the sequence is in hot path, align the RET instructions in the
sequence to avoid thunking.

This is how disassembly clear_bhb_loop() looks like after this change:

   0x44 <+4>:     mov    $0x5,%ecx
   0x49 <+9>:     call   0xffffffff81001d9b <clear_bhb_loop+91>
   0x4e <+14>:    jmp    0xffffffff81001de5 <clear_bhb_loop+165>
   0x53 <+19>:    int3
   ...
   0x9b <+91>:    call   0xffffffff81001dce <clear_bhb_loop+142>
   0xa0 <+96>:    ret
   0xa1 <+97>:    int3
   ...
   0xce <+142>:   mov    $0x5,%eax
   0xd3 <+147>:   jmp    0xffffffff81001dd6 <clear_bhb_loop+150>
   0xd5 <+149>:   nop
   0xd6 <+150>:   sub    $0x1,%eax
   0xd9 <+153>:   jne    0xffffffff81001dd3 <clear_bhb_loop+147>
   0xdb <+155>:   sub    $0x1,%ecx
   0xde <+158>:   jne    0xffffffff81001d9b <clear_bhb_loop+91>
   0xe0 <+160>:   ret
   0xe1 <+161>:   int3
   0xe2 <+162>:   int3
   0xe3 <+163>:   int3
   0xe4 <+164>:   int3
   0xe5 <+165>:   lfence
   0xe8 <+168>:   pop    %rbp
   0xe9 <+169>:   ret

Suggested-by: Andrew Cooper <andrew.cooper3@citrix.com>
Signed-off-by: Pawan Gupta <pawan.kumar.gupta@linux.intel.com>
Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com>
Reviewed-by: Alexandre Chartre <alexandre.chartre@oracle.com>
 2025-05-09 13:22:05 -07:00
Pawan Gupta
facd226f7e x86/its: Add support for RSB stuffing mitigation 
When retpoline mitigation is enabled for spectre-v2, enabling
call-depth-tracking and RSB stuffing also mitigates ITS. Add cmdline option
indirect_target_selection=stuff to allow enabling RSB stuffing mitigation.

When retpoline mitigation is not enabled, =stuff option is ignored, and
default mitigation for ITS is deployed.

Signed-off-by: Pawan Gupta <pawan.kumar.gupta@linux.intel.com>
Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com>
Reviewed-by: Josh Poimboeuf <jpoimboe@kernel.org>
Reviewed-by: Alexandre Chartre <alexandre.chartre@oracle.com>
 2025-05-09 13:22:05 -07:00
Pawan Gupta
2665281a07 x86/its: Add "vmexit" option to skip mitigation on some CPUs 
Ice Lake generation CPUs are not affected by guest/host isolation part of
ITS. If a user is only concerned about KVM guests, they can now choose a
new cmdline option "vmexit" that will not deploy the ITS mitigation when
CPU is not affected by guest/host isolation. This saves the performance
overhead of ITS mitigation on Ice Lake gen CPUs.

When "vmexit" option selected, if the CPU is affected by ITS guest/host
isolation, the default ITS mitigation is deployed.

Signed-off-by: Pawan Gupta <pawan.kumar.gupta@linux.intel.com>
Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com>
Reviewed-by: Josh Poimboeuf <jpoimboe@kernel.org>
Reviewed-by: Alexandre Chartre <alexandre.chartre@oracle.com>
 2025-05-09 13:22:05 -07:00
Pawan Gupta
f4818881c4 x86/its: Enable Indirect Target Selection mitigation 
Indirect Target Selection (ITS) is a bug in some pre-ADL Intel CPUs with
eIBRS. It affects prediction of indirect branch and RETs in the
lower half of cacheline. Due to ITS such branches may get wrongly predicted
to a target of (direct or indirect) branch that is located in the upper
half of the cacheline.

Scope of impact
===============

Guest/host isolation
--------------------
When eIBRS is used for guest/host isolation, the indirect branches in the
VMM may still be predicted with targets corresponding to branches in the
guest.

Intra-mode
----------
cBPF or other native gadgets can be used for intra-mode training and
disclosure using ITS.

User/kernel isolation
---------------------
When eIBRS is enabled user/kernel isolation is not impacted.

Indirect Branch Prediction Barrier (IBPB)
-----------------------------------------
After an IBPB, indirect branches may be predicted with targets
corresponding to direct branches which were executed prior to IBPB. This is
mitigated by a microcode update.

Add cmdline parameter indirect_target_selection=off|on|force to control the
mitigation to relocate the affected branches to an ITS-safe thunk i.e.
located in the upper half of cacheline. Also add the sysfs reporting.

When retpoline mitigation is deployed, ITS safe-thunks are not needed,
because retpoline sequence is already ITS-safe. Similarly, when call depth
tracking (CDT) mitigation is deployed (retbleed=stuff), ITS safe return
thunk is not used, as CDT prevents RSB-underflow.

To not overcomplicate things, ITS mitigation is not supported with
spectre-v2 lfence;jmp mitigation. Moreover, it is less practical to deploy
lfence;jmp mitigation on ITS affected parts anyways.

Signed-off-by: Pawan Gupta <pawan.kumar.gupta@linux.intel.com>
Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com>
Reviewed-by: Josh Poimboeuf <jpoimboe@kernel.org>
Reviewed-by: Alexandre Chartre <alexandre.chartre@oracle.com>
 2025-05-09 13:22:05 -07:00
Pawan Gupta
a75bf27fe4 x86/its: Add support for ITS-safe return thunk 
RETs in the lower half of cacheline may be affected by ITS bug,
specifically when the RSB-underflows. Use ITS-safe return thunk for such
RETs.

RETs that are not patched:

- RET in retpoline sequence does not need to be patched, because the
  sequence itself fills an RSB before RET.
- RET in Call Depth Tracking (CDT) thunks __x86_indirect_{call|jump}_thunk
  and call_depth_return_thunk are not patched because CDT by design
  prevents RSB-underflow.
- RETs in .init section are not reachable after init.
- RETs that are explicitly marked safe with ANNOTATE_UNRET_SAFE.

Signed-off-by: Pawan Gupta <pawan.kumar.gupta@linux.intel.com>
Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com>
Reviewed-by: Josh Poimboeuf <jpoimboe@kernel.org>
Reviewed-by: Alexandre Chartre <alexandre.chartre@oracle.com>
 2025-05-09 13:22:05 -07:00
Pawan Gupta
8754e67ad4 x86/its: Add support for ITS-safe indirect thunk 
Due to ITS, indirect branches in the lower half of a cacheline may be
vulnerable to branch target injection attack.

Introduce ITS-safe thunks to patch indirect branches in the lower half of
cacheline with the thunk. Also thunk any eBPF generated indirect branches
in emit_indirect_jump().

Below category of indirect branches are not mitigated:

- Indirect branches in the .init section are not mitigated because they are
  discarded after boot.
- Indirect branches that are explicitly marked retpoline-safe.

Note that retpoline also mitigates the indirect branches against ITS. This
is because the retpoline sequence fills an RSB entry before RET, and it
does not suffer from RSB-underflow part of the ITS.

Signed-off-by: Pawan Gupta <pawan.kumar.gupta@linux.intel.com>
Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com>
Reviewed-by: Josh Poimboeuf <jpoimboe@kernel.org>
Reviewed-by: Alexandre Chartre <alexandre.chartre@oracle.com>
 2025-05-09 13:22:04 -07:00
Pawan Gupta
159013a7ca x86/its: Enumerate Indirect Target Selection (ITS) bug 
ITS bug in some pre-Alderlake Intel CPUs may allow indirect branches in the
first half of a cache line get predicted to a target of a branch located in
the second half of the cache line.

Set X86_BUG_ITS on affected CPUs. Mitigation to follow in later commits.

Signed-off-by: Pawan Gupta <pawan.kumar.gupta@linux.intel.com>
Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com>
Reviewed-by: Josh Poimboeuf <jpoimboe@kernel.org>
Reviewed-by: Alexandre Chartre <alexandre.chartre@oracle.com>
 2025-05-09 13:22:04 -07:00
Pawan Gupta
1ac116ce64 Documentation: x86/bugs/its: Add ITS documentation 
Add the admin-guide for Indirect Target Selection (ITS).

Signed-off-by: Pawan Gupta <pawan.kumar.gupta@linux.intel.com>
Signed-off-by: Dave Hansen <dave.hansen@linux.intel.com>
Reviewed-by: Josh Poimboeuf <jpoimboe@kernel.org>
Reviewed-by: Alexandre Chartre <alexandre.chartre@oracle.com>
 2025-05-09 13:22:04 -07:00
Dave Airlie
806690425a Non-display related: 
- Fix undefined reference to `intel_pxp_gsccs_is_ready_for_sessions'
 
 Display related:
 - More work towards display separation (Jani)
 - Stop writing VRR_CTL_IGN_MAX_SHIFT for MTL onwards (Jouni)
 - DSC checks for 3 engines (Ankit)
 - Add link rate and lane count to i915_display_info (Khaled)
 - PSR fixes and workaround for underrun on idle (Jouni)
 - LOBF enablement and ALMP fixes (Animesh)
 - Clean up VGA plane handling (Ville)
 - Use an intel_connector pointer everywhere (Imre)
 - Fix warning for coffeelake on SunrisePoint PCH (Jiajia)
 - Rework/Correction on minimum hblank calculation (Arun)
 - Dmesg clean up (Jani)
 - Add a couple of simple display workarounds (Ankit, Vinod)
 - Refactor HDCP GSC (Jani)
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Merge tag 'drm-intel-next-2025-05-08' of https://gitlab.freedesktop.org/drm/i915/kernel into drm-next

Non-display related:
- Fix undefined reference to `intel_pxp_gsccs_is_ready_for_sessions'

Display related:
- More work towards display separation (Jani)
- Stop writing VRR_CTL_IGN_MAX_SHIFT for MTL onwards (Jouni)
- DSC checks for 3 engines (Ankit)
- Add link rate and lane count to i915_display_info (Khaled)
- PSR fixes and workaround for underrun on idle (Jouni)
- LOBF enablement and ALMP fixes (Animesh)
- Clean up VGA plane handling (Ville)
- Use an intel_connector pointer everywhere (Imre)
- Fix warning for coffeelake on SunrisePoint PCH (Jiajia)
- Rework/Correction on minimum hblank calculation (Arun)
- Dmesg clean up (Jani)
- Add a couple of simple display workarounds (Ankit, Vinod)
- Refactor HDCP GSC (Jani)

Signed-off-by: Dave Airlie <airlied@redhat.com>

From: Rodrigo Vivi <rodrigo.vivi@intel.com>
Link: https://lore.kernel.org/r/aByyL3bEufPu79OM@intel.com
 2025-05-10 06:12:18 +10:00
Ian Rogers
cd17a9b1a7 perf test demangle-ocaml: Switch to using dso__demangle_sym() 
The use of the demangle-ocaml APIs means we don't detect if a different
demangler is used before the OCaml one for the case that matters to
perf.

Signed-off-by: Ian Rogers <irogers@google.com>
Cc: Adrian Hunter <adrian.hunter@intel.com>
Cc: Alex Gaynor <alex.gaynor@gmail.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Alice Ryhl <aliceryhl@google.com>
Cc: Andreas Hindborg <a.hindborg@kernel.org>
Cc: Ariel Ben-Yehuda <ariel.byd@gmail.com>
Cc: Benno Lossin <benno.lossin@proton.me>
Cc: Bill Wendling <morbo@google.com>
Cc: Björn Roy Baron <bjorn3_gh@protonmail.com>
Cc: Boqun Feng <boqun.feng@gmail.com>
Cc: Daniel Xu <dxu@dxuuu.xyz>
Cc: Danilo Krummrich <dakr@kernel.org>
Cc: Gary Guo <gary@garyguo.net>
Cc: Howard Chu <howardchu95@gmail.com>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: James Clark <james.clark@linaro.org>
Cc: Jiapeng Chong <jiapeng.chong@linux.alibaba.com>
Cc: Jiri Olsa <jolsa@kernel.org>
Cc: Justin Stitt <justinstitt@google.com>
Cc: Kan Liang <kan.liang@linux.intel.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Masami Hiramatsu <mhiramat@kernel.org>
Cc: Miguel Ojeda <ojeda@kernel.org>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Nathan Chancellor <nathan@kernel.org>
Cc: Nick Desaulniers <nick.desaulniers+lkml@gmail.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Ravi Bangoria <ravi.bangoria@amd.com>
Cc: Stephen Brennan <stephen.s.brennan@oracle.com>
Cc: Trevor Gross <tmgross@umich.edu>
Link: https://lore.kernel.org/r/20250430004128.474388-7-irogers@google.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
 2025-05-09 17:03:09 -03:00
Ian Rogers
41fcc9a343 perf test demangle-java: Switch to using dso__demangle_sym() 
The use of the demangle-java APIs means we don't detect if a different
demangler is used before the Java one for the case that matters to
perf.

Remove the return types from the demangled names as dso__demangle_sym()
removes those.

Signed-off-by: Ian Rogers <irogers@google.com>
Cc: Adrian Hunter <adrian.hunter@intel.com>
Cc: Alex Gaynor <alex.gaynor@gmail.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Alice Ryhl <aliceryhl@google.com>
Cc: Andreas Hindborg <a.hindborg@kernel.org>
Cc: Ariel Ben-Yehuda <ariel.byd@gmail.com>
Cc: Benno Lossin <benno.lossin@proton.me>
Cc: Bill Wendling <morbo@google.com>
Cc: Björn Roy Baron <bjorn3_gh@protonmail.com>
Cc: Boqun Feng <boqun.feng@gmail.com>
Cc: Daniel Xu <dxu@dxuuu.xyz>
Cc: Danilo Krummrich <dakr@kernel.org>
Cc: Gary Guo <gary@garyguo.net>
Cc: Howard Chu <howardchu95@gmail.com>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: James Clark <james.clark@linaro.org>
Cc: Jiapeng Chong <jiapeng.chong@linux.alibaba.com>
Cc: Jiri Olsa <jolsa@kernel.org>
Cc: Justin Stitt <justinstitt@google.com>
Cc: Kan Liang <kan.liang@linux.intel.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Masami Hiramatsu <mhiramat@kernel.org>
Cc: Miguel Ojeda <ojeda@kernel.org>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Nathan Chancellor <nathan@kernel.org>
Cc: Nick Desaulniers <nick.desaulniers+lkml@gmail.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Ravi Bangoria <ravi.bangoria@amd.com>
Cc: Stephen Brennan <stephen.s.brennan@oracle.com>
Cc: Trevor Gross <tmgross@umich.edu>
Link: https://lore.kernel.org/r/20250430004128.474388-6-irogers@google.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
 2025-05-09 17:02:23 -03:00
Ian Rogers
bdf05ccd18 perf test demangle-rust: Add Rust demangling test 
The test cases are listed examples in:

https://doc.rust-lang.org/rustc/symbol-mangling/v0.html

This test was previously part of a different Rust v0 demangler:

https://lore.kernel.org/lkml/20250129193037.573431-1-irogers@google.com/

Signed-off-by: Ian Rogers <irogers@google.com>
Cc: Adrian Hunter <adrian.hunter@intel.com>
Cc: Alex Gaynor <alex.gaynor@gmail.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Alice Ryhl <aliceryhl@google.com>
Cc: Andreas Hindborg <a.hindborg@kernel.org>
Cc: Ariel Ben-Yehuda <ariel.byd@gmail.com>
Cc: Benno Lossin <benno.lossin@proton.me>
Cc: Bill Wendling <morbo@google.com>
Cc: Björn Roy Baron <bjorn3_gh@protonmail.com>
Cc: Boqun Feng <boqun.feng@gmail.com>
Cc: Daniel Xu <dxu@dxuuu.xyz>
Cc: Danilo Krummrich <dakr@kernel.org>
Cc: Gary Guo <gary@garyguo.net>
Cc: Howard Chu <howardchu95@gmail.com>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: James Clark <james.clark@linaro.org>
Cc: Jiapeng Chong <jiapeng.chong@linux.alibaba.com>
Cc: Jiri Olsa <jolsa@kernel.org>
Cc: Justin Stitt <justinstitt@google.com>
Cc: Kan Liang <kan.liang@linux.intel.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Masami Hiramatsu <mhiramat@kernel.org>
Cc: Miguel Ojeda <ojeda@kernel.org>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Nathan Chancellor <nathan@kernel.org>
Cc: Nick Desaulniers <nick.desaulniers+lkml@gmail.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Ravi Bangoria <ravi.bangoria@amd.com>
Cc: Stephen Brennan <stephen.s.brennan@oracle.com>
Cc: Trevor Gross <tmgross@umich.edu>
Link: https://lore.kernel.org/r/20250430004128.474388-5-irogers@google.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
 2025-05-09 17:01:57 -03:00
Ian Rogers
ac292ea7c3 perf demangle-rust: Remove previous legacy rust decoder 
Code is unused since the introduction of rustc-demangle demangler.

Reviewed-by: Miguel Ojeda <ojeda@kernel.org>
Signed-off-by: Ian Rogers <irogers@google.com>
Cc: Adrian Hunter <adrian.hunter@intel.com>
Cc: Alex Gaynor <alex.gaynor@gmail.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Alice Ryhl <aliceryhl@google.com>
Cc: Andreas Hindborg <a.hindborg@kernel.org>
Cc: Ariel Ben-Yehuda <ariel.byd@gmail.com>
Cc: Benno Lossin <benno.lossin@proton.me>
Cc: Bill Wendling <morbo@google.com>
Cc: Björn Roy Baron <bjorn3_gh@protonmail.com>
Cc: Boqun Feng <boqun.feng@gmail.com>
Cc: Daniel Xu <dxu@dxuuu.xyz>
Cc: Danilo Krummrich <dakr@kernel.org>
Cc: Gary Guo <gary@garyguo.net>
Cc: Howard Chu <howardchu95@gmail.com>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: James Clark <james.clark@linaro.org>
Cc: Jiapeng Chong <jiapeng.chong@linux.alibaba.com>
Cc: Jiri Olsa <jolsa@kernel.org>
Cc: Justin Stitt <justinstitt@google.com>
Cc: Kan Liang <kan.liang@linux.intel.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Masami Hiramatsu <mhiramat@kernel.org>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Nathan Chancellor <nathan@kernel.org>
Cc: Nick Desaulniers <nick.desaulniers+lkml@gmail.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Ravi Bangoria <ravi.bangoria@amd.com>
Cc: Stephen Brennan <stephen.s.brennan@oracle.com>
Cc: Trevor Gross <tmgross@umich.edu>
Link: https://lore.kernel.org/r/20250430004128.474388-4-irogers@google.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
 2025-05-09 17:01:39 -03:00
Andrii Nakryiko
5a8cb23161 Merge branch 'bpf-retrieve-ref_ctr_offset-from-uprobe-perf-link' 
Jiri Olsa says:

====================
bpf: Retrieve ref_ctr_offset from uprobe perf link

hi,
adding ref_ctr_offset retrieval for uprobe perf link info.

v2 changes:
  - display ref_ctr_offset as hex number [Andrii]
  - added acks

thanks,
jirka
---
====================

Link: https://patch.msgid.link/20250509153539.779599-1-jolsa@kernel.org
Signed-off-by: Andrii Nakryiko <andrii@kernel.org>
 2025-05-09 13:01:09 -07:00
Jiri Olsa
97596edfec bpftool: Display ref_ctr_offset for uprobe link info 
Adding support to display ref_ctr_offset in link output, like:

  # bpftool link
  ...
  42: perf_event  prog 174
          uprobe /proc/self/exe+0x102f13  cookie 3735928559  ref_ctr_offset 0x303a3fa
          bpf_cookie 3735928559
          pids test_progs(1820)

  # bpftool link -j | jq
  [
    ...
    {
      "id": 42,
       ...
      "ref_ctr_offset": 50500538,
    }
  ]

Signed-off-by: Jiri Olsa <jolsa@kernel.org>
Signed-off-by: Andrii Nakryiko <andrii@kernel.org>
Link: https://lore.kernel.org/bpf/20250509153539.779599-4-jolsa@kernel.org
 2025-05-09 13:01:08 -07:00
Jiri Olsa
d57293db64 selftests/bpf: Add link info test for ref_ctr_offset retrieval 
Adding link info test for ref_ctr_offset retrieval for both
uprobe and uretprobe probes.

Signed-off-by: Jiri Olsa <jolsa@kernel.org>
Signed-off-by: Andrii Nakryiko <andrii@kernel.org>
Acked-by: Yafang Shao <laoar.shao@gmail.com>
Link: https://lore.kernel.org/bpf/20250509153539.779599-3-jolsa@kernel.org
 2025-05-09 13:01:08 -07:00
Jiri Olsa
8231533340 bpf: Add support to retrieve ref_ctr_offset for uprobe perf link 
Adding support to retrieve ref_ctr_offset for uprobe perf link,
which got somehow omitted from the initial uprobe link info changes.

Signed-off-by: Jiri Olsa <jolsa@kernel.org>
Signed-off-by: Andrii Nakryiko <andrii@kernel.org>
Acked-by: Yafang Shao <laoar.shao@gmail.com>
Link: https://lore.kernel.org/bpf/20250509153539.779599-2-jolsa@kernel.org
 2025-05-09 13:01:07 -07:00
Ian Rogers
e20848c317 perf symbol-elf: Integrate rust-v0 demangling 
Use the demangle-rust-v0 APIs to see if symbol is Rust mangled and
demangle if so.

The API requires a pre-allocated output buffer, some estimation and
retrying are added for this.

Signed-off-by: Ian Rogers <irogers@google.com>
Cc: Adrian Hunter <adrian.hunter@intel.com>
Cc: Alex Gaynor <alex.gaynor@gmail.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Alice Ryhl <aliceryhl@google.com>
Cc: Andreas Hindborg <a.hindborg@kernel.org>
Cc: Ariel Ben-Yehuda <ariel.byd@gmail.com>
Cc: Benno Lossin <benno.lossin@proton.me>
Cc: Bill Wendling <morbo@google.com>
Cc: Björn Roy Baron <bjorn3_gh@protonmail.com>
Cc: Boqun Feng <boqun.feng@gmail.com>
Cc: Daniel Xu <dxu@dxuuu.xyz>
Cc: Danilo Krummrich <dakr@kernel.org>
Cc: Gary Guo <gary@garyguo.net>
Cc: Howard Chu <howardchu95@gmail.com>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: James Clark <james.clark@linaro.org>
Cc: Jiapeng Chong <jiapeng.chong@linux.alibaba.com>
Cc: Jiri Olsa <jolsa@kernel.org>
Cc: Justin Stitt <justinstitt@google.com>
Cc: Kan Liang <kan.liang@linux.intel.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Masami Hiramatsu <mhiramat@kernel.org>
Cc: Miguel Ojeda <ojeda@kernel.org>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Nathan Chancellor <nathan@kernel.org>
Cc: Nick Desaulniers <nick.desaulniers+lkml@gmail.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Ravi Bangoria <ravi.bangoria@amd.com>
Cc: Stephen Brennan <stephen.s.brennan@oracle.com>
Cc: Trevor Gross <tmgross@umich.edu>
Link: https://lore.kernel.org/r/20250430004128.474388-3-irogers@google.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
 2025-05-09 17:00:59 -03:00
Ian Rogers
60869b22af perf demangle-rust: Add rustc-demangle C demangler 
Imported at commit 80e40f57d99f ("add comment about finding latest
version of code") from:

https://github.com/rust-lang/rustc-demangle/blob/main/crates/native-c/src/demangle.c
https://github.com/rust-lang/rustc-demangle/blob/main/crates/native-c/include/demangle.h

There is discussion of this issue motivating the import in:

https://github.com/rust-lang/rust/issues/60705
https://lore.kernel.org/lkml/20250129193037.573431-1-irogers@google.com/

The SPDX lines reflect the dual license Apache-2 or MIT in:

https://github.com/rust-lang/rustc-demangle/blob/main/README.md

Following Migual Ojeda's suggestion comments were added on copyright and
keeping the code in sync with upstream.

The files are renamed as perf supports multiple demanglers and so
demangle as a name would be overloaded.

The work here was done by Ariel Ben-Yehuda <ariel.byd@gmail.com> and I
am merely importing it as discussed in the rust-lang issue.

Reviewed-by: Miguel Ojeda <ojeda@kernel.org>
Signed-off-by: Ian Rogers <irogers@google.com>
Cc: Adrian Hunter <adrian.hunter@intel.com>
Cc: Alex Gaynor <alex.gaynor@gmail.com>
Cc: Alexander Shishkin <alexander.shishkin@linux.intel.com>
Cc: Alice Ryhl <aliceryhl@google.com>
Cc: Andreas Hindborg <a.hindborg@kernel.org>
Cc: Ariel Ben-Yehuda <ariel.byd@gmail.com>
Cc: Benno Lossin <benno.lossin@proton.me>
Cc: Bill Wendling <morbo@google.com>
Cc: Björn Roy Baron <bjorn3_gh@protonmail.com>
Cc: Boqun Feng <boqun.feng@gmail.com>
Cc: Daniel Xu <dxu@dxuuu.xyz>
Cc: Danilo Krummrich <dakr@kernel.org>
Cc: Gary Guo <gary@garyguo.net>
Cc: Howard Chu <howardchu95@gmail.com>
Cc: Ingo Molnar <mingo@redhat.com>
Cc: James Clark <james.clark@linaro.org>
Cc: Jiapeng Chong <jiapeng.chong@linux.alibaba.com>
Cc: Jiri Olsa <jolsa@kernel.org>
Cc: Justin Stitt <justinstitt@google.com>
Cc: Kan Liang <kan.liang@linux.intel.com>
Cc: Mark Rutland <mark.rutland@arm.com>
Cc: Masami Hiramatsu <mhiramat@kernel.org>
Cc: Namhyung Kim <namhyung@kernel.org>
Cc: Nathan Chancellor <nathan@kernel.org>
Cc: Nick Desaulniers <nick.desaulniers+lkml@gmail.com>
Cc: Peter Zijlstra <peterz@infradead.org>
Cc: Ravi Bangoria <ravi.bangoria@amd.com>
Cc: Stephen Brennan <stephen.s.brennan@oracle.com>
Cc: Trevor Gross <tmgross@umich.edu>
Link: https://lore.kernel.org/r/20250430004128.474388-2-irogers@google.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
 2025-05-09 17:00:05 -03:00
Sebastian Reichel
376cb96962 arm64: dts: rockchip: add Rock 5B+ 
Add ROCK 5B+, which is an improved version of the ROCK 5B with the
following changes:

 * Memory LPDDR4X -> LPDDR5
 * HDMI input connector size
 * eMMC socket -> onboard
 * M.2 E-Key is replaced by onboard RTL8852BE WLAN/BT
 * M.2 M-Key 1x4 lanes is replaced by 2x2 lanes
 * Added M.2 B-Key for USB connected WWAN modules (untested)
 * Add second camera port (not yet supported in upstream Linux)
 * Add dedicated USB-C port for device power (no impact in DT;
   the existing port has not been changed and the new port is
   handled by CH224D standalone chip)

Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Link: https://lore.kernel.org/r/20250508-rock5bp-for-upstream-v2-4-677033cc1ac2@kernel.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
 2025-05-09 21:56:26 +02:00
FUKAUMI Naoki
874c111762 dt-bindings: arm: rockchip: Add Radxa ROCK 5B+ 
The Radxa ROCK 5B+ is an improved version of the ROCK 5B.

Signed-off-by: FUKAUMI Naoki <naoki@radxa.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Link: https://lore.kernel.org/r/20250508-rock5bp-for-upstream-v2-3-677033cc1ac2@kernel.org
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
 2025-05-09 21:56:26 +02:00
Sebastian Reichel
aadfbdcf7e arm64: dts: rockchip: move rock 5b to include file 
Radxa released some more boards, which are based on the original
Rock 5B. Move its board description into an include file to avoid
unnecessary duplication.

Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Link: https://lore.kernel.org/r/20250508-rock5bp-for-upstream-v2-1-677033cc1ac2@kernel.org
Link: https://lore.kernel.org/r/20250508-rock5bp-for-upstream-v2-2-677033cc1ac2@kernel.org

[The original submission was split into two elements, renaming the file
 and then moving some nodes around. This was done to make review easier
 due to the diff being smaller. This commit is a squash of both of them
 to facilitate bisectability and was also intended by the original author]
Signed-off-by: Heiko Stuebner <heiko@sntech.de>
 2025-05-09 21:53:42 +02:00