Move the non-VMX chunk of the "interrupt blocked" checks to a separate
helper so that KVM can reuse the code to detect if interrupts are blocked
for L2, e.g. to determine if a virtual interrupt _for L2_ is a valid wake
event. If L1 disables HLT-exiting for L2, nested APICv is enabled, and L2
HLTs, then L2 virtual interrupts are valid wake events, but if and only if
interrupts are unblocked for L2.
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/20240607172609.3205077-4-seanjc@google.com
Signed-off-by: Sean Christopherson <seanjc@google.com>
When requesting an immediate exit from L2 in order to inject a pending
event, do so only if the pending event actually requires manual injection,
i.e. if and only if KVM actually needs to regain control in order to
deliver the event.
Avoiding the "immediate exit" isn't simply an optimization, it's necessary
to make forward progress, as the "already expired" VMX preemption timer
trick that KVM uses to force a VM-Exit has higher priority than events
that aren't directly injected.
At present time, this is a glorified nop as all events processed by
vmx_has_nested_events() require injection, but that will not hold true in
the future, e.g. if there's a pending virtual interrupt in vmcs02.RVI.
I.e. if KVM is trying to deliver a virtual interrupt to L2, the expired
VMX preemption timer will trigger VM-Exit before the virtual interrupt is
delivered, and KVM will effectively hang the vCPU in an endless loop of
forced immediate VM-Exits (because the pending virtual interrupt never
goes away).
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/20240607172609.3205077-3-seanjc@google.com
Signed-off-by: Sean Christopherson <seanjc@google.com>
Add a helper to retrieve the highest pending vector given a Posted
Interrupt descriptor. While the actual operation is straightforward, it's
surprisingly easy to mess up, e.g. if one tries to reuse lapic.c's
find_highest_vector(), which doesn't work with PID.PIR due to the APIC's
IRR and ISR component registers being physically discontiguous (they're
4-byte registers aligned at 16-byte intervals).
To make PIR handling more consistent with respect to IRR and ISR handling,
return -1 to indicate "no interrupt pending".
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/20240607172609.3205077-2-seanjc@google.com
Signed-off-by: Sean Christopherson <seanjc@google.com>
In the vmx_init() error handling path, the __vmx_exit() is done before
kvm_x86_vendor_exit(). They should follow the same order in vmx_exit().
But currently __vmx_exit() is done after kvm_x86_vendor_exit() in
vmx_exit(). Switch the order of them to fix.
Fixes: e32b120071 ("KVM: VMX: Do _all_ initialization before exposing /dev/kvm to userspace")
Signed-off-by: Kai Huang <kai.huang@intel.com>
Link: https://lore.kernel.org/r/20240627010524.3732488-1-kai.huang@intel.com
Signed-off-by: Sean Christopherson <seanjc@google.com>
Support tracking of up to 65535 packets per table entry instead of just
255 to better facilitate longer term tracking or higher throughput
scenarios.
Note how this aligns sizes of struct recent_entry's 'nstamps' and
'index' fields when 'nstamps' was larger before. This is unnecessary as
the value of 'nstamps' grows along with that of 'index' after being
initialized to 1 (see recent_entry_update()). Its value will thus never
exceed that of 'index' and therefore does not need to provide space for
larger values.
Requested-by: Fabio <pedretti.fabio@gmail.com>
Link: https://bugzilla.netfilter.org/show_bug.cgi?id=1745
Signed-off-by: Phil Sutter <phil@nwl.cc>
Signed-off-by: Pablo Neira Ayuso <pablo@netfilter.org>
If userspace program exits while the queue its subscribed to has packets
those need to be discarded.
commit dc21c6cc3d ("netfilter: nfnetlink_queue: acquire rcu_read_lock()
in instance_destroy_rcu()") fixed a (harmless) rcu splat that could be
triggered in this case.
Add a test case to cover this.
Signed-off-by: Florian Westphal <fw@strlen.de>
Signed-off-by: Pablo Neira Ayuso <pablo@netfilter.org>
Remove the completely pointess global INVEPT, i.e. EPT TLB flush, from
KVM's VMX enablement path. KVM always does a targeted TLB flush when
using a "new" EPT root, in quotes because "new" simply means a root that
isn't currently being used by the vCPU.
KVM also _deliberately_ runs with stale TLB entries for defunct roots,
i.e. doesn't do a TLB flush when vCPUs stop using roots, precisely because
KVM does the flush on first use. As called out by the comment in
kvm_mmu_load(), the reason KVM flushes on first use is because KVM can't
guarantee the correctness of past hypervisors.
Jumping back to the global INVEPT, when the painfully terse commit
1439442c7b ("KVM: VMX: Enable EPT feature for KVM") was added, the
effective TLB flush being performed was:
static void vmx_flush_tlb(struct kvm_vcpu *vcpu)
{
vpid_sync_vcpu_all(to_vmx(vcpu));
}
I.e. KVM was not flushing EPT TLB entries when allocating a "new" root,
which very strongly suggests that the global INVEPT during hardware
enabling was a misguided hack that addressed the most obvious symptom,
but failed to fix the underlying bug.
Reviewed-by: Paolo Bonzini <pbonzini@redhat.com>
Link: https://lore.kernel.org/r/20240608001003.3296640-1-seanjc@google.com
Signed-off-by: Sean Christopherson <seanjc@google.com>
Rewrite the comment above VMCS12_REVISION to unequivocally state that the
ID must never change. KVM_{G,S}ET_NESTED_STATE have been officially
supported for some time now, i.e. changing VMCS12_REVISION would break
userspace.
Opportunistically add a blurb to the CHECK_OFFSET() comment to make it
explicitly clear that new fields are allowed, i.e. that the restriction
on the layout is all about backwards compatibility.
No functional change intended.
Cc: Jim Mattson <jmattson@google.com>
Reviewed-by: Jim Mattson <jmattson@google.com>
Link: https://lore.kernel.org/r/20240613190103.1054877-1-seanjc@google.com
Signed-off-by: Sean Christopherson <seanjc@google.com>
Work for __counted_by on generic pointers in structures (not just
flexible array members) has started landing in Clang 19 (current tip of
tree). During the development of this feature, a restriction was added
to __counted_by to prevent the flexible array member's element type from
including a flexible array member itself such as:
struct foo {
int count;
char buf[];
};
struct bar {
int count;
struct foo data[] __counted_by(count);
};
because the size of data cannot be calculated with the standard array
size formula:
sizeof(struct foo) * count
This restriction was downgraded to a warning but due to CONFIG_WERROR,
it can still break the build. The application of __counted_by on the
ports member of 'struct mxser_board' triggers this restriction,
resulting in:
drivers/tty/mxser.c:291:2: error: 'counted_by' should not be applied to an array with element of unknown size because 'struct mxser_port' is a struct type with a flexible array member. This will be an error in a future compiler version [-Werror,-Wbounds-safety-counted-by-elt-type-unknown-size]
291 | struct mxser_port ports[] __counted_by(nports);
| ^~~~~~~~~~~~~~~~~~~~~~~~~
1 error generated.
Remove this use of __counted_by to fix the warning/error. However,
rather than remove it altogether, leave it commented, as it may be
possible to support this in future compiler releases.
Cc: <stable@vger.kernel.org>
Closes: https://github.com/ClangBuiltLinux/linux/issues/2026
Fixes: f34907ecca ("mxser: Annotate struct mxser_board with __counted_by")
Signed-off-by: Nathan Chancellor <nathan@kernel.org>
Link: https://lore.kernel.org/r/20240529-drop-counted-by-ports-mxser-board-v1-1-0ab217f4da6d@kernel.org
Signed-off-by: Kees Cook <kees@kernel.org>
An unintended consequence of commit 9c573cd313 ("randomize_kstack:
Improve entropy diffusion") was that the per-architecture entropy size
filtering reduced how many bits were being added to the mix, rather than
how many bits were being used during the offsetting. All architectures
fell back to the existing default of 0x3FF (10 bits), which will consume
at most 1KiB of stack space. It seems that this is working just fine,
so let's avoid the confusion and update everything to use the default.
The prior intent of the per-architecture limits were:
arm64: capped at 0x1FF (9 bits), 5 bits effective
powerpc: uncapped (10 bits), 6 or 7 bits effective
riscv: uncapped (10 bits), 6 bits effective
x86: capped at 0xFF (8 bits), 5 (x86_64) or 6 (ia32) bits effective
s390: capped at 0xFF (8 bits), undocumented effective entropy
Current discussion has led to just dropping the original per-architecture
filters. The additional entropy appears to be safe for arm64, x86,
and s390. Quoting Arnd, "There is no point pretending that 15.75KB is
somehow safe to use while 15.00KB is not."
Co-developed-by: Yuntao Liu <liuyuntao12@huawei.com>
Signed-off-by: Yuntao Liu <liuyuntao12@huawei.com>
Fixes: 9c573cd313 ("randomize_kstack: Improve entropy diffusion")
Link: https://lore.kernel.org/r/20240617133721.377540-1-liuyuntao12@huawei.com
Reviewed-by: Arnd Bergmann <arnd@arndb.de>
Acked-by: Mark Rutland <mark.rutland@arm.com>
Acked-by: Heiko Carstens <hca@linux.ibm.com> # s390
Link: https://lore.kernel.org/r/20240619214711.work.953-kees@kernel.org
Signed-off-by: Kees Cook <kees@kernel.org>
make allmodconfig && make W=1 C=1 reports:
WARNING: modpost: missing MODULE_DESCRIPTION() in lib/string_kunit.o
WARNING: modpost: missing MODULE_DESCRIPTION() in lib/string_helpers_kunit.o
Add the missing invocation of the MODULE_DESCRIPTION() macro.
Signed-off-by: Jeff Johnson <quic_jjohnson@quicinc.com>
Link: https://lore.kernel.org/r/20240531-md-lib-string-v1-1-2738cf057d94@quicinc.com
Signed-off-by: Kees Cook <kees@kernel.org>
Use sev_es_host_save_area() instead of open coding an equivalent when
setting the MSR_TSC_AUX field during setup.
No functional change intended.
Link: https://lore.kernel.org/r/20240617210432.1642542-3-seanjc@google.com
Signed-off-by: Sean Christopherson <seanjc@google.com>
Force sev_es_host_save_area() to be always inlined, as it's used in the
low level VM-Enter/VM-Exit path, which is non-instrumentable.
vmlinux.o: warning: objtool: svm_vcpu_enter_exit+0xb0: call to
sev_es_host_save_area() leaves .noinstr.text section
vmlinux.o: warning: objtool: svm_vcpu_enter_exit+0xbf: call to
sev_es_host_save_area.isra.0() leaves .noinstr.text section
Fixes: c92be2fd8e ("KVM: SVM: Save/restore non-volatile GPRs in SEV-ES VMRUN via host save area")
Reported-by: Borislav Petkov <bp@alien8.de>
Tested-by: Borislav Petkov (AMD) <bp@alien8.de>
Link: https://lore.kernel.org/r/20240617210432.1642542-2-seanjc@google.com
Signed-off-by: Sean Christopherson <seanjc@google.com>
Complete conversion of the WiFi rfkill device to use device properties/
software nodes by utilizing PROPERTY_ENTRY_GPIO() instead of a lookup
table.
Signed-off-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Add a module description for kvm.ko to fix a 'make W=1' warning:
WARNING: modpost: missing MODULE_DESCRIPTION() in arch/x86/kvm/kvm.o
Opportunistically update kvm_main.c's comically stale file comment to
match the module description.
Signed-off-by: Jeff Johnson <quic_jjohnson@quicinc.com>
Link: https://lore.kernel.org/r/20240622-md-kvm-v2-1-29a60f7c48b1@quicinc.com
[sean: split x86 changes to a separate commit, remove stale VT-x comment]
Signed-off-by: Sean Christopherson <seanjc@google.com>
and Neardi LBA3368.
Interesting core changes: dropping of the rk3399pro dtsi - Dragan dug
through available information, boards and found out that the pcie-stuff
described in the existing rk3399pro dtsi is actually not true and the
file can go away.
And also a bit of reorganizing of rk3588 dtsi files. There are number
of rk3588 variants in existence that select between two sets of
peripherals and also multiple sets of operating points. So the change
sorts it differently so that we stop including one soc-variant into
others and also make room for the operating points.
The rk3308 got io domains, a number of additions to the rk3308-rock-pi-s
board (wifi, io-domains, otp, ethernet, uart, sdmmc).
And then there are of course the usual set of new additions like
rk3588 pcie endpoint support and individual peripherals for boards.
-----BEGIN PGP SIGNATURE-----
iQFEBAABCAAuFiEE7v+35S2Q1vLNA3Lx86Z5yZzRHYEFAmZ+p5wQHGhlaWtvQHNu
dGVjaC5kZQAKCRDzpnnJnNEdgRR1B/47XZQRe94xg0is7nptf9UehEE6UaoDSrMj
9C0JLEt6CLrlaCDVbd387/8+Ehm0Mc1SpXWZa+/JUROKiIaAMNesVsCDkrlsF5W/
Df0z1Bxg3WOii2RNNidl4FC3UbZDJ+SQc8kRnk4AARsIJZEXtRuGv8ExrNTVjURC
PwST1e7yL8xk4Mq5f7SVcT0V/vL6O/Ae27w464q45o8dFtoTKdgXHhEHZYqPiv1e
XIvoVBBfkqFZcj+YbrPJHJWS9XguEHjUvzXVp3TO1WoHnwtjJeQbqdI9H2AWF5DY
xYqRMrLDv0azqU4QwpkA9C81zSOko1EpqN7p2b9k/4V3NgmSzI7H
=rZGA
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmZ+28YACgkQYKtH/8kJ
UieK0Q//X4sGDnswiUtOqQdZIGxYCLkiQgO8zCdywUrAfm+a9mBQwljc7iL30a/a
SAN80SVStELC6IP3cI1efn7bvimIeNMQEfo68+IKvBtmWoS6IhSiDWJAPeitZrJs
iZXIOwx2lXVlC/5Y1r6ZCaGysSnwdREvQQpdG4tWj00n0WxadK4pFiIuz94taUaI
hWm64BH/vkKwZQ+18QDw3F+QkXmsLQ09FIpXz8DwhW9G2GuFOwNw2Dmhkpc+lFjI
BDDdzTIsonYpy1kIXzH7IWpkNCrXZCGLScZK/g+2xd+XUOJhMKsLu+glo7zHQ7f3
7su7wN1ehjPMRgAudXS7yxfOhoKb5x/w51BcuKa7fBU3E7Zid/Hnrp700KYrnZjq
W2Du9ptvyh0QnfncWJVl3Y3fls25IkfDiGRooqRE8D8RY126Ln/ysFnSJRTHryty
6NVQly4uQinbMmBV336ufmyRiWnafvVzf8mL4LGrdrXxdHqGs7WBaP3/GC0edzd0
oDP6etYWLGhDA+Qt37cZXuPDJdaOBVTIWe1dn40O2uV5a26IxnuXDfeDu9kqMNL1
oylY5/nvzQTWLFXXCf7X9Ez7+eax8le3AzbplLciXSURECuGDrqA61UUpHP9alZh
hSCXwY+0tayFTBUCsiVLx2WyCMxwQXK93EB7bk++NLldFHYq+A0=
=yOYl
-----END PGP SIGNATURE-----
Merge tag 'v6.11-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into soc/dt
New boards, the Radxa ROCK S0, Radxa ZERO 3W/3E, CM3588 NAS solution
and Neardi LBA3368.
Interesting core changes: dropping of the rk3399pro dtsi - Dragan dug
through available information, boards and found out that the pcie-stuff
described in the existing rk3399pro dtsi is actually not true and the
file can go away.
And also a bit of reorganizing of rk3588 dtsi files. There are number
of rk3588 variants in existence that select between two sets of
peripherals and also multiple sets of operating points. So the change
sorts it differently so that we stop including one soc-variant into
others and also make room for the operating points.
The rk3308 got io domains, a number of additions to the rk3308-rock-pi-s
board (wifi, io-domains, otp, ethernet, uart, sdmmc).
And then there are of course the usual set of new additions like
rk3588 pcie endpoint support and individual peripherals for boards.
* tag 'v6.11-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: (42 commits)
arm64: dts: rockchip: Delete the SoC variant dtsi for RK3399Pro
arm64: dts: rockchip: Fix mic-in-differential usage on rk3568-evb1-v10
arm64: dts: rockchip: Fix mic-in-differential usage on rk3566-roc-pc
arm64: dts: rockchip: Drop invalid mic-in-differential on rk3568-rock-3a
arm64: dts: rockchip: Add rock5b overlays for PCIe endpoint mode
arm64: dts: rockchip: Add PCIe endpoint mode support
arm64: dts: rockchip: Increase VOP clk rate on RK3328
arm64: dts: rockchip: add gpio-line-names to radxa-zero-3
arm64: dts: rockchip: Split GPU OPPs of RK3588 and RK3588j
arm64: dts: rockchip: Add OPP data for CPU cores on RK3588j
arm64: dts: rockchip: Add OPP data for CPU cores on RK3588
arm64: dts: rockchip: Add CPU/memory regulator coupling for 2 RK3588 boards
arm64: dts: rockchip: fix mmc aliases for Radxa ZERO 3E/3W
arm64: dts: rockchip: Add Neardi LBA3368 board
dt-bindings: arm: rockchip: Add Neardi LBA3368
dt-bindings: vendor-prefixes: Add Neardi Technology
arm64: dts: rockchip: Enable PinePhone Pro vibrator
arm64: dts: rockchip: Enable PinePhone Pro IMU sensor
arm64: dts: rockchip: Add Pinephone Pro support for GPIO LEDs
arm64: dts: rockchip: Enable SPI flash on PinePhone Pro
...
Link: https://lore.kernel.org/r/4901395.GXAFRqVoOG@diego
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Add module descriptions for the vendor modules to fix allmodconfig
'make W=1' warnings:
WARNING: modpost: missing MODULE_DESCRIPTION() in arch/x86/kvm/kvm-intel.o
WARNING: modpost: missing MODULE_DESCRIPTION() in arch/x86/kvm/kvm-amd.o
Signed-off-by: Jeff Johnson <quic_jjohnson@quicinc.com>
Link: https://lore.kernel.org/r/20240622-md-kvm-v2-1-29a60f7c48b1@quicinc.com
[sean: split kvm.ko change to separate commit]
Signed-off-by: Sean Christopherson <seanjc@google.com>
This adds a single commit that cleans up the drive-strength
value assignment on all devicetrees using the deprecated
MTK_DRIVE_(x)mA definition.
-----BEGIN PGP SIGNATURE-----
iJ4EABYKAEYWIQQn3Xxr56ypAcSHzXSaNgTPrZeEeAUCZn6APSgcYW5nZWxvZ2lv
YWNjaGluby5kZWxyZWdub0Bjb2xsYWJvcmEuY29tAAoJEJo2BM+tl4R4wesA/0Ll
b9k4FkjiwHD8VIUbN6N1dxPlhXG7cJTAYa9Im+utAQDVG+PRkX1SzWjKBMDW+ewI
wi4EOu3U8LB+yd9uktFKAA==
=5M+u
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmZ+2mEACgkQYKtH/8kJ
UicEhQ//QU2tR/li/J5OegjPmTBmNXjyn97OPd5BZzaO7/AMJTLTi/G2+snTORVz
N9tT7QJq5gK9GxI/SlhUXfmH9m+CGT8n7yLtwLDUIoo7IcgB6u4CsWoSANRuxM0n
kWIWzMVg0C4tRUJljCtWrhOZsHLTbzNHeRrmlbWuSDkaKVmRiqMYuhMojvYOUgz7
5z/1f48SBA5GGlENf7VaVlN98B9UaZ4UjplIGf1O7KjB96B7HLCHMEt9V4k+vywX
oaSMtrbFW4cveBLk8TXqlsqcTj63w2Nr7H9eZh0pSv/roaEWSBMt8BQRPCxp8j7/
lvoqhPcrKDyKbGDRWCZ+XJvBwAE4FftkceJzdsKxauGRHUQsrxEt9ygWDlxEQYNo
4hcKSErhggLJbTFDSwDOrcdw7EsUEoW25XkArRezdOWc3KymEAFi+1dIdfDvM+9+
AgfrPHW6OdfJadGZ+U/N8ovzHZWs6uJznMtBPqGdDTWJPSDIDhoK03FoYxQ9IqKW
TMaeQkd47LEIHz0XqNgBRUezBEs4zn5M0d9psYBkJRIsumux6hj1VKva8u4ETHwH
onsTI3j9CLf2N9f8abmgD+sXdR7fDYh93huPtZGEbsrmajDOZKnHweYCsmeT9ws2
DGhQV1gHxL/akLkmX+nzkyWssUc79w07SJTgM5x0Yt5TpzNlNOY=
=eCJ3
-----END PGP SIGNATURE-----
Merge tag 'mtk-dts32-for-v6.11' of https://git.kernel.org/pub/scm/linux/kernel/git/mediatek/linux into soc/dt
MediaTek ARM32 DTS updates for v6.11
This adds a single commit that cleans up the drive-strength
value assignment on all devicetrees using the deprecated
MTK_DRIVE_(x)mA definition.
* tag 'mtk-dts32-for-v6.11' of https://git.kernel.org/pub/scm/linux/kernel/git/mediatek/linux:
arm: dts: mediatek: Declare drive-strength numerically
Link: https://lore.kernel.org/r/20240628093801.126013-2-angelogioacchino.delregno@collabora.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Currently the PMU counters test does a single CLFLUSH{,OPT} on the loop's
code, but due to speculative execution this might not cause LLC misses
within the measured section.
Instead of doing a single flush before the loop, do a cache flush on each
iteration of the loop to confuse the prediction and ensure that at least
one cache miss occurs within the measured section.
Signed-off-by: Maxim Levitsky <mlevitsk@redhat.com>
[sean: keep MFENCE, massage changelog]
Link: https://lore.kernel.org/r/20240628005558.3835480-3-seanjc@google.com
Signed-off-by: Sean Christopherson <seanjc@google.com>
Tweak the macros in the PMU counters test to prepare for moving the
CLFLUSH+MFENCE instructions into the loop body, to fix an issue where
a single CLFUSH doesn't guarantee an LLC miss.
Link: https://lore.kernel.org/r/20240628005558.3835480-2-seanjc@google.com
Signed-off-by: Sean Christopherson <seanjc@google.com>
This introduces the new Airoha (MediaTek) EN7581 home networking
platform (routers) in early stages, but with support for its
Evaluation Board, a few more MediaTek based machines, and
improvements for existing ones.
For the MT7981 router SoC we get pinctrl support, along with the
enablement of its watchdog, eFuse/nvmem, I2C and integrated WiFi
controller, other than the introduction of new machines based on
this chip: the Cudy WR3000 V1 router and the OpenWRT One.
MT7986 gets a new machine: the BananaPi R3 Mini.
Some advancements have been done also on the MT7988 SoC, which
gains support for its I2C, PWM and USB XHCI controllers.
MediaTek Genio SoCs also get attention, with the introduction of a
basic device tree for the MT8390 Genio 700-EVK board, and for the
MT8395 Genio 1200 powered Kontron 3.5"-SBC-i1200.
Additionally, the Genio 1200 Radxa NIO12L board gets support for
USB Role Switching and proper PCI-Express controller PM suspend
and resume, other than finally enabling CPU and GPU frequency
and voltage scaling for improved efficiency.
Speaking of MediaTek Kompanio SoCs (Chromebooks) instead, thanks
to community interest and help in testing, there comes support for
the MT8195-powered HP Chromebook X360 13b-ca0002sa, while Google
contributed support for the MT8186-powered Acer Chromebook 311.
Moreover, MT8188 gets support for its integrated power domains,
other than its Global Command Engine (GCE) mailboxes, initial
basic support for the VDO0/1 blocks for multimedia, and its GPU
(ARM Mali G57-MC3, Valhall-JM) with Panfrost.
Besides that, this also adds a few other cleanups and improvements
for all machines using the MT8183, MT8192, MT8195/MT8395 SoCs and
adds generation of symbols on base devicetrees of machines using
Device Tree Overlay(s) (DTBO).
In particular:
- The MediaTek Smart Voltage Scaling (SVS) is now fully working
those SoCs, bringing further power efficiency improvements;
- Thermal zones were refactored on MT8183 for consistency with
the other MediaTek SoCs and for readability
- Sound DAI links are now consistently specified in device tree
on MT8195 and MT8186 machines
- Newly supported machines/boards
- EN7581: EVK
- MT7981: Cudy WR3000 V1, OpenWRT One
- MT7986: BananaPi R3 Mini
- MT8186: Acer Chromebook 311 (Corsola Voltorb)
- MT8195: HP Chromebook X360 13b-ca0002sa (Cherry Dojo)
- MT8390/8188: Genio 700 EVK
- Some cleanups for unused/legacy devicetree properties
-----BEGIN PGP SIGNATURE-----
iJ4EABYKAEYWIQQn3Xxr56ypAcSHzXSaNgTPrZeEeAUCZn0thSgcYW5nZWxvZ2lv
YWNjaGluby5kZWxyZWdub0Bjb2xsYWJvcmEuY29tAAoJEJo2BM+tl4R4B94BANp1
sg23FYuR+RIMOtJ7542D1HVRr/l3D27XFSAw0yjbAP9cTg5ps+SR4fsr+ipectwP
MBqhJLJu7KriAl63aY2/BQ==
=paIN
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmZ+2boACgkQYKtH/8kJ
Uieq2xAAvzQQUlIbLUm8GUZ+GzcMpYcXiuf1ngxym8dmc2ZJo+PB0XnI8R8bwM8p
AffGi2sE6it8NjcPAw9Sg9x16p/HOloeQq/V36XeBGWyz8AVR4bA676J73yRVnNo
fDEhdD5dcGE3SkmGX1V+FrwosEoYLjK6Jso/RB+IAWOgIesbU8yfObjl9NAfXsK1
B+qA7HTJeKtpMORZLbA6sMGxOrR0EVv+7Ni1kkPnCqEw4q1FLGi9MUZ4pHNXXoDd
9kDHL6QpWjfjr14rmpvV+C0vqbzcso3h1ZUmI2IDRN0PcOUuEaDHfmE4Tu+UNefE
sfEvJCPPscgBJfCHH8fE9CgBu9wSfITRh4um4cEWo+XdiLaG5PTF/JAp+n+ugldr
eKNFUZTx5xP7yReo0lzC2EExhugtPTXjabb64jtFst9WSjlFO34yoJ1R786gedKx
C85pv3lQ0H2/NADB2cYsKdHVK+1tHZyl3yYU/clx3yp+iQwv5kr22wvQt68MAHL4
oiepBhdqeLmMjn/cTJZLddp90t6ge+li3miyv0yisrQn57h4NjJapuNIVZnATbUa
xJAH7BLdQPqxb8d9AXNR2h+Tqu/CqFdqEb8qdsYwdjmPrHuwQPVlCL7eMbI2+7Rn
A5ME/9DSRs+zWKP7Q97dziKU0/otXkx7t+en+4O6eylxxMwF2AA=
=lO7d
-----END PGP SIGNATURE-----
Merge tag 'mtk-dts64-for-v6.11' of https://git.kernel.org/pub/scm/linux/kernel/git/mediatek/linux into soc/dt
MediaTek ARM64 DTS updates for v6.11
This introduces the new Airoha (MediaTek) EN7581 home networking
platform (routers) in early stages, but with support for its
Evaluation Board, a few more MediaTek based machines, and
improvements for existing ones.
For the MT7981 router SoC we get pinctrl support, along with the
enablement of its watchdog, eFuse/nvmem, I2C and integrated WiFi
controller, other than the introduction of new machines based on
this chip: the Cudy WR3000 V1 router and the OpenWRT One.
MT7986 gets a new machine: the BananaPi R3 Mini.
Some advancements have been done also on the MT7988 SoC, which
gains support for its I2C, PWM and USB XHCI controllers.
MediaTek Genio SoCs also get attention, with the introduction of a
basic device tree for the MT8390 Genio 700-EVK board, and for the
MT8395 Genio 1200 powered Kontron 3.5"-SBC-i1200.
Additionally, the Genio 1200 Radxa NIO12L board gets support for
USB Role Switching and proper PCI-Express controller PM suspend
and resume, other than finally enabling CPU and GPU frequency
and voltage scaling for improved efficiency.
Speaking of MediaTek Kompanio SoCs (Chromebooks) instead, thanks
to community interest and help in testing, there comes support for
the MT8195-powered HP Chromebook X360 13b-ca0002sa, while Google
contributed support for the MT8186-powered Acer Chromebook 311.
Moreover, MT8188 gets support for its integrated power domains,
other than its Global Command Engine (GCE) mailboxes, initial
basic support for the VDO0/1 blocks for multimedia, and its GPU
(ARM Mali G57-MC3, Valhall-JM) with Panfrost.
Besides that, this also adds a few other cleanups and improvements
for all machines using the MT8183, MT8192, MT8195/MT8395 SoCs and
adds generation of symbols on base devicetrees of machines using
Device Tree Overlay(s) (DTBO).
In particular:
- The MediaTek Smart Voltage Scaling (SVS) is now fully working
those SoCs, bringing further power efficiency improvements;
- Thermal zones were refactored on MT8183 for consistency with
the other MediaTek SoCs and for readability
- Sound DAI links are now consistently specified in device tree
on MT8195 and MT8186 machines
- Newly supported machines/boards
- EN7581: EVK
- MT7981: Cudy WR3000 V1, OpenWRT One
- MT7986: BananaPi R3 Mini
- MT8186: Acer Chromebook 311 (Corsola Voltorb)
- MT8195: HP Chromebook X360 13b-ca0002sa (Cherry Dojo)
- MT8390/8188: Genio 700 EVK
- Some cleanups for unused/legacy devicetree properties
* tag 'mtk-dts64-for-v6.11' of https://git.kernel.org/pub/scm/linux/kernel/git/mediatek/linux: (58 commits)
arm64: dts: mediatek: Declare drive-strength numerically
arm64: dts: mt7622: fix switch probe on bananapi-r64
arm64: dts: mediatek: Add MT8186 Voltorb Chromebooks
dt-bindings: arm: mediatek: Add MT8186 Voltorb Chromebooks
arm64: dts: mediatek: Makefile: Generate symbols for DTBO support
arm64: dts: mediatek: mt8183-kukui-jacuzzi: Add ports node for anx7625
arm64: dts: mediatek: mt8183-pico6: Fix wake-on-X event node names
arm64: dts: mt8173: Add G2Touch touchscreen node
arm64: dts: mediatek: mt8183-kukui: Fix the value of `dlg,jack-det-rate` mismatch
arm64: dts: mediatek: mt8188: Add support for Mali GPU on Panfrost
arm64: dts: mediatek: mt8188: Add support for SoC power domains
arm64: dts: mediatek: mt8188: Add VDOSYS0/1 support for multimedia
arm64: dts: mediatek: mt8188: Add Global Command Engine mailboxes
arm64: dts: mediatek: mt8173-elm: drop PMIC's syscon node
arm64: dts: mediatek: mt8365: use a specific SCPSYS compatible
arm64: dts: mediatek: mt8365: drop incorrect power-domain-cells
arm64: dts: mediatek: mt7981: add I2C controller
arm64: dts: mediatek: mt7622: fix "emmc" pinctrl mux
arm64: dts: mediatek: mt7988: add I2C controllers
arm64: dts: mediatek: mt7988: add PWM controller
...
Link: https://lore.kernel.org/r/20240628093801.126013-1-angelogioacchino.delregno@collabora.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
The Orin NX and Orin Nano boards share a common carrier board and the
module boards for both platforms are very similar. Therefore,
restructure the Orin NX/Nano device-tree source files to adhere to a
simple hierarchical format. This will help make clear where changes
should go, and eliminates redundancy within the files.
Previously the carrier board file was independent. However, given
that it is so tightly coupled with the module design, it will be
more practical to combine files together for a simpler layout.
Following changes are made to restructure the device tree source files:
1) Change include hierarchy. Top-level dts includes board dtsi.
Board dtsi includes module dtsi. Module dtsi includes SoC dtsi.
2) Data from the top level dts file that is common to both Orin NX
and Orin Nano is in tegra234-p3768-0000+p3767.dtsi.
3) Only data that is unique to NX/Nano is present in the top-level dts.
Signed-off-by: Vedant Deshpande <vedantd@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
_ Add #thermal-sensor-cells property on stih410.dtsi and stih418.dtsi
_ Add thermal-zones support on stih418
_
-----BEGIN PGP SIGNATURE-----
iQJQBAABCgA6FiEEXyrViUccKBz9c35Jysd4L3sz/6YFAmZ+clQcHHBhdHJpY2Uu
Y2hvdGFyZEBmb3NzLnN0LmNvbQAKCRDKx3gvezP/phdhD/wNUl+56Hg/xmIuy0UC
Fa6PV8V0K46iLwEWYepkMfigDPXibmFmMdRMypzuX2f3zu1NlQQE7aF7N6hocIVX
TuoHPh7pCwcQwoTfV7XUtIaMZZfVyPr4GkSqYiu6KMDjcJglUzktiehcqrRp6w2j
4CUxUuM0gdgL+PpomJm3ZefWYPQgUyEjeKF066w+36BghJ/uE/9ZSj0twmIexfGR
/FXN5p9UUZBYfG/A8YwJsGrUByhgmhxIVt/mpr2OUQ2NP7frigjnwzHuyroaR4Jm
AwdaIDkKHYPOET09kkzUY0gW+Vk4EgiLTqQPp6Qv7u8KANGZ9wtgz8bMjgEFkXoC
KaSU3tv0P1mE/ZzW/j3M1BuaHnupuwQPZiNdvbJ82RkmBtDGJP0Kr0coMpKiXvGG
VAp1XSsCO+1JmH3GDIK7sOcfZVSy8OI58DVZ+K9o7ZYRD8fDP57bhrcZivYDyHP5
82Wqlm5NuMpuLPvlTSQyft6QW+V2woHqxSoybJEjB+YRS3gniYatyrCfc7ugTLGt
SXYoUF2IJfVPAIMWyWXwEV/2kWtXLJjkHO5BNKkC8VhkLsK+MpVwDiEMKUDWz2A1
hVD8VCYxoRB6FgwJPUQe4UVmyeN5Jw794aUy2Lk3UD627eGWYYvS11qmAdDIgIVQ
QgZMxwXm2Fp4GotxxJDl26MkVQ==
=lbQi
-----END PGP SIGNATURE-----
Merge tag 'sti-dt-for-v6.11-round1' of https://git.kernel.org/pub/scm/linux/kernel/git/pchotard/sti into soc/dt
STi DT for v6.11 :
_ Add #thermal-sensor-cells property on stih410.dtsi and stih418.dtsi
_ Add thermal-zones support on stih418
_
There's not much reason to have multiple fixed-factor-clock instances
which are all the same factor and clock input. Drop the nodes, but keep
the labels to minimize the changes and keep some distinction of the
different clocks.
Signed-off-by: Rob Herring (Arm) <robh@kernel.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/20240528191536.1444649-1-robh@kernel.org
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20240627-arm-dts-fixes-v1-1-40a2cb7d344b@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Airoha SoC is not covered by any maintainer entry so relevant patches
can be missed. It seems Mediatek SoC maintainers were covering some
parts of Airoha and Airoha itself is subsidiary of Mediatek, so assign
the Airoha maintenance to Matthias and AngeloGioacchino.
Cc: Matthias Brugger <matthias.bgg@gmail.com>
Cc: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Acked-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Signed-off-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20240628095044.132276-2-angelogioacchino.delregno@collabora.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Marvell 88PM886 PMIC provides onkey among other things. Add client
driver to handle it. The driver currently only provides a basic support
omitting additional functions found in the vendor version, such as long
onkey and GPIO integration.
Signed-off-by: Karel Balej <balejk@matfyz.cz>
Acked-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Link: https://lore.kernel.org/r/20240531175109.15599-5-balejk@matfyz.cz
Signed-off-by: Lee Jones <lee@kernel.org>
Support the LDO and buck regulators of the Marvell 88PM886 PMIC.
Signed-off-by: Karel Balej <balejk@matfyz.cz>
Reviewed-by: Mark Brown <broonie@kernel.org>
Link: https://lore.kernel.org/r/20240531175109.15599-4-balejk@matfyz.cz
Signed-off-by: Lee Jones <lee@kernel.org>
Marvell 88PM886 is a PMIC which provides various functions such as
onkey, battery, charger and regulators. It is found for instance in the
samsung,coreprimevelte smartphone with which this was tested. Implement
basic support to allow for the use of regulators and onkey.
Signed-off-by: Karel Balej <balejk@matfyz.cz>
Link: https://lore.kernel.org/r/20240531175109.15599-3-balejk@matfyz.cz
Signed-off-by: Lee Jones <lee@kernel.org>
Marvell 88PM886 is a PMIC with several subdevices such as onkey,
regulators or battery and charger. It comes in at least two revisions,
A0 and A1 -- only A1 is described here at the moment.
Signed-off-by: Karel Balej <balejk@matfyz.cz>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20240531175109.15599-2-balejk@matfyz.cz
Signed-off-by: Lee Jones <lee@kernel.org>
Introduce support for Cirrus Logic Device CS40L50: a
haptic driver with waveform memory, integrated DSP,
and closed-loop algorithms.
The ASoC driver enables I2S streaming to the device.
Reviewed-by: David Rhodes <drhodes@opensource.cirrus.com>
Signed-off-by: James Ogletree <jogletre@opensource.cirrus.com>
Reviewed-by: Jeff LaBundy <jeff@labundy.com>
Reviewed-by: Ricardo Rivera-Matos <rriveram@opensource.cirrus.com>
Reviewed-by: Mark Brown <broonie@kernel.org>
Link: https://lore.kernel.org/r/20240620161745.2312359-6-jogletre@opensource.cirrus.com
Signed-off-by: Lee Jones <lee@kernel.org>
Introduce support for Cirrus Logic Device CS40L50: a
haptic driver with waveform memory, integrated DSP,
and closed-loop algorithms.
The input driver provides the interface for control of
haptic effects through the device.
Signed-off-by: James Ogletree <jogletre@opensource.cirrus.com>
Reviewed-by: Jeff LaBundy <jeff@labundy.com>
Acked-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Link: https://lore.kernel.org/r/20240620161745.2312359-5-jogletre@opensource.cirrus.com
Signed-off-by: Lee Jones <lee@kernel.org>
Introduce support for Cirrus Logic Device CS40L50: a
haptic driver with waveform memory, integrated DSP,
and closed-loop algorithms.
The MFD component registers and initializes the device.
Signed-off-by: James Ogletree <jogletre@opensource.cirrus.com>
Reviewed-by: Jeff LaBundy <jeff@labundy.com>
Link: https://lore.kernel.org/r/20240620161745.2312359-4-jogletre@opensource.cirrus.com
Signed-off-by: Lee Jones <lee@kernel.org>
CS40L50 is a haptic driver with waveform memory,
integrated DSP, and closed-loop algorithms.
Add a YAML DT binding document for this device.
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: James Ogletree <jogletre@opensource.cirrus.com>
Reviewed-by: Jeff LaBundy <jeff@labundy.com>
Link: https://lore.kernel.org/r/20240620161745.2312359-3-jogletre@opensource.cirrus.com
Signed-off-by: Lee Jones <lee@kernel.org>
A write sequence is a sequence of register addresses
and values executed by some Cirrus DSPs following
certain power state transitions.
Add support for Cirrus drivers to update or add to a
write sequence present in firmware.
Reviewed-by: Charles Keepax <ckeepax@opensource.cirrus.com>
Signed-off-by: James Ogletree <jogletre@opensource.cirrus.com>
Reviewed-by: Jeff LaBundy <jeff@labundy.com>
Link: https://lore.kernel.org/r/20240620161745.2312359-2-jogletre@opensource.cirrus.com
Signed-off-by: Lee Jones <lee@kernel.org>
We got another report that CT1000BX500SSD1 does not work with LPM.
If you look in libata-core.c, we have six different Crucial devices that
are marked with ATA_HORKAGE_NOLPM. This model would have been the seventh.
(This quirk is used on Crucial models starting with both CT* and
Crucial_CT*)
It is obvious that this vendor does not have a great history of supporting
LPM properly, therefore, add the ATA_HORKAGE_NOLPM quirk for all Crucial
BX SSD1 models.
Fixes: 7627a0edef ("ata: ahci: Drop low power policy board type")
Cc: stable@vger.kernel.org
Reported-by: Alessandro Maggio <alex.tkd.alex@gmail.com>
Closes: https://bugzilla.kernel.org/show_bug.cgi?id=218832
Reviewed-by: Damien Le Moal <dlemoal@kernel.org>
Link: https://lore.kernel.org/r/20240627105551.4159447-2-cassel@kernel.org
Signed-off-by: Niklas Cassel <cassel@kernel.org>
Remove obsolete RTSM DCSCB support which was only ever implemented
on a software model which is neither available to download nor
maintained. It predates the very first bL cluster based platforms.
Other change include addition of the missing MODULE_DESCRIPTION
macro in vexpress config bus driver.
-----BEGIN PGP SIGNATURE-----
iQIzBAABCAAdFiEEunHlEgbzHrJD3ZPhAEG6vDF+4pgFAmZz7QIACgkQAEG6vDF+
4phSjBAAuuUpgUrG/LOniUoyOPXvX4SXGmwuSKMpicsgj9ojIlYjkVEeQGt67ERY
abTZhyOO3l/6hhs0j1YeB2H0C5VgJMwgBG1ZObaD6QM6PtTvlJU5h5f1VSLFv7YY
wV9SE2BQbfVjf4cH9U/p2r90VM+SZIjTcGpzgIB6d2/XdNnEMyohmuBhXsOtuS4C
I5yfVKiAiT4AJdmO32JDmGvio5sudFQbBk3Q5y3ofukdxNVmeo1SHC3MasSakQt8
T0TLaRa3UqEAIw93hKzhp1/k8K4uzYQyDbVB/PCao8rOlPeR6A3WOu1qpfv7FFp5
noIS+87eAak2fILtFBGWpbun/gR+ewINJrP4iV8LiOIw4HLT6hKzANzKDztXeWAe
yWs7A8xaC67DFygrRGSq9yxnElRBOEhegdaBY++2cG6jGzI3EJze1ufYmdKJ+WyF
C8PIubi5IGzPN0NPQivui3fedT3mEV/Bv7NjiD7jx8auTOtxASqGMYY/rmiz4nJQ
Dzd2kJ/b+4Tx9oIONfbB/4HsA5tkcdwh/aylsdhLKACrmREZVWQ2NzFtKnfA0fQv
2+Dvmnw0NisQfXbHT0B5bp7beYg24pEJuzSGGapPaY4WzNTGFCNg6MRtR/dEiLJN
UG6lobFmUKzs9KGMWorXKhlp+OhqQbNb2c8rYH8qA2QQo6ZcIAE=
=VAfv
-----END PGP SIGNATURE-----
gpgsig -----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmZ+yKsACgkQYKtH/8kJ
Uid8pw/5AeAKo8906bIaKuwrXy1s/iJaC+bfbxX5sQqbalLPwsifRtNGsx0E0FcT
K+uh46GEt2Gczq8GMBmJjlDVK++xm+MszUdZV2qhtf+eF4tDiPHZAzuXTTzt5wgG
rbjPeJu6HhMDPO9s9+xDSilcnQ4FB/24+9s3PIiV9zx83fBKnIfr7rb53XJKUh3p
sgz6iHHkCtlmZB3+oHPlK+bd63j7lnbpdOBVOEUGZccZZu5xJ0xNg2br1b1nQkpN
xgD4JkKNqqfA6LO2DziAAOR/LCRJGff1BmwaRAMX+hWNqGbRRGlbShZIIKwQ4ejQ
OHDm43yvJNEVeCqKj4Cqa6gesUB9Myl2Pu8bKnjk7gm4P+LOpNQpNtMb5v7bgGd0
/wX02IA5Y8RN+wDkYAaI08Eb8bmaJ8EdY73fUhNGQutNKiCzCEM38QRmvsBCEio8
z6qLTXnZl/lFEp0q442ZPB6gxo6CwB2FgRBWrNLlPuPU2S2pnUcgh+FZQGipJklA
RnODnMiZuNrlWkicb5nagX7X+INs3d81R23C/eJz8VapTlHPO36I2ZMIMPWbnln/
WRFoIzv+tUWe1Z4HQ6nw7N+o3k/TPijlN9/YC8s+O2xN9cVPu9g4rcmy8fWFF3Q4
UpehJDEfAFH8b2Smkfcbmx8uWe2pZZLoE4S2lLMYykvr5+6tZvk=
=jv0e
-----END PGP SIGNATURE-----
Merge tag 'vexpress-updates-6.11' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux into soc/arm
Arm Vexpress updates for v6.11
Remove obsolete RTSM DCSCB support which was only ever implemented
on a software model which is neither available to download nor
maintained. It predates the very first bL cluster based platforms.
Other change include addition of the missing MODULE_DESCRIPTION
macro in vexpress config bus driver.
* tag 'vexpress-updates-6.11' of git://git.kernel.org/pub/scm/linux/kernel/git/sudeep.holla/linux:
bus: vexpress-config: Add missing MODULE_DESCRIPTION() macro
dt-bindings: arm: Remove obsolete RTSM DCSCB binding
arm: vexpress: Remove obsolete RTSM DCSCB support
Link: https://lore.kernel.org/r/20240620093924.375244-4-sudeep.holla@arm.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
We cannot use CLONE_VFORK because we also need to wait for the timeout
signal.
Restore tests timeout by using the original fork() call in __run_test()
but also in __TEST_F_IMPL(). Also fix a race condition when waiting for
the test child process.
Because test metadata are shared between test processes, only the
parent process must set the test PID (child). Otherwise, t->pid may be
set to zero, leading to inconsistent error cases:
# RUN layout1.rule_on_mountpoint ...
# rule_on_mountpoint: Test ended in some other way [127]
# OK layout1.rule_on_mountpoint
ok 20 layout1.rule_on_mountpoint
As safeguards, initialize the "status" variable with a valid exit code,
and handle unknown test exits as errors.
The use of fork() introduces a new race condition in landlock/fs_test.c
which seems to be specific to hostfs bind mounts, but I haven't found
the root cause and it's difficult to trigger. I'll try to fix it with
another patch.
Cc: Christian Brauner <brauner@kernel.org>
Cc: Günther Noack <gnoack@google.com>
Cc: Jakub Kicinski <kuba@kernel.org>
Cc: Kees Cook <keescook@chromium.org>
Cc: Shuah Khan <shuah@kernel.org>
Cc: Will Drewry <wad@chromium.org>
Cc: stable@vger.kernel.org
Closes: https://lore.kernel.org/r/9341d4db-5e21-418c-bf9e-9ae2da7877e1@sirena.org.uk
Fixes: a86f18903d ("selftests/harness: Fix interleaved scheduling leading to race conditions")
Fixes: 24cf65a622 ("selftests/harness: Share _metadata between forked processes")
Link: https://lore.kernel.org/r/20240621180605.834676-1-mic@digikod.net
Tested-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Mickaël Salaün <mic@digikod.net>
A full memory barrier is necessary at the end of the expedited grace
period to order:
1) The grace period completion (pictured by the GP sequence
number) with all preceding accesses. This pairs with rcu_seq_end()
performed by the concurrent kworker.
2) The grace period completion and subsequent post-GP update side
accesses. Pairs again against rcu_seq_end().
This full barrier is already provided by the final sync_exp_work_done()
test, making the subsequent explicit one redundant. Remove it and
improve comments.
Signed-off-by: Frederic Weisbecker <frederic@kernel.org>
Signed-off-by: Paul E. McKenney <paulmck@kernel.org>
Reviewed-by: Boqun Feng <boqun.feng@gmail.com>
Reviewed-by: Neeraj Upadhyay <neeraj.upadhyay@kernel.org>
RCU stall printout fetches the EQS state of a CPU with a preceding full
memory barrier. However there is nothing to order this read against at
this debugging stage. It is inherently racy when performed remotely.
Do a plain read instead.
This was the last user of rcu_dynticks_snap().
Signed-off-by: Frederic Weisbecker <frederic@kernel.org>
Signed-off-by: Paul E. McKenney <paulmck@kernel.org>
Reviewed-by: Boqun Feng <boqun.feng@gmail.com>
Reviewed-by: Neeraj Upadhyay <neeraj.upadhyay@kernel.org>
When the boot CPU initializes the per-CPU data on behalf of all possible
CPUs, a sanity check is performed on each of them to make sure none is
initialized in an extended quiescent state.
This check involves a full memory barrier which is useless at this early
boot stage.
Do a plain access instead.
Signed-off-by: Frederic Weisbecker <frederic@kernel.org>
Signed-off-by: Paul E. McKenney <paulmck@kernel.org>
Reviewed-by: Boqun Feng <boqun.feng@gmail.com>
Reviewed-by: Neeraj Upadhyay <neeraj.upadhyay@kernel.org>
When the grace period kthread checks the extended quiescent state
counter of a CPU, full ordering is necessary to ensure that either:
* If the GP kthread observes the remote target in an extended quiescent
state, then that target must observe all accesses prior to the current
grace period, including the current grace period sequence number, once
it exits that extended quiescent state.
or:
* If the GP kthread observes the remote target NOT in an extended
quiescent state, then the target further entering in an extended
quiescent state must observe all accesses prior to the current
grace period, including the current grace period sequence number, once
it enters that extended quiescent state.
This ordering is enforced through a full memory barrier placed right
before taking the first EQS snapshot. However this is superfluous
because the snapshot is taken while holding the target's rnp lock which
provides the necessary ordering through its chain of
smp_mb__after_unlock_lock().
Remove the needless explicit barrier before the snapshot and put a
comment about the implicit barrier newly relied upon here.
Signed-off-by: Frederic Weisbecker <frederic@kernel.org>
Signed-off-by: Paul E. McKenney <paulmck@kernel.org>
Reviewed-by: Boqun Feng <boqun.feng@gmail.com>
Reviewed-by: Neeraj Upadhyay <neeraj.upadhyay@kernel.org>
Signed-off-by: Paul E. McKenney <paulmck@kernel.org>
When the grace period kthread checks the extended quiescent state
counter of a CPU, full ordering is necessary to ensure that either:
* If the GP kthread observes the remote target in an extended quiescent
state, then that target must observe all accesses prior to the current
grace period, including the current grace period sequence number, once
it exits that extended quiescent state.
or:
* If the GP kthread observes the remote target NOT in an extended
quiescent state, then the target further entering in an extended
quiescent state must observe all accesses prior to the current
grace period, including the current grace period sequence number, once
it enters that extended quiescent state.
This ordering is enforced through a full memory barrier placed right
before taking the first EQS snapshot. However this is superfluous
because the snapshot is taken while holding the target's rnp lock which
provides the necessary ordering through its chain of
smp_mb__after_unlock_lock().
Remove the needless explicit barrier before the snapshot and put a
comment about the implicit barrier newly relied upon here.
Signed-off-by: Frederic Weisbecker <frederic@kernel.org>
Signed-off-by: Paul E. McKenney <paulmck@kernel.org>
Reviewed-by: Boqun Feng <boqun.feng@gmail.com>
Reviewed-by: Neeraj Upadhyay <neeraj.upadhyay@kernel.org>
Signed-off-by: Paul E. McKenney <paulmck@kernel.org>
