To guarantee bisect-ability during the split of stm32-exti in MCU and MPU
code, introduce CONFIG_STM32MP_EXTI.
Signed-off-by: Antonio Borneo <antonio.borneo@foss.st.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Link: https://lore.kernel.org/r/20240620083115.204362-2-antonio.borneo@foss.st.com
The driver is now always built in. In some synaptics ARM64 SoCs it is used
as a second level interrupt controller hanging off the ARM GIC and is
therefore loadable during boot.
Enable it to be built as a module and handle built-in usage correctly, so
that it continues working on systems where it is the main interrupt
controller.
[ tglx: Massage changelog ]
Signed-off-by: Jisheng Zhang <jszhang@kernel.org>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Link: https://lore.kernel.org/r/20240614153449.2083-1-jszhang@kernel.org
The initialization code has an is_of_node() check and invokes to_of_node()
for every of_property_*() invocation.
to_of_node() has a is_of_node() check already, so simplify the code by
invoking to_of_node() and checking that for NULL. If not NULL hand in the
node pointer to of_property_*().
The same applies to of_property_*() which fails when invoked with a NULL
node pointer.
[ tglx: Massaged change log ]
Signed-off-by: Jinjie Ruan <ruanjinjie@huawei.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Link: https://lore.kernel.org/all/20240603125652.791601-1-ruanjinjie@huawei.com
Introduce the advanced extended interrupt controllers. This feature will
allow each core to have 256 independent interrupt vectors and MSI
interrupts can be independently routed to any vector on any CPU.
[ tglx: Fixed up coding style. Made on/offline functions void ]
Co-developed-by: Jianmin Lv <lvjianmin@loongson.cn>
Signed-off-by: Jianmin Lv <lvjianmin@loongson.cn>
Co-developed-by: Liupu Wang <wangliupu@loongson.cn>
Signed-off-by: Liupu Wang <wangliupu@loongson.cn>
Signed-off-by: Tianyang Zhang <zhangtianyang@loongson.cn>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Link: https://lore.kernel.org/r/20240604125026.18745-1-zhangtianyang@loongson.cn
This fixes a rare deadlock when we're doing an emergency shutdown due to
failure to do a journal write.
Signed-off-by: Kent Overstreet <kent.overstreet@linux.dev>
The doorbell interrupts have the following layout on IPI vs no-IPI
platforms:
| 0...7 | 8...15 | 16...31 |
------------------+---------+----------+---------------------+
IPI platform | IPI | n/a | MSI |
------------------+---------+----------+---------------------+
non-IPI platform | MSI |
------------------+------------------------------------------+
Currently the driver only allows for the upper 16...31 interrupts for
MSI domain (i.e. the MSI domain has only 16 interrupts).
On platforms where IPI is not available, we can use whole 32 MSI
interrupts.
Implement support also for the lower 16 MSI interrupts on non-IPI
platforms.
[ Marek: refactored, changed commit message ]
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <kabel@kernel.org>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
On platforms where IPI is not available in the MPIC, the IPI registers
instead represent an additional set of MSI interrupt registers (currently
unused by the driver).
Do not touch these registers on platforms where IPI is not available in the
MPIC.
[ Marek: refactored, changed commit message ]
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <kabel@kernel.org>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
IPI is available only on systems where the mpic controller does not have a
parent interrupt defined (e.g. on Armada XP). If a parent interrupt is
defined, inter-processor interrupts are handled by an interrupt controller
higher in the hierarchy (most probably a parent GIC).
Only call ipi_resume() on systems where IPI is available in the mpic
controller.
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <kabel@kernel.org>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
[ refactored a little and changed commit message ]
IRQs 0 (IPI) and 1 (MSI) are handled internally by this driver,
generic_handle_domain_irq() is never called for these IRQs.
Disallow mapping these IRQs.
[ Marek: changed commit message ]
Signed-off-by: Pali Rohár <pali@kernel.org>
Signed-off-by: Marek Behún <kabel@kernel.org>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Use the dedicated atomic_io_modify() instead of a open coded spin_lock() +
readl() + writel() + spin_unlock() sequence.
This allows to drop the irq_controller_lock spinlock from the driver.
Signed-off-by: Marek Behún <kabel@kernel.org>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
On x86, make allmodconfig && make W=1 C=1 reports:
WARNING: modpost: missing MODULE_DESCRIPTION() in drivers/irqchip/irq-ts4800.o
WARNING: modpost: missing MODULE_DESCRIPTION() in drivers/irqchip/irq-meson-gpio.o
Add the missing invocation of the MODULE_DESCRIPTION() macro to all
files which have a MODULE_LICENSE(). This includes a 3rd file,
irq-mvebu-pic.c, which did not produce a warning with the x86
allmodconfig, but which may cause this warning with other kernel
configurations.
Signed-off-by: Jeff Johnson <quic_jjohnson@quicinc.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Reviewed-by: Andrew Lunn <andrew@lunn.ch>
Link: https://lore.kernel.org/r/20240608-md-drivers-irqchip-v1-1-dd02c3229277@quicinc.com
The order of function calls in the disable operation should be the reverse
of that in the enable operation. Thus, reorder the function calls to first
disable the parent IRQ chip before disabling the TINT IRQ.
Reported-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Tested-by: Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com> # on RZ/G3S
Link: https://lore.kernel.org/r/20240606194813.676823-1-prabhakar.mahadev-lad.rj@bp.renesas.com
The liointc hardware provides separate Interrupt Status Registers (ISR) for
each core. The current code uses always the ISR of core #0, which works
during boot because by default all interrupts are routed to core #0.
When the interrupt routing changes in the firmware configuration then this
causes interrupts to be lost because they are not configured in the
corresponding core.
Use the core index to access the correct ISR instead of a hardcoded 0.
[ tglx: Massaged changelog ]
Fixes: 0858ed035a ("irqchip/loongson-liointc: Add ACPI init support")
Co-developed-by: Tianli Xiong <xiongtianli@loongson.cn>
Signed-off-by: Tianli Xiong <xiongtianli@loongson.cn>
Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: <stable@vger.kernel.org>
Link: https://lore.kernel.org/r/20240622043338.1566945-1-chenhuacai@loongson.cn
Multi-bridge machines required that all eiointc controllers in the system
are initialized, otherwise the system does not boot.
The initialization happens on the boot CPU during early boot and relies on
cpu_to_node() for identifying the individual nodes.
That works when the number of possible CPUs is large enough, but with a
command line limit, e.g. "nr_cpus=$N" for kdump, but fails when the CPUs
of the secondary nodes are not covered.
During early ACPI enumeration all CPU to node mappings are recorded up to
CONFIG_NR_CPUS. These are accessible via early_cpu_to_node() even in the
case that "nr_cpus=N" truncates the number of possible CPUs and only
provides the possible CPUs via cpu_to_node() translation.
Change the node lookup in the driver to use early_cpu_to_node() so that
even with a limitation on the number of possible CPUs all eointc instances
are initialized.
This can't obviously cure the case where CONFIG_NR_CPUS is too small.
[ tglx: Massaged changelog ]
Fixes: 64cc451e45 ("irqchip/loongson-eiointc: Fix incorrect use of acpi_get_vec_parent")
Signed-off-by: Huacai Chen <chenhuacai@loongson.cn>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/20240623034113.1808727-1-chenhuacai@loongson.cn
is not defined as well documentation fixes to start using inclusive
terminology. The drivers get paths in DT bindings fixed as well as
proper interrupt handling for the ocores driver.
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEOZGx6rniZ1Gk92RdFA3kzBSgKbYFAmZ31U4ACgkQFA3kzBSg
KbYgMg/9Ew5g86A9u1BBiCytjzNXIrNNbL1rm7GsHH4elq5h+Pa2jS1AZjHB1ZtC
8KwogPvUeqJyzmO6SEzJVoDq8B4QIUGS7QFadqhKSNScO60MNfRmHXiOPoIXMNkS
pws3oquqM3BDdfvqtod1KFkVKsfok+UlDcOXmGJLKNzoBaBfZWHwGVBEW1E1xdLt
PrimxsIzMWNySmWimTf1nQl5Ah3gzcB79SdQFvqU50dGmscF4fAd7BirjNktrgJB
E45jD5341U2xb1pCEtsfgwyvJiul//Cx/iHneCiu/EvVelZjl/WG1lNu5DYpOzmU
oqhqkZJw3o0G3W8dK/CjyGlp8MsbQJoa2qSGA2V+1ZtQyj09wM727qhRMkFvqsRH
moTTNx2+KcSWrvjjXMvC2oht/rfKYbLzFSqzDiRzmphfgFjPQKDCL6EVoyQwvOYD
LpFRKyhSMTR/OpHfpdES+VQwvcvfmk5wHHQu5kl956bec63buIj0cFLiaAxiJR3v
HhsCeX+BCp5+3z15+/x2vnKPzNAmS8oc0ZOGiN3W8qYUBpv1GjwLXuEDNLKCXf+W
6xlTCb+lNTSR2m3R2me1fI0iuFQW5nLT6t3T/mGbNLu4xJ79Wq0rLRXpMxJQDnf7
XB+251eg2BOTe0Qbi015NUNF2LbVblsxz8n9pqYaRsF+bVyaiO0=
=T67e
-----END PGP SIGNATURE-----
Merge tag 'i2c-for-6.10-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux
Pull i2c fixes from Wolfram Sang:
"The core gains placeholders for recently added functions when
CONFIG_I2C is not defined as well documentation fixes to start using
inclusive terminology.
The drivers get paths in DT bindings fixed as well as proper interrupt
handling for the ocores driver"
* tag 'i2c-for-6.10-rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/wsa/linux:
docs: i2c: summary: be clearer with 'controller/target' and 'adapter/client' pairs
docs: i2c: summary: document 'local' and 'remote' targets
docs: i2c: summary: document use of inclusive language
docs: i2c: summary: update speed mode description
docs: i2c: summary: update I2C specification link
docs: i2c: summary: start sentences consistently.
i2c: Add nop fwnode operations
i2c: ocores: set IACK bit after core is enabled
dt-bindings: i2c: google,cros-ec-i2c-tunnel: correct path to i2c-controller schema
dt-bindings: i2c: atmel,at91sam: correct path to i2c-controller schema
-----BEGIN PGP SIGNATURE-----
iQGzBAABCgAdFiEE6fsu8pdIjtWE/DpLiiy9cAdyT1EFAmZ3TLcACgkQiiy9cAdy
T1HTFAv/Wfe83UZ53RRtnPSiAC7VqU8VZ6iYLOddOGX42xsnXoklz3D+oe6NYD8a
FMp0pMrz4txXIyP6V/UJbS7vB0zx6zdzbRKnqmZXeK3hCyCwRYl96Zh45rvy9N7J
vDGnqGDxv90AxzYJ5oVqCP2/0UQVeTC0rkW+cE/o5kiwpqds/cwfm4aQUtJL3wlG
x8Z5EXNGCxwRRZljsgFQnulpQkaDbQq7lpzC9vFtQm2AUFjyjXxM7g5vCSckxqgQ
6LrfK2XcvuRZwfTwwf83tWQDNjlGk6NhQuPSr7UjHo48MBQojXPk0sGJi+kkC9mJ
AU13DEa9lGGzmyhWLZuFVX1CHyaVzMe8lE5UDfAstpX06J0B7XpBy7QXDI7WxHSJ
2u3UySn4xSF954Lv+Zner92cB5oOvJq7iUv3T/sYycK83jtcCE6RJdSIdMzsaJX7
693u3a9uFofJJLL5gmjY91Qd7hSzlmCdgUYx03BnrFFzKnJNRP2/hL3V2APy8inB
bxcfvQ+1
=TIGs
-----END PGP SIGNATURE-----
Merge tag '6.10-rc4-smb3-client-fixes' of git://git.samba.org/sfrench/cifs-2.6
Pull smb client fixes from Steve French:
"Five smb3 client fixes
- three nets/fiolios cifs fixes
- fix typo in module parameters description
- fix incorrect swap warning"
* tag '6.10-rc4-smb3-client-fixes' of git://git.samba.org/sfrench/cifs-2.6:
cifs: Move the 'pid' from the subreq to the req
cifs: Only pick a channel once per read request
cifs: Defer read completion
cifs: fix typo in module parameter enable_gcm_256
cifs: drop the incorrect assertion in cifs_swap_rw()
Use numa_valid_node() function to verify that nid is a valid node ID
instead of inconsistent comparisons with either NUMA_NO_NODE or
MAX_NUMNODES.
-----BEGIN PGP SIGNATURE-----
iQFEBAABCgAuFiEEeOVYVaWZL5900a/pOQOGJssO/ZEFAmZ3vm8QHHJwcHRAa2Vy
bmVsLm9yZwAKCRA5A4Ymyw79kV6DB/41uPq1Dr2hk8ZtBEyaZg/XTA1WU8rc95PY
NqnWsrV1MjNt7ve2vBhZtirI+x8QIkpa/WV4y1qma2iBju1bOzkOw1o3VBwSeFMi
hTyLK9IFbJi9bF8xk4Lp/Km0VagpCAJLdWFdxzQCvtUfN2AZHNA+s3nk8VQIjnyj
glY7fdl9j6vtCRkT/5F0tETF8RfaoMuldwJGSIVjCQIk2oBkcPKnWcG4UQaVs2mP
F0UPQtNJxL+NCk/VGccsWhXONJ7amHK+Qq6xWZaC9MLAaoRAXDg05/S+t2m1iZxt
3HNBtrSPagNo7xTDsZ4sF+z+3YFk18QWKykRs2XXNfAapF6Ox2vs
=vZLS
-----END PGP SIGNATURE-----
Merge tag 'fixes-2024-06-23' of git://git.kernel.org/pub/scm/linux/kernel/git/rppt/memblock
Pull memblock fix from Mike Rapoport:
"Fix fragility in checks for unset node ID.
Use numa_valid_node() function to verify that nid is a valid node
ID instead of inconsistent comparisons with either NUMA_NO_NODE or
MAX_NUMNODES"
* tag 'fixes-2024-06-23' of git://git.kernel.org/pub/scm/linux/kernel/git/rppt/memblock:
memblock: use numa_valid_node() helper to check for invalid node ID
- A randconfig build fix for the VMware virtual GPU driver
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEzv7L6UO9uDPlPSfHEsHwGGHeVUoFAmZ32zQACgkQEsHwGGHe
VUqVdA//fjAlr3ZA85b+BrSV0WgGYb5BVCdZ9W2NYnoWe771VcNKM/83skoVudFu
jKEYuguLPizQrMgiQKKBNFwhLj5X7/DeF7Wicl7BcIQ4RFt03QfwkGSsHvXxq1p8
fcGy6WweBKaPVdCi9/UunbDOQGb8YK/gog7jR2J/tT+rPNFyO9YWRREfPE+/6Jso
gVv71HWtUINzJkEwcW5E6RACCrcYLdlYZwpdf1OQOzprIsLXOc8yAPpks7NywrXY
jn4Lhw31SiySZFuo7DIhlZVESaXvbvaVHw5f4joOvfzSQ+HQhjsoK+hqkqfHEFJJ
JGEyBrXB5J1AZ4AG7Jmm+I04CIhvnl+P8R4VluxpQ6PJTVa/wXoFanHGY79VTQHd
CD5o6STbv4xYSWWq0boI57d96gZDmRY8qbn7tZU+mb1UIoTU2YymkdM/OXeUfdzE
ltbVqJIWxjTFd5Ar07IBFY3swjcOpr0HJ4FWWc2ybSDTK1+h8swaT82BSSJfoLio
tG/7IeJ7ycnVufuzpOY7VbLah4kdM5irhETatkfw18cQAiKZU/AOop+mN1lgRaJ+
RE62KPXwAv/45w1t19oLdIWCd4EqK+PfBHQcqGaIpYe0SMIVtB63r4yuv/lb0AXn
MizuET14Qr1SpXl2Slw6V8973e58gKB45o7vaP6M0cjALuRk7Hc=
=WXpS
-----END PGP SIGNATURE-----
Merge tag 'x86_urgent_for_v6.10_rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip
Pull x86 fixes from Borislav Petkov:
- An ARM-relevant fix to not free default RMIDs of a resource control
group
- A randconfig build fix for the VMware virtual GPU driver
* tag 'x86_urgent_for_v6.10_rc5' of git://git.kernel.org/pub/scm/linux/kernel/git/tip/tip:
x86/resctrl: Don't try to free nonexistent RMIDs
drm/vmwgfx: Fix missing HYPERVISOR_GUEST dependency
Modify the comment formatting in irq_find_matching_fwspec function to
enhance code readability and maintain consistency.
Signed-off-by: Anna-Maria Behnsen <anna-maria@linutronix.de>
Signed-off-by: Shivamurthy Shastri <shivamurthy.shastri@linutronix.de>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Link: https://lore.kernel.org/r/20240614102403.13610-2-shivamurthy.shastri@linutronix.de
Each syscon node must come with a dedicated/specific compatible, which
is also reported by dtbs_check:
hi3660-hikey960.dtb: usb3_otg_bc@ff200000: compatible: ['syscon', 'simple-mfd'] is too short
Link: https://lore.kernel.org/r/20240518204443.122586-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Add dedicated bindings for the Hisilicon Kirin 960 USB OTG Syscon,
to fully document the block and also fix dtbs_check warning:
hi3660-hikey960.dtb: usb3_otg_bc@ff200000: compatible: ['syscon', 'simple-mfd'] is too short
Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20240518204443.122586-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Merge series from David Lechner <dlechner@baylibre.com>:
In the IIO subsystem, we are finding that it is common to call
spi_optimize_message() during driver probe since the SPI message
doesn't change for the lifetime of the driver. This patch adds a
devm_spi_optimize_message() helper to simplify this common pattern.
Merge series from Andrejs Cainikovs <andrejs.cainikovs@gmail.com>:
This change adds local MCLK handling, which would cover a case when a
reference audio clock is present in a system, but is not allowed to be
changed, see [1].
[1]: https://lore.kernel.org/all/ZfBdxrzX3EnPuGOn@ediswmail9.ad.cirrus.com/
Merge series from Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>:
Make few pointers in ASoC functions as pointers to const, so the code is
clearer to read, a bit safer and allows further constifications (e.g.
placing some data as rodata).
Merge series from Christian Hewitt <christianshewitt@gmail.com>:
Update bindings and add a driver compatible for the pcm5242
chip used on the Odroid HiFi-Shield2 i2c mezzanine board.
Merge series from Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>:
Set of simple cleanups from similar issues in all Qualcomm WCD93xx
codecs.
The first patch "ASoC: codecs: wcd-mbhc: Constify passed MBHC reg
fields" is a requirement for few others, but except this they are
independent.
Merge series from Neil Armstrong <neil.armstrong@linaro.org>:
Convert the text bindings of the Everest ES7241/ES7134/7144/7154 2 channels
I2S analog to digital converter to dt-schema.
Merge series from Ricard Wanderlof <ricard.wanderlof@axis.com>:
In some cases, depending on system design, the MICBIAS pins on the
chip are not needed as such, but a couple of extra GPIO pins would be
useful. This patch allows the MICBIAS pins to be configured in the
device tree as general purpose output pins, controlled via the GPIO
framework.
Owing to their originally intended purpose there are some limitations:
when the MICBIAS pins are deactivated, they will float, so will likely
need a pulldown in many applications. When activated, they will
assume the voltage specified by the micbias1-vg and micbias2-vg
properties, respectively, meaning that the resulting output voltage
will be 2.0 V, 2.5 V or AVDD .
Merge series from Paul Handrigan <paulha@opensource.cirrus.com>:
This patchset provides ASoC support for the latest family
of Cirrus Logic multichannel, high performance audio ADCs.
The devices that are supported are CS5302 (2 channel ADC),
CS5304 (4 channel ADC), and CS5308 (8 channel ADC).
TC queues needs to be correctly updated when the number of queues on
a VSI is reconfigured, so netdev's queue and TC settings will be
dynamically adjusted and could accurately represent the underlying
hardware state after changes to the VSI queue counts.
Fixes: 0754d65bd4 ("ice: Add infrastructure for mqprio support via ndo_setup_tc")
Reviewed-by: Wojciech Drewek <wojciech.drewek@intel.com>
Signed-off-by: Jan Sokolowski <jan.sokolowski@intel.com>
Signed-off-by: Karen Ostrowska <karen.ostrowska@intel.com>
Tested-by: Pucha Himasekhar Reddy <himasekharx.reddy.pucha@intel.com> (A Contingent worker at Intel)
Signed-off-by: Tony Nguyen <anthony.l.nguyen@intel.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
IEEE1588(ptp) is optional feature for network. Remove it from required
list to fix below CHECK_DTBS warning.
arch/arm64/boot/dts/freescale/fsl-ls1043a-qds.dtb: ethernet@f0000: 'ptp-timer' is a required property
Signed-off-by: Frank Li <Frank.Li@nxp.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: David S. Miller <davem@davemloft.net>
Tony Nguyen says:
====================
ice: prepare representor for SF support
Michal Swiatkowski says:
This is a series to prepare port representor for supporting also
subfunctions. We need correct devlink locking and the possibility to
update parent VSI after port representor is created.
Refactor how devlink lock is taken to suite the subfunction use case.
VSI configuration needs to be done after port representor is created.
Port representor needs only allocated VSI. It doesn't need to be
configured before.
VSI needs to be reconfigured when update function is called.
The code for this patchset was split from (too big) patchset [1].
[1] https://lore.kernel.org/netdev/20240213072724.77275-1-michal.swiatkowski@linux.intel.com/
---
Originally from https://lore.kernel.org/netdev/20240605-next-2024-06-03-intel-next-batch-v2-0-39c23963fa78@intel.com/
Changes:
- delete ice_repr_get_by_vsi() from header
- rephrase commit message in moving devlink locking
====================
Signed-off-by: David S. Miller <davem@davemloft.net>
Apparently there was never a maintainers entry for the ARM Alphascale
ASM9260 SoC, thus patches end up nowhere. Add such entry, because even
if platform is orphaned and on its way out of the kernel, it is nice to
take patches if someone sends something.
I do not plan to actively support/maintain ARM Alphascale but I can take
odd fixes now and then.
Cc: Oleksij Rempel <linux@rempel-privat.de>
Link: https://lore.kernel.org/r/20240612141018.7348-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
The watchdog appears to be an ARM SP805, add the full compatible
and the needed clocks properties. Leave this disabled for now
as functionality is not fully tested.
Signed-off-by: Andrew Davis <afd@ti.com>
Link: https://lore.kernel.org/r/20240612151314.27967-2-afd@ti.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Fixes the following DTB check warning:
> node has a reg or ranges property, but no unit name
Signed-off-by: Andrew Davis <afd@ti.com>
Link: https://lore.kernel.org/r/20240612151314.27967-1-afd@ti.com
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Apparently there was never a maintainers entry for the ARM Texas
Instruments Nspire SoC, thus patches end up nowhere. Add such entry,
because even if platform is orphaned and on its way out of the kernel,
it is nice to take patches if someone sends something.
I do not plan to actively support/maintain Nspire platform but I can
take odd fixes now and then.
Cc: Daniel Tang <dt.tangr@gmail.com>
Cc: Andrew Davis <afd@ti.com>
Acked-by: Andrew Davis <afd@ti.com>
Link: https://lore.kernel.org/r/20240612141740.8470-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
The ARM VIA/WonderMedia VT8500 platform became orphaned in
commit 8f1b7ba55c ("MAINTAINERS: ARM/VT8500, remove defunct e-mail")
and clearly it is on the way out of the kernel. However few folks send
patches to it and it is nice to actually take them, till the platform is
in the kernel.
Alexey Charkov still has VT8500 hardware and plans to work on upstream,
so add Alexey as the maintainer. Krzysztof will collect patches.
Extend the maintainer entry to cover also VT8500 DTS.
Cc: Alexey Charkov <alchark@gmail.com>
Acked-by: Alexey Charkov <alchark@gmail.com>
Link: https://lore.kernel.org/r/20240613064612.8589-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
There is no maintainers entry for the ARM LSI AXM SoC, thus patches end
up nowhere. Add such entry, because even if platform is orphaned and on
its way out of the kernel, it is nice to take patches if someone sends
something.
I do not plan to actively support/maintain AXM but I can take odd fixes
now and then.
Link: https://lore.kernel.org/r/20240613134910.7862-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
There is no maintainers entry for the ARM MOXA ART SoC, thus patches end
up nowhere. Add such entry, because even if platform is orphaned and on
its way out of the kernel, it is nice to take patches if someone sends
something.
I do not plan to actively support/maintain MOXA but I can take odd fixes
now and then.
Cc: Jonas Jensen <jonas.jensen@gmail.com>
Link: https://lore.kernel.org/r/20240613135956.8899-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
