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932,869 commits

Author SHA1 Message Date
Thierry Reding
dadf79561b Merge branch 'for-5.7/dt-bindings' into for-5.7/arm64/dt 2020-03-12 12:14:09 +01:00
Kim Phillips
753039ef8b x86/cpu/amd: Call init_amd_zn() om Family 19h processors too
Family 19h CPUs are Zen-based and still share most architectural
features with Family 17h CPUs, and therefore still need to call
init_amd_zn() e.g., to set the RECLAIM_DISTANCE override.

init_amd_zn() also sets X86_FEATURE_ZEN, which today is only used
in amd_set_core_ssb_state(), which isn't called on some late
model Family 17h CPUs, nor on any Family 19h CPUs:
X86_FEATURE_AMD_SSBD replaces X86_FEATURE_LS_CFG_SSBD on those
later model CPUs, where the SSBD mitigation is done via the
SPEC_CTRL MSR instead of the LS_CFG MSR.

Family 19h CPUs also don't have the erratum where the CPB feature
bit isn't set, but that code can stay unchanged and run safely
on Family 19h.

Signed-off-by: Kim Phillips <kim.phillips@amd.com>
Signed-off-by: Borislav Petkov <bp@suse.de>
Link: https://lkml.kernel.org/r/20200311191451.13221-1-kim.phillips@amd.com
2020-03-12 12:13:44 +01:00
Anson Huang
52cbc58b3b thermal: Add COMPILE_TEST support for i.MX8MM
Add COMPILE_TEST support to i.MX8MM thermal driver for better compile
testing coverage.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Amit Kucheria <amit.kucheria@linaro.org>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Link: https://lore.kernel.org/r/1583509057-8197-1-git-send-email-Anson.Huang@nxp.com
2020-03-12 12:11:43 +01:00
Sowjanya Komatineni
efdd205ccb clk: tegra: Remove audio clocks configuration from clock driver
Current clock driver enables PLLA, cdev1 on Tegra20 and extern1 on
Tegra30 and above as a part of clocks init and there is no need to
have these audio clocks enabled by the clock driver.

extern1 is used as parent for clk_out_1 and clk_out_1 is dedicated
for audio mclk on Tegra30 and above Tegra platforms and these clocks
are taken care by ASoC driver.

So, this patch removes audio related clocks configuration from clock
init of Tegra20 and above.

Tested-by: Dmitry Osipenko <digetx@gmail.com>
Reviewed-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-03-12 12:10:49 +01:00
Thomas Hellstrom
3b0d6458c7 drm/vmwgfx: Refuse DMA operation when SEV encryption is active
TTM doesn't yet fully support mapping of DMA memory when SEV is active,
so in that case, refuse DMA operation. For guest-backed object operation
this means 3D acceleration will be disabled. For host-backed, VRAM will be
used for data transfer between the guest and the device.

Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
2020-03-12 12:00:07 +01:00
Thomas Hellstrom
81a00960d3 drm/vmwgfx: Fix the refuse_dma mode when using guest-backed objects
When we refuse DMA from system pages for whatever reason, we don't
handle that correctly when guest-backed objects was enabled.
Since guest-backed objects by definition require DMA to and from
system pages, disable all functionality that relies on them.
That basically amounts to 3D acceleration and screen targets.

Signed-off-by: Thomas Hellstrom <thellstrom@vmware.com>
Reviewed-by: Brian Paul <brianp@vmware.com>
2020-03-12 12:00:07 +01:00
Yuantian Tang
cbe259fd80 thermal: qoriq: Fix a compiling issue
Qoriq thermal driver is used by both PowerPC and ARM architecture.
When built for PowerPC architecture, it reports error:
undefined reference to `.__devm_regmap_init_mmio_clk'
To fix it, select config REGMAP_MMIO.

Fixes: 4316237bd6 (thermal: qoriq: Convert driver to use regmap API)
Signed-off-by: Yuantian Tang <andy.tang@nxp.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Link: https://lore.kernel.org/r/20200303084641.35687-1-andy.tang@nxp.com
2020-03-12 11:56:53 +01:00
Anson Huang
ef502fc1f0 thermal: Remove COMPILE_TEST for IMX_SC_THERMAL
i.MX SCU thermal driver depends on IMX_SCU which does NOT have
COMPILE_TEST enabled, so need to remove COMPILE_TEST for i.MX
SCU thermal as well.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reported-by: Stephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Link: https://lore.kernel.org/r/1583222684-10229-2-git-send-email-Anson.Huang@nxp.com
2020-03-12 11:56:53 +01:00
Anson Huang
15a26319c4 thermal: Fix build warning of !defined(CONFIG_THERMAL_OF)
Add "inline" to thermal_zone_of_get_sensor_id() function to avoid below
build warning of !defined(CONFIG_THERMAL_OF).

In file included from drivers/hwmon/hwmon.c:22:
include/linux/thermal.h:382:12: warning: 'thermal_zone_of_get_sensor_id'
defined but not used [-Wunused-function]
382 | static int thermal_zone_of_get_sensor_id(struct device_node *tz_np,

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reported-by: Stephen Rothwell <sfr@canb.auug.org.au>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Link: https://lore.kernel.org/r/1583222684-10229-1-git-send-email-Anson.Huang@nxp.com
2020-03-12 11:56:53 +01:00
Anson Huang
b009514f97 thermal: imx_thermal: Use __maybe_unused instead of CONFIG_PM_SLEEP
Use __maybe_unused for power management related functions instead
of #if CONFIG_PM_SLEEP to simplify the code.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Acked-by: Uwe Kleine-König <u.kleine-koenig@pengutronix.de>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Link: https://lore.kernel.org/r/1583139266-23615-1-git-send-email-Anson.Huang@nxp.com
2020-03-12 11:56:53 +01:00
Anson Huang
1fd213f38b thermal: imx_sc_thermal: Align imx sc thermal msg structs to 4
The i.MX SCU API strongly assumes that messages are composed out
of 4-bytes words but some of our message structs have odd sizeofs,
use __packed __aligned(4) to avoid potential oopses.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Link: https://lore.kernel.org/r/1583117485-30922-1-git-send-email-Anson.Huang@nxp.com
2020-03-12 11:56:53 +01:00
Linus Walleij
7375f2ac6b thermal: ti-soc-thermal: Use GPIO descriptors
This switches the TI SoC thermal driver to use GPIO
descriptors instead of retrieveing a GPIO number from the
device tree and requesting the GPIO separately.

Cc: Keerthy <j-keerthy@ti.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Link: https://lore.kernel.org/r/20200229210532.173430-1-linus.walleij@linaro.org
2020-03-12 11:56:53 +01:00
Linus Walleij
eb85046203 thermal: Rephrase the Kconfig text for thermal
The thermal subsystem may have relied on sysfs in 2008 when it
was introduced, but these days the thermal zones will more often
than not come from the hardware descriptions and not from sysfs.

Drop the "Generic" phrases as well: there are no non-generic
drivers that I know of, the thermal framework is by definition
generic.

Reword a bit and fix some grammar.

[ Daniel Lezcano ] : fixed Randy's comment s/offers/offer/

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Link: https://lore.kernel.org/r/20200229204527.143796-1-linus.walleij@linaro.org
2020-03-12 11:56:53 +01:00
Anson Huang
5eed800a68 thermal: imx8mm: Add support for i.MX8MM thermal monitoring unit
i.MX8MM has a thermal monitoring unit(TMU) inside, it ONLY has one
sensor for CPU, add support for reading immediate temperature of
this sensor.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Link: https://lore.kernel.org/r/1582947862-11073-2-git-send-email-Anson.Huang@nxp.com
2020-03-12 11:56:53 +01:00
Anson Huang
444eb18d09 dt-bindings: thermal: imx8mm-thermal: Add binding doc for i.MX8MM
Add thermal binding doc for Freescale's i.MX8MM Thermal Monitoring Unit.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Link: https://lore.kernel.org/r/1582947862-11073-1-git-send-email-Anson.Huang@nxp.com
2020-03-12 11:56:53 +01:00
Marek Szyprowski
82bdde8ecd thermal: exynos: Silence warning during deferred probe
Don't confuse user with meaningless warning about the failure of
registering sensors in case of deferred probe.

Signed-off-by: Marek Szyprowski <m.szyprowski@samsung.com>
Reviewed-by: Amit Kucheria <amit.kucheria@linaro.org>
Acked-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Reviewed-by: Krzysztof Kozlowski <krzk@kernel.org>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Link: https://lore.kernel.org/r/20200228092331.21548-1-m.szyprowski@samsung.com
2020-03-12 11:56:53 +01:00
Stanimir Varbanov
808431d6de media: venus: vdec: Fix forgotten mutex unlock in start streaming
This fixes the following smatch warning in the error path:

drivers/media/platform/qcom/venus/vdec.c:968 vdec_start_streaming()
 warn: inconsistent returns 'mutex:&inst->lock'.
  Locked on:   line 952
  Unlocked on: line 963
               line 968

by goto mutex unlock.

Signed-off-by: Stanimir Varbanov <stanimir.varbanov@linaro.org>
Signed-off-by: Mauro Carvalho Chehab <mchehab+huawei@kernel.org>
2020-03-12 11:50:20 +01:00
Jonathan Neuschäfer
f55f7f81bf dt-bindings: pinctrl: at91: Fix a typo ("descibe")
Signed-off-by: Jonathan Neuschäfer <j.neuschaefer@gmx.net>
Link: https://lore.kernel.org/r/20200308214230.15193-1-j.neuschaefer@gmx.net
Acked-by: Ludovic Desroches <ludovic.desroches@microchip.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-03-12 11:45:15 +01:00
Igor Vavro
eaee5d9f20 pinctrl: meson: add tsin pinctrl for meson gxbb/gxl/gxm
Add the tsin pinctrl definitions needed for integrated DVB hardware
support on Meson GXBB/GXL/GXM boards.

changes in v2
- fix ordering and numbering of uart_c ping flagged by Otto in [1]

[1] http://lists.infradead.org/pipermail/linux-amlogic/2020-March/015906.html

Signed-off-by: Igor Vavro <afl2001@gmail.com>
[updated commit message]
Signed-off-by: Christian Hewitt <christianshewitt@gmail.com>
Link: https://lore.kernel.org/r/1583377666-13378-1-git-send-email-christianshewitt@gmail.com
Reviewed-by: Neil Armstrong <narmstrong@baylibre.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
2020-03-12 11:43:52 +01:00
Anson Huang
e20db70dba thermal: imx_sc: add i.MX system controller thermal support
i.MX8QXP is an ARMv8 SoC which has a Cortex-M4 system controller
inside, the system controller is in charge of controlling power,
clock and thermal sensors etc..

This patch adds i.MX system controller thermal driver support,
Linux kernel has to communicate with system controller via MU
(message unit) IPC to get each thermal sensor's temperature,
it supports multiple sensors which are passed from device tree,
please see the binding doc for details.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Link: https://lore.kernel.org/r/1582330132-13461-3-git-send-email-Anson.Huang@nxp.com
2020-03-12 11:40:57 +01:00
Anson Huang
34471abfc8 thermal: of-thermal: add API for getting sensor ID from DT
This patch adds new API thermal_zone_of_get_sensor_id() to
provide the feature of getting sensor ID from DT thermal
zone's node. It's useful for thermal driver to register the
specific thermal zone devices from DT in a common way.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Link: https://lore.kernel.org/r/1582330132-13461-2-git-send-email-Anson.Huang@nxp.com
2020-03-12 11:40:57 +01:00
Anson Huang
7dc6ffbd79 dt-bindings: fsl: scu: add thermal binding
NXP i.MX8QXP is an ARMv8 SoC with a Cortex-M4 core inside as
system controller, the system controller is in charge of system
power, clock and thermal sensors etc. management, Linux kernel
has to communicate with system controller via MU (message unit)
IPC to get temperature from thermal sensors, this patch adds
binding doc for i.MX system controller thermal driver.

Signed-off-by: Anson Huang <Anson.Huang@nxp.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Reviewed-by: Dong Aisheng <aisheng.dong@nxp.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Link: https://lore.kernel.org/r/1582330132-13461-1-git-send-email-Anson.Huang@nxp.com
2020-03-12 11:40:57 +01:00
Freeman Liu
554fdbaf19 thermal: sprd: Add Spreadtrum thermal driver support
This patch adds the support for Spreadtrum thermal sensor controller,
which can support maximum 8 sensors.

Signed-off-by: Freeman Liu <freeman.liu@unisoc.com>
Co-developed-with: Baolin Wang <baolin.wang@unisoc.com>
Signed-off-by: Baolin Wang <baolin.wang7@gmail.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Link: https://lore.kernel.org/r/ebeb2839cff4d4027b37e787427c5af0e11880c8.1582013101.git.baolin.wang7@gmail.com
2020-03-12 11:40:57 +01:00
Baolin Wang
f2ccf917ad dt-bindings: thermal: sprd: Add the Spreadtrum thermal documentation
Add the Spreadtrum thermal documentation.

Signed-off-by: Baolin Wang <baolin.wang@unisoc.com>
Signed-off-by: Baolin Wang <baolin.wang7@gmail.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Link: https://lore.kernel.org/r/444e45ce0a9b390b2502dfcefd1ddb36948fa8e1.1582013101.git.baolin.wang7@gmail.com
2020-03-12 11:40:57 +01:00
Niklas Söderlund
267c4d8d13 thermal: rcar_gen3_thermal: Generate interrupt when temperature changes
The desired behavior of the driver is to generate an interrupt and call
thermal_zone_device_update() as soon as the temperature have changed
more then one degree.

When the set_trips operation was implemented it was believed that the
trip window set by the framework would move around the current
temperature and the hysteresis value described in devicetree. The
behavior of the framework is however to set a window based on the trip
points described in devicetree.

Remove the set_trips operation which was not used correctly and update
the temperatures that triggers interrupts directly from the interrupt
handler.

Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Reviewed-by: Kieran Bingham <kieran.bingham+renesas@ideasonboard.com>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Link: https://lore.kernel.org/r/20200212224917.737314-1-niklas.soderlund+renesas@ragnatech.se
2020-03-12 11:40:57 +01:00
Niklas Söderlund
d543c8424c thermal: rcar_gen3_thermal: Remove unneeded curly brackets
When devm_add_action() was turned into devm_add_action_or_reset() the
curly brackets for the error case where kept but are not needed, remove
them to match the style of the driver.

Signed-off-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Link: https://lore.kernel.org/r/20200212224732.736785-1-niklas.soderlund+renesas@ragnatech.se
2020-03-12 11:40:57 +01:00
Sowjanya Komatineni
acbeec3d37 clk: tegra: Remove tegra_pmc_clk_init along with clk ids
Current Tegra clock driver registers PMC clocks clk_out_1, clk_out_2,
clk_out_3 and 32KHz blink output in tegra_pmc_init() which does direct
PMC register access during clk_ops and these PMC register read and write
access will not happen when PMC is in secure mode.

Any direct PMC register access from non-secure world will not go
through.

All the PMC clocks are moved to Tegra PMC driver with PMC as a clock
provider.

This patch removes tegra_pmc_clk_init along with corresponding clk ids
from Tegra clock driver.

Tested-by: Dmitry Osipenko <digetx@gmail.com>
Reviewed-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-03-12 11:34:04 +01:00
Sowjanya Komatineni
c9e28c25a0 clk: tegra: Remove CLK_M_DIV fixed clocks
Tegra has no CLK_M_DIV2 and CLK_M_DIV4 clocks and instead it has
OSC_DIV2 and OSC_DIV4 clocks from OSC pads which are the possible
parents of PMC clocks for Tegra30 through Tegra210.

Tegra PMC clock parents are changed to use OSC_DIV clocks.

So, this patch removes CLK_M_DIV fixed clocks

Tested-by: Dmitry Osipenko <digetx@gmail.com>
Reviewed-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-03-12 11:33:32 +01:00
Sowjanya Komatineni
6fe38aa8ca clk: tegra: Fix Tegra PMC clock out parents
Tegra PMC clocks clk_out_1, clk_out_2, and clk_out_3 supported parents
are osc, osc_div2, osc_div4 and extern clock.

Clock driver is using incorrect parents clk_m, clk_m_div2, clk_m_div4
for PMC clocks.

This patch fixes this.

Tested-by: Dmitry Osipenko <digetx@gmail.com>
Reviewed-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-03-12 11:33:30 +01:00
Sowjanya Komatineni
2b50e49b09 clk: tegra: Add Tegra OSC to clock lookup
OSC is one of the parent for Tegra PMC clocks clk_out_1, clk_out_2,
and clk_out_3.

This patch adds Tegra OSC to clock lookup.

Tested-by: Dmitry Osipenko <digetx@gmail.com>
Reviewed-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-03-12 11:33:29 +01:00
Sowjanya Komatineni
9a85eb4d62 clk: tegra: Add support for OSC_DIV fixed clocks
Tegra30 through Tegra210 has OSC_DIV2 and OSC_DIV4 fixed clocks
from the OSC pads.

This patch adds support for these clocks.

Tested-by: Dmitry Osipenko <digetx@gmail.com>
Reviewed-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Sowjanya Komatineni <skomatineni@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-03-12 11:33:27 +01:00
Thierry Reding
5e7322bbf0 Merge branch 'for-5.7/dt-bindings' into for-5.7/clk 2020-03-12 11:33:00 +01:00
Peng Fan
0c868627e6 cpufreq: dt: Allow platform specific intermediate callbacks
Platforms may need to implement platform specific get_intermediate and
target_intermediate hooks.

Update cpufreq-dt driver's platform data to contain those for such
platforms.

Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Viresh Kumar <viresh.kumar@linaro.org>
2020-03-12 15:43:52 +05:30
Dmitry Osipenko
224c663205 ARM: tegra: Enable Tegra cpuidle driver in tegra_defconfig
The Tegra CPU Idle driver was moved out into driver/cpuidle/ directory and
it is now a proper platform driver.

Acked-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-03-12 11:05:00 +01:00
Dmitry Osipenko
742d76ef0e ARM: multi_v7_defconfig: Enable Tegra cpuidle driver
The Tegra CPU Idle driver was moved out into driver/cpuidle/ directory and
it is now a proper platform driver.

Acked-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-03-12 11:04:41 +01:00
Dmitry Osipenko
891e1286c1 ARM: tegra: Propagate error from tegra_idle_lp2_last()
Technically cpu_suspend() may fail and it's never good to lose information
about failure. For example things like cpuidle core could correctly sample
idling time in the case of failure.

Acked-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Tested-by: Peter Geis <pgwipeout@gmail.com>
Tested-by: Jasper Korten <jja2000@gmail.com>
Tested-by: David Heidelberg <david@ixit.cz>
Tested-by: Nicolas Chauvet <kwizart@gmail.com>
Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-03-12 10:54:05 +01:00
Dmitry Osipenko
f5619492c8 ARM: tegra: Change tegra_set_cpu_in_lp2() type to void
The Tegra30 CPUIDLE driver has intention to check whether primary CPU was
the last CPU that entered LP2 (CC6) idle-state, but that functionality
never got utilized because driver never supported the CC6 state for the
case where any secondary CPU is online. The new cpuidle driver will
properly support CC6 on Tegra30, including the case where secondary CPUs
are online, and that knowledge about what CPUs entered into CC6 won't be
needed at all because new driver will use different approach by making use
of the coupled idle-state and explicitly parking secondary CPUs before
entering into CC6. Thus this patch is just a minor cleanup change.

Acked-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Tested-by: Peter Geis <pgwipeout@gmail.com>
Tested-by: Jasper Korten <jja2000@gmail.com>
Tested-by: David Heidelberg <david@ixit.cz>
Tested-by: Nicolas Chauvet <kwizart@gmail.com>
Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-03-12 10:53:52 +01:00
Dmitry Osipenko
d90bdb72bb ARM: tegra: Remove pen-locking from cpuidle-tegra20
Pen-locking is meant to block CPU0 if CPU1 wakes up during of entering
into LP2 because of some interrupt firing up, preventing unnecessary LP2
enter that will be resumed immediately. Apparently this case doesn't
happen often in practice, I checked how often it takes place and found
that after ~20 hours of browsing web, managing email, watching videos and
idling (15+ hours) there is only a dozen of early LP2 entering abortions
and they all happened while device was idling. Thus let's remove the
pen-locking and make LP2 entering uninterruptible, simplifying code quite
a lot. This will also become very handy for the upcoming unified cpuidle
driver, allowing to have a common LP2 code-path across of different
hardware generations.

Acked-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Tested-by: Peter Geis <pgwipeout@gmail.com>
Tested-by: Jasper Korten <jja2000@gmail.com>
Tested-by: David Heidelberg <david@ixit.cz>
Tested-by: Nicolas Chauvet <kwizart@gmail.com>
Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-03-12 10:53:37 +01:00
Dmitry Osipenko
859a6f6ee1 ARM: tegra: Add tegra_pm_park_secondary_cpu()
This function resembles tegra_cpu_die() of the hotplug code, but
this variant is more suitable to be used for CPU PM because it's made
specifically to be used by cpu_suspend(). In short this function puts
secondary CPU offline, it will be used by the new CPUIDLE driver.

Acked-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Tested-by: Peter Geis <pgwipeout@gmail.com>
Tested-by: Jasper Korten <jja2000@gmail.com>
Tested-by: David Heidelberg <david@ixit.cz>
Tested-by: Nicolas Chauvet <kwizart@gmail.com>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-03-12 10:53:18 +01:00
Dmitry Osipenko
df25e55488 ARM: tegra: Compile sleep-tegra20/30.S unconditionally
The sleep-tegra*.S provides functionality required for suspend/resume
and CPU hotplugging. The new unified CPUIDLE driver will support multiple
hardware generations starting from Terga20 and ending with Tegra124, the
driver will utilize functions that are provided by the assembly and thus
it is cleaner to compile that code without any build-dependencies in order
to avoid churning with #ifdef's.

Acked-by: Peter De Schrijver <pdeschrijver@nvidia.com>
Tested-by: Peter Geis <pgwipeout@gmail.com>
Tested-by: Jasper Korten <jja2000@gmail.com>
Tested-by: David Heidelberg <david@ixit.cz>
Tested-by: Nicolas Chauvet <kwizart@gmail.com>
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-03-12 10:53:04 +01:00
Fabrizio Castro
e30f56800e arm64: dts: renesas: Add HiHope RZ/G2M board with idk-1110wr display
The HiHope RZ/G2M is advertised as compatible with panel idk-1110wr
from Advantech, however the panel isn't sold alongside the board.
A new dts, adding everything that's required to get the panel to
work with HiHope RZ/G2M, is the most convenient way to support the
HiHope RZ/G2M when it's connected to the idk-1110wr.

Signed-off-by: Fabrizio Castro <fabrizio.castro@bp.renesas.com>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Link: https://lore.kernel.org/r/1583957020-16359-3-git-send-email-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-03-12 10:51:20 +01:00
Takeshi Kihara
9aa7dea8d6 arm64: dts: renesas: r8a77990: Add CPUIdle support for CA53 cores
Enable cpuidle (core shutdown) support for the CA53 cores on R-Car E3.

Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20200309171200.21226-1-geert+renesas@glider.be
2020-03-12 10:51:20 +01:00
Takeshi Kihara
5fc00fce62 arm64: dts: renesas: r8a77965: Add CPUIdle support for CA57 cores
Enable cpuidle (core shutdown) support for the CA57 cores on R-Car M3-N.

Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20200309171112.21086-1-geert+renesas@glider.be
2020-03-12 10:51:20 +01:00
Geert Uytterhoeven
04456450f5 arm64: dts: renesas: r8a77961: salvator-xs: Fix memory unit-address
Correct the unit-address of the second memory node, to match the
corresponding reg property.

Fixes: 92980759c1 ("arm64: dts: renesas: Add support for Salvator-XS with R-Car M3-W+")
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20200309170825.20882-1-geert+renesas@glider.be
2020-03-12 10:51:20 +01:00
Yuya Hamamachi
42afeb28d2 arm64: dts: renesas: Add support for M3ULCB with R-Car M3-W+
Add initial support for the Renesas M3ULCB board equipped with an R-Car
M3-W+ SiP with 8 (2 x 4) GiB of RAM.
To avoid build error on 'ulcb.dtsi', ssi2 is added into 'r8a77961.dtsi'.

Based on commit 92980759c1 ("arm64: dts: renesas: Add support for
Salvator-XS with R-Car M3-W+").

Signed-off-by: Yuya Hamamachi <yuya.hamamachi.sx@renesas.com>
Link: https://lore.kernel.org/r/20200309064425.25437-3-yuya.hamamachi.sx@renesas.com
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2020-03-12 10:51:20 +01:00
Geert Uytterhoeven
17ab3c3e31 arm64: dts: renesas: r8a77961: Add thermal nodes
Add a device node for the Thermal Sensor/Chip Internal Voltage Monitor
in the R-Car M3-W+ (R8A77961) SoC, and describe the thermal zones.

According to the R-Car Gen3 Hardware Manual Errata for Revision 2.00 of
Jan 31, 2020, the thermal parameters for R-Car M3-W+ are the same as for
R-Car M3-W.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Niklas Söderlund <niklas.soderlund+renesas@ragnatech.se>
Link: https://lore.kernel.org/r/20200306110025.24747-1-geert+renesas@glider.be
2020-03-12 10:51:20 +01:00
Dmitry Osipenko
0411ea89a6 drm/tegra: dc: Release PM and RGB output when client's registration fails
Runtime PM and RGB output need to be released when host1x client
registration fails. The releasing is missed in the code, let's correct it.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-03-12 10:26:19 +01:00
Dmitry Osipenko
a858ac8f40 drm/tegra: dc: Use devm_platform_ioremap_resource
The devm_platform_ioremap_resource() helper replaces few lines of a
boilerplate code with a single line, making code to look cleaner a tad.

Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
2020-03-12 10:26:02 +01:00
satya priya
f9d690b6ec tty: serial: qcom_geni_serial: Allocate port->rx_fifo buffer in probe
To fix the RX cancel command failure, rx_fifo buffer needs to be
flushed in stop_rx() by calling handle_rx().In handle_rx() the data
in rx_fifo buffer is read and then dropped, not sent to upper layers.

If set_termios is called before startup, by this time memory is not
allocated to port->rx_fifo buffer, which leads to a NULL pointer
dereference.

To avoid this NULL pointer dereference allocate memory to port->rx_fifo
in probe itself.

Signed-off-by: satya priya <skakit@codeaurora.org>
Reported-by: Stephen Boyd <swboyd@chromium.org>
Link: https://lore.kernel.org/r/1583477228-32231-2-git-send-email-skakit@codeaurora.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2020-03-12 10:10:27 +01:00
Linus Walleij
9a8da6082d tty: serial: ifx6x60: Convert to GPIO descriptors
This driver for the Intel MID never seems to have been properly
integrated upstream: the platform data in <linux/spi/ifx_modem.h>
is not used anywhere in the kernel and haven't been since it was
merged into the kernel in 2010.

There might be out-of-tree users, so I don't want to delete the
driver, but I will refactor it to use GPIO descriptors, which
means that out-of-tree users will need to adapt.

There are several examples in the kernel of how to provide the
resources necessary for using GPIO descriptors to pass in the
GPIO lines, for the MID platform in particular, it will suffice
to inspect the code in files like:
arch/x86/platform/intel-mid/device_libs/platform_bt.c

This refactoring transfers all GPIOs in the driver, including
a hard-coded "PMU reset" in the driver to use GPIO descriptors
instead.

The following named GPIO descriptors need to be supplied:
- reset
- power
- mrdy
- srdy
- rst_out
- pmu_reset

Cc: Russ Gorby <russ.gorby@intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20200311083131.693908-2-linus.walleij@linaro.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2020-03-12 10:03:54 +01:00