Introduce new type for immediate HW stats and allow the value in
mlxsw offload.
Signed-off-by: Jiri Pirko <jiri@mellanox.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Currently don't allow actions with any other type to be inserted.
Signed-off-by: Jiri Pirko <jiri@mellanox.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
As there is one set of counters for the whole action chain, forbid to
mix the HW stats types.
Signed-off-by: Jiri Pirko <jiri@mellanox.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Introduce flow_action_basic_hw_stats_types_check() helper and use it
in drivers. That sanitizes the drivers which do not have support
for action HW stats types.
Signed-off-by: Jiri Pirko <jiri@mellanox.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Instead of directly checking number of action entries, use
flow_offload_has_one_action() helper.
Signed-off-by: Jiri Pirko <jiri@mellanox.com>
Acked-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Initially, pass "ANY" (struct is zeroed) to the drivers as that is the
current implicit value coming down to flow_offload. Add a bool
indicating that entries have mixed HW stats type.
Signed-off-by: Jiri Pirko <jiri@mellanox.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Add a "adi,pwm-active-state" device-tree property to allow hardware
designs to use inverted logic on the PWM output.
Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
[groeck: dev_err -> dev_warn]
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Added support for reading DTS properties to set attenuators on
device probe for the ADT7473, ADT7475, ADT7476, and ADT7490.
Signed-off-by: Logan Shaw <logan.shaw@alliedtelesis.co.nz>
Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
[groeck: Continuation line formatting; dev_err -> dev_warn]
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Add binding information for the adi,pwm-active-state property.
Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Add binding for adi,adt7475 and variants.
Remove from trivial-devices.
Signed-off-by: Logan Shaw <logan.shaw@alliedtelesis.co.nz>
Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
The Texas Instruments LM73 is a digital temperature sensor with 2-wire
interface. Add LM73 as a trivial device.
Signed-off-by: Henry Shen <henry.shen@alliedtelesis.co.nz>
Acked-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20200212030615.28537-2-henry.shen@alliedtelesis.co.nz
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
TPS53647 and TPS53667 are single channel, Step-Down Buck Controllers.
TPS53647 supports 4 phases, TPS53667 supports 6 phases.
The chips do not support per-phase output telemetry.
Cc: Vadim Pasternak <vadimp@mellanox.com>
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
All chips of this series with published datasheets support IIN, PIN, and
STATUS_INPUT PMBus commands. Per TI Power Management Forum, "TPS53679 and
TPS53681 have the same PMBus command set". There is no reason to believe
that this does not apply to TPS53688. Let's assume that this is correct
and add support for IIN, PIN, and STATUS_INPUT to TPS53679 and TPS53688
to simplify adding support for more chips of the same series.
At the same time, drop reporting VIN on channel 2. On chips with published
datasheets this voltage is identical to the voltage reported on channel 1,
and there is no reason to believe that this is different for TPS53679 and
TPS53888.
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Chip specific support will be needed in the driver to be able to
support additional chips of the same series. Add support for it
to the driver.
To simplify adding support for more chips, call identification code
from the probe function. This lets us use a single structure for common
elements of struct pmbus_driver_info, thus reducing code size as support
for more chips is added.
Cc: Vadim Pasternak <vadimp@mellanox.com>
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Some PMBus chips support multiple phases, and report telemetry such
as input current, output current, or temperature for each phase.
Add support for such chips to the PMBus core.
Start with a maximum of 8 phases per page, and assume that supported
sensors per phase are similar for all pages. Only support per-phase
telemetry attributes, no limits or alarms.
As part of this patch, set the initial page variable to 0xff to ensure
that the page is updated when the first page command is issued. Also
only issue page commands if the chip supports more than one page.
Cc: Vadim Pasternak <vadimp@mellanox.com>
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
In preparation for multi-phase support, add 'phase' parameter to read_word
and set_page functions. Actual multi-phase support will be added in
a subsequent patch.
Cc: Vadim Pasternak <vadimp@mellanox.com>
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Recent PMBus versions added IC_DEVICE_ID and IC_DEVICE_REV commands as
additional means to identify the chip. Add command definitions to
pmbus.h include file.
Cc: Vadim Pasternak <vadimp@mellanox.com>
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
The current codebase makes use of the zero-length array language
extension to the C90 standard, but the preferred mechanism to declare
variable-length types such as these ones is a flexible array member[1][2],
introduced in C99:
struct foo {
int stuff;
struct boo array[];
};
By making use of the mechanism above, we will get a compiler warning
in case the flexible array does not occur last in the structure, which
will help us prevent some kind of undefined behavior bugs from being
inadvertenly introduced[3] to the codebase from now on.
This issue was found with the help of Coccinelle.
[1] https://gcc.gnu.org/onlinedocs/gcc/Zero-Length.html
[2] https://github.com/KSPP/linux/issues/21
[3] commit 7649773293 ("cxgb3/l2t: Fix undefined behaviour")
Signed-off-by: Gustavo A. R. Silva <gustavo@embeddedor.com>
Link: https://lore.kernel.org/r/20200211234237.GA26971@embeddedor
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Use a bit map to describe if temperature channels are supported,
and use it for all temperature channels. Use a separate flag,
independent of Tdie support, to indicate if the system is running
on a Ryzen CPU.
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Traditionally, the temperature displayed by k10temp was Tctl.
On Family 17h CPUs, Tdie was displayed instead. To reduce confusion,
Tctl was added later as second temperature. This resulted in Tdie
being reported as temp1_input, and Tctl as temp2_input. This is
different to non-Ryzen CPUs, where Tctl is displayed as temp1_input.
Swap temp1_input and temp2_input on Family 17h CPUs, such that Tctl
is now reported as temp1_input and Tdie is reported as temp2_input,
to align with other CPUs, streamline the code, and make it less
confusing. Coincidentally, this also aligns the code with its
documentation, which states that Tdie is reported as temp2_input.
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
Document the AXI FAN Control IP core devicetree bindings.
Signed-off-by: Nuno Sá <nuno.sa@analog.com>
Reviewed-by: Rob Herring <robh@kernel.org>
Link: https://lore.kernel.org/r/20191009102806.262241-2-nuno.sa@analog.com
[groeck: adi,pulses-per-revolution -> pulses-per-revolution]
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
The purpose of this IP Core is to control the fan used for the cooling of a
Xilinx Zynq Ultrascale+ MPSoC without the need of any external temperature
sensors. To achieve this, the IP core uses the PL SYSMONE4 primitive to
obtain the PL temperature and, based on those readings, it then outputs
a PWM signal to control the fan rotation accordingly.
Signed-off-by: Nuno Sá <nuno.sa@analog.com>
Link: https://lore.kernel.org/r/20191009102806.262241-1-nuno.sa@analog.com
[groeck: adi,pulses-per-revolution -> pulses-per-revolution;
dropped unused 'res' from probe function]
Signed-off-by: Guenter Roeck <linux@roeck-us.net>
After more careful studying, Paul informs me that we cannot rely on
ordering of RCU callbacks in the way that the the tagged commit did.
The current construct looks like this:
void C(struct rcu_head *rhp)
{
do_something(rhp);
call_rcu(&p->rh, B);
}
call_rcu(&p->rh, A);
call_rcu(&p->rh, C);
and we're relying on ordering between A and B, which isn't guaranteed.
Make this explicit instead, and have a work item issue the rcu_barrier()
to ensure that A has run before we manually execute B.
While thorough testing never showed this issue, it's dependent on the
per-cpu load in terms of RCU callbacks. The updated method simplifies
the code as well, and eliminates the need to maintain an rcu_head in
the fileset data.
Fixes: c1e2148f8e ("io_uring: free fixed_file_data after RCU grace period")
Reported-by: Paul E. McKenney <paulmck@kernel.org>
Signed-off-by: Jens Axboe <axboe@kernel.dk>
We've been accruing these for a couple of weeks, so the batch is a bit
bigger than usual.
Largest delta is due to a led-bl driver that is added -- there was
a miscommunication before the merge window and the driver didn't make it
in. Due to this, the platforms needing it regressed. At this point, it
seemed easier to add the new driver than unwind the changes.
Besides that, there are a handful of various fixes:
- AMD tee memory leak fix
- A handful of fixlets for i.MX SCU communication
- A few maintainers woke up and realized DEBUG_FS had been missing for
a while, so a few updates of that.
... and the usual collection of smaller fixes to various platforms.
-----BEGIN PGP SIGNATURE-----
iQJDBAABCAAtFiEElf+HevZ4QCAJmMQ+jBrnPN6EHHcFAl5lhi0PHG9sb2ZAbGl4
b20ubmV0AAoJEIwa5zzehBx3C6gQAJHXpED85K94DH2jycwMFkWdGh+DnR1ATDaK
+zK04ZanoQrtGi0mK0KY8DMaYCGCKvAgvBbRYdNXPK1S2DQfpZceSTiAN7fh6NJ2
F2XOGocH+IWrYmB+OA/rG6Sv2PFHibH34zf7TQ5w29jxCgv6zUTGF5qOoAnrhQzF
SJNO08Ew0TjZ8mYXIoDHLsHaThT3rLF5f9yNMO0eG6gHrFKZHFfqhsDLqG6nSk+z
L1M+WsfbxM0ijZDlIdJmxQLi4AlYkj3l8te4ikM6lngVSvQyYyEpnS2vw6h0OrZ9
y6PYw+gAzDOZgFSHqwwH/Ha2Or6eqS4eAv5JvIEqGhGslzNvmWc8FzElIG4qJKbu
sshrcmTSe0Dt7W0zR8dsCY6tA2Ze1hpxbOpuhoh4H+dngANKAAMlko5s4Vw76ZYy
B5mryFkyzyLI2QcZK/QmVQq2KSoeBOUg2SUtOrbBb5xQhhKCwhJBmJ0lw8H5O4dA
TRNXL3p1ydve0z3DIKYCzM++MX1EJEa9O4uMTxKDPB6P9XrKvkx0rwC7wepc00jf
/aXdVQsaQvnOYVs1R5oGISWLrheSJ28tHi3dI+xAdkdA26WWzPfomK9R7ok1/91T
uuTpfmK6uhMvPkfg85/7n3/sojS6K9c0cP5wdd8Y0d2avvgQHCISgNZOZf3vlaYH
xEcSJ4Vd
=gCNz
-----END PGP SIGNATURE-----
Merge tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc
Pull ARM SoC fixes from Olof Johansson:
"We've been accruing these for a couple of weeks, so the batch is a bit
bigger than usual.
Largest delta is due to a led-bl driver that is added -- there was a
miscommunication before the merge window and the driver didn't make it
in. Due to this, the platforms needing it regressed. At this point, it
seemed easier to add the new driver than unwind the changes.
Besides that, there are a handful of various fixes:
- AMD tee memory leak fix
- A handful of fixlets for i.MX SCU communication
- A few maintainers woke up and realized DEBUG_FS had been missing
for a while, so a few updates of that.
... and the usual collection of smaller fixes to various platforms"
* tag 'armsoc-fixes' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (37 commits)
ARM: socfpga_defconfig: Add back DEBUG_FS
arm64: dts: socfpga: agilex: Fix gmac compatible
ARM: bcm2835_defconfig: Explicitly restore CONFIG_DEBUG_FS
arm64: dts: meson: fix gxm-khadas-vim2 wifi
arm64: dts: meson-sm1-sei610: add missing interrupt-names
ARM: meson: Drop unneeded select of COMMON_CLK
ARM: dts: bcm2711: Add pcie0 alias
ARM: dts: bcm283x: Add missing properties to the PWR LED
tee: amdtee: fix memory leak in amdtee_open_session()
ARM: OMAP2+: Fix compile if CONFIG_HAVE_ARM_SMCCC is not set
arm: dts: dra76x: Fix mmc3 max-frequency
ARM: dts: dra7: Add "dma-ranges" property to PCIe RC DT nodes
bus: ti-sysc: Fix 1-wire reset quirk
ARM: dts: r8a7779: Remove deprecated "renesas, rcar-sata" compatible value
soc: imx-scu: Align imx sc msg structs to 4
firmware: imx: Align imx_sc_msg_req_cpu_start to 4
firmware: imx: scu-pd: Align imx sc msg structs to 4
firmware: imx: misc: Align imx sc msg structs to 4
firmware: imx: scu: Ensure sequential TX
ARM: dts: imx7-colibri: Fix frequency for sd/mmc
...
-----BEGIN PGP SIGNATURE-----
iQIzBAABCgAdFiEEzv7L6UO9uDPlPSfHEsHwGGHeVUoFAl5lHUYACgkQEsHwGGHe
VUpoFg/+LXwnQNh9WRx9fgY3DzYdfzpVwyVPxWjN5MGB87aOW0O8s6z0aVtTZyQL
VZnG1IUmasFdObYb66zfxdQyveUSRwR9oEGlIOjlyEojAUtXG+slljR5XcHyY3tH
XzKFuUhHiy8+U3qw5Rnq+9mh1fa8Wl+Yjak8OysyyMHYCXuG/A0eJsU28Ifn8FnP
Eanbx/MctaY2qMHYLqkvv8r8VzkqyMToIwDuHgDkhgPnHV1H3NKS2Mq9I6qBLo7G
X2QQO9M/jNAnoShKNsmW5oI6p4WK9odyb7cJ/01jRFsMWJRoneiNN1yiQE569e9c
C3QO+g7WNia1oZ+4mbED0awDK9ToM/U183N8FirrSD2paIJMtmTQ0HpUa+n1iS2H
/sdcdFgz9AUylSn/mLxCScikGWWL7kQ9YCaGa95ZS3FGapLrg/Z977Cz94kXPTvx
JX9fT3wIRgVN44qcWFGx80z1+2jadmoaJxii2ayvnZ7QzR/879FXstjVDnQJoiQA
Q92qi5w6PKV+XEOXUY9C//6F0gfYsFNaha1IW30S5s/OTGJ5PBjX7bd9ofYjLGbA
HewpLfYxeW5sndfglMtJrfDJyfrIidOCzzysrp5lEjub65FC3izcyk6ACF9VazHn
1B5UC2YPs4bpHOXdGNqpwCAhroSlmUKyW1ZFL6pLja5TXqfk+4Y=
=GHur
-----END PGP SIGNATURE-----
Merge tag 'edac_urgent-2020-03-08' of git://git.kernel.org/pub/scm/linux/kernel/git/ras/ras
Pull EDAC fix from Borislav Petkov:
"Error reporting fix for synopsys_edac: do not overwrite partial
decoded error message (Sherry Sun)"
* tag 'edac_urgent-2020-03-08' of git://git.kernel.org/pub/scm/linux/kernel/git/ras/ras:
EDAC/synopsys: Do not print an error with back-to-back snprintf() calls
Handle NRST asynchronously for SAM9X60 to avoid problem with fast drop of
VDDCORE on shutdown operations in the first 100 us after CPU is shutdown.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
After refactoring struct at91_reset_data and
struct at91_reset_data at91sam9260_reset_data are not needed anymore.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Keep only one reset function. With this, notifier_call member of
struct at91_reset_data could be removed.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Introduce ramc_lpr to struct at91_reset. This will lead to the
unification of at91sam9260_restart() and at91sam9g45_restart().
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Use r4 as temporary register. On ARM r0-r3 should be used to hold
function arguments.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Introduce args member in struct at91_reset_data. It stores the value
that needs to be written in mode register so that the reboot actions
to happen. With these changes samx7_restart() could be removed.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Introduce struct at91_reset_data to be able to provide per SoC
data. At the moment this being only notifier callback.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Allocate at91_reset data on probe and set it as platform data.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Add new argument to at91_reset_status() that is the pointer to reset
controller base address.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Convert reset in pointer to struct at91_reset.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Introduce struct at91_reset intended to keep all the at91 reset controller
data.
Signed-off-by: Claudiu Beznea <claudiu.beznea@microchip.com>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
