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708,694 commits

Author SHA1 Message Date
Lars-Peter Clausen
b64836a571 spi: altera: Consolidate TX/RX data register access
The patterns for accessing the TX/RX data registers is the same for the IRQ
and non-IRQ paths. Consolidate the duplicated code into shared helper
functions.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Mark Brown <broonie@kernel.org>
2017-08-16 11:53:31 +01:00
Lars-Peter Clausen
e19b63cd3c spi: altera: Switch to SPI core transfer queue management
The Altera SPI driver currently uses the spi-bitbang infrastructure for
transfer queue management, but non of the bitbang functionality itself.
This is because when the driver was written this was the only way to not
have to do queue management in the driver itself.

Nowadays transfer queue management is available from the SPI driver core
itself and using the bitbang infrastructure just adds an additional level
of indirection.

Switch the driver over to using the core queue management directly.

Signed-off-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Mark Brown <broonie@kernel.org>
2017-08-16 11:53:27 +01:00
Vikas Shivappa
24247aeeab x86/intel_rdt/cqm: Improve limbo list processing
During a mkdir, the entire limbo list is synchronously checked on each
package for free RMIDs by sending IPIs. With a large number of RMIDs (SKL
has 192) this creates a intolerable amount of work in IPIs.

Replace the IPI based checking of the limbo list with asynchronous worker
threads on each package which periodically scan the limbo list and move the
RMIDs that have:

	llc_occupancy < threshold_occupancy

on all packages to the free list.

mkdir now returns -ENOSPC if the free list and the limbo list ere empty or
returns -EBUSY if there are RMIDs on the limbo list and the free list is
empty.

Getting rid of the IPIs also simplifies the data structures and the
serialization required for handling the lists.

[ tglx: Rewrote changelog ... ]

Signed-off-by: Vikas Shivappa <vikas.shivappa@linux.intel.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: ravi.v.shankar@intel.com
Cc: tony.luck@intel.com
Cc: fenghua.yu@intel.com
Cc: peterz@infradead.org
Cc: eranian@google.com
Cc: vikas.shivappa@intel.com
Cc: ak@linux.intel.com
Cc: davidcc@google.com
Link: http://lkml.kernel.org/r/1502845243-20454-3-git-send-email-vikas.shivappa@linux.intel.com
2017-08-16 12:05:41 +02:00
Vikas Shivappa
bbc4615e0b x86/intel_rdt/mbm: Fix MBM overflow handler during CPU hotplug
When a CPU is dying, the overflow worker is canceled and rescheduled on a
different CPU in the same domain. But if the timer is already about to
expire this essentially doubles the interval which might result in a non
detected overflow.

Cancel the overflow worker and reschedule it immediately on a different CPU
in same domain. The work could be flushed as well, but that would
reschedule it on the same CPU.

[ tglx: Rewrote changelog once again ]

Reported-by: Thomas Gleixner <tglx@linutronix.de>
Signed-off-by: Vikas Shivappa <vikas.shivappa@linux.intel.com>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Cc: ravi.v.shankar@intel.com
Cc: tony.luck@intel.com
Cc: fenghua.yu@intel.com
Cc: peterz@infradead.org
Cc: eranian@google.com
Cc: vikas.shivappa@intel.com
Cc: ak@linux.intel.com
Cc: davidcc@google.com
Link: http://lkml.kernel.org/r/1502845243-20454-2-git-send-email-vikas.shivappa@linux.intel.com
2017-08-16 12:05:41 +02:00
Laurent Pinchart
863f9cde26 drm: omapdrm: hdmi: Don't allocate PHY features dynamically
There's no need to allocate memory dynamically to duplicate the contents
of a const structure, only to store the memory pointer in a const
pointer field. Just use the original structures directly.

Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
2017-08-16 12:52:42 +03:00
Laurent Pinchart
37ea27b97b drm: omapdrm: hdmi: Configure the PHY from the HDMI core version
The OMAP4 and OMAP5 HDMI PHYs have different properties that require
specific handling in the HDMI PHY driver. This needs knowledge of the
PHY version, which is currently inferred from the DSS version. As part
of the effort to remove usage of the DSS version, use the HDMI
controller version instead.

Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
2017-08-16 12:52:42 +03:00
Laurent Pinchart
ba63b6352c drm: omapdrm: hdmi: Configure the PLL from the HDMI core version
The OMAP4 and OMAP5 PLLs have different properties that require specific
handling in the HDMI PLL driver. This needs knowledge of the PLL
version, which is currently inferred from the DSS version. AS part of
the effort to remove usage of the DSS version, use the HDMI controller
version instead.

Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
2017-08-16 12:52:41 +03:00
Laurent Pinchart
d20fa5a06d drm: omapdrm: hdmi: Pass HDMI core version as integer to HDMI audio
The HDMI audio driver only needs to know which generation of HDMI
transmitter it deals with, not the detailed SoC model. Pass the version
number as an integer to prepare for removal of the OMAP SoC version from
the omapdrm driver.

Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Acked-by: Mark Brown <broonie@kernel.org>
Acked-by: Bartlomiej Zolnierkiewicz <b.zolnierkie@samsung.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
2017-08-16 12:52:41 +03:00
Laurent Pinchart
fe16bc5132 drm: omapdrm: hdmi: Replace OMAP SoC model check with HDMI xmit version
The HDMI wrapper code only needs to differentiate between major OMAP
revisions, which can be obtained from the HDMI transmitter compatible
string. Replace the OMAP SoC model checks to prepare for removal of the
OMAP SoC version platform data.

Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
2017-08-16 12:52:41 +03:00
Laurent Pinchart
1fdf9041cd drm: omapdrm: hdmi: Rename functions and structures to use hdmi_ prefix
The dsi_pll_ops structure and dsi_init_pll_data() function incorrectly
use a dsi_ prefix, likely due to copy & paste. Fix it by using the
correct hdmi_ prefix.

Signed-off-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
2017-08-16 12:52:40 +03:00
Tomi Valkeinen
eeb45f85cd drm/omap: add OMAP5 DSIPHY lane-enable support
We are missing OMAP5 DSIPHY lane-enable support, which has prevented
OMAP5 DSI working in mainline. This patch adds the lane-enable similarly
to the recently added OMAP4 version.

Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
2017-08-16 12:52:40 +03:00
Tomi Valkeinen
5cdc8dbbda drm/omap: use regmap_update_bit() when muxing DSI pads
Use regmap_update_bits instead of regmap_read/write, which simplifies
the code.

Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Reviewed-by: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
2017-08-16 12:52:39 +03:00
Sukumar Ghorai
a0085f2510 Bluetooth: btusb: driver to enable the usb-wakeup feature
BT-Controller connected as platform non-root-hub device and
usb-driver initialize such device with wakeup disabled,
Ref. usb_new_device().

At present wakeup-capability get enabled by hid-input device from usb
function driver(e.g. BT HID device) at runtime. Again some functional
driver does not set usb-wakeup capability(e.g LE HID device implement
as HID-over-GATT), and can't wakeup the host on USB.

Most of the device operation (such as mass storage) initiated from host
(except HID) and USB wakeup aligned with host resume procedure. For BT
device, usb-wakeup capability need to enable form btusc driver as a
generic solution for multiple profile use case and required for USB remote
wakeup (in-bus wakeup) while host is suspended. Also usb-wakeup feature
need to enable/disable with HCI interface up and down.

Signed-off-by: Sukumar Ghorai <sukumar.ghorai@intel.com>
Signed-off-by: Amit K Bag <amit.k.bag@intel.com>
Acked-by: Oliver Neukum <oneukum@suse.com>
Signed-off-by: Marcel Holtmann <marcel@holtmann.org>
2017-08-16 11:48:46 +02:00
Yunzhi Li
d2057bbb79 ARM: hisi: Fix typo in comment
The machine code "0xe51ff004" means "ldr pc, [pc, #-4]".
This patch fixed the comment typo to avoid any confusion.

Signed-off-by: Yunzhi Li <yunzhi.li@deephi.tech>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2017-08-16 10:40:46 +01:00
Benjamin Herrenschmidt
5a69aec945 powerpc: Fix VSX enabling/flushing to also test MSR_FP and MSR_VEC
VSX uses a combination of the old vector registers, the old FP
registers and new "second halves" of the FP registers.

Thus when we need to see the VSX state in the thread struct
(flush_vsx_to_thread()) or when we'll use the VSX in the kernel
(enable_kernel_vsx()) we need to ensure they are all flushed into
the thread struct if either of them is individually enabled.

Unfortunately we only tested if the whole VSX was enabled, not if they
were individually enabled.

Fixes: 72cd7b44bc ("powerpc: Uncomment and make enable_kernel_vsx() routine available")
Cc: stable@vger.kernel.org # v4.3+
Signed-off-by: Benjamin Herrenschmidt <benh@kernel.crashing.org>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2017-08-16 19:35:54 +10:00
Leo Yan
487f00d4b9 arm64: dts: hi3660: enable watchdog
This patch is to add watchdog binding for Hi3660 on Hikey960 board.

Cc: Guodong Xu <guodong.xu@linaro.org>
Cc: Zhong Kaihua <zhongkaihua@huawei.com>
Signed-off-by: Leo Yan <leo.yan@linaro.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2017-08-16 09:32:12 +01:00
Wang Ruyi
0b507e91de arm64: dts: hi3660: add bindings for DMA
Add bindings for DMA.

Signed-off-by: Wang Ruyi <wangruyi@huawei.com>
Signed-off-by: Guodong Xu <guodong.xu@linaro.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2017-08-16 09:32:11 +01:00
Guodong Xu
bf1ff5328a arm64: dts: hikey960: change bluetooth uart max-speed to 3mbps
Update bluetooth UART max-speed to 3Mbps

Signed-off-by: Guodong Xu <guodong.xu@linaro.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2017-08-16 09:32:11 +01:00
Guodong Xu
996707d765 arm64: dts: hi3660: Reset the mmc hosts
Add reset-names = "reset" into mmc nodes.

Signed-off-by: Guodong Xu <guodong.xu@linaro.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2017-08-16 09:32:10 +01:00
Guodong Xu
9c24dc9d00 arm64: dts: hikey960: Add pstore support
This patch reserves some memory in the DTS and sets up a
pstore device tree node to enable pstore support on HiKey960.

Cc: John Stultz <john.stultz@linaro.org>
Signed-off-by: Guodong Xu <guodong.xu@linaro.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2017-08-16 09:32:09 +01:00
Guodong Xu
b6b681c144 arm64: dts: hikey960: Add support for syscon-reboot-mode
Add support to hikey960 dts for the syscon-reboot-mode driver.

Cc: John Stultz <john.stultz@linaro.org>
Signed-off-by: Guodong Xu <guodong.xu@linaro.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2017-08-16 09:32:09 +01:00
Victor Chong
313aebda84 arm64: dts: hikey960: Add optee node
This patch adds op-tee node for hikey960

Signed-off-by: Victor Chong <victor.chong@linaro.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2017-08-16 09:32:08 +01:00
YiPing Xu
f8054fb8a7 arm64: dts: hi3660: add pmu dt node for hi3660
Add pmu dt node for hi3660

Signed-off-by: YiPing Xu <xuyiping@hisilicon.com>
Signed-off-by: Zhong Kaihua <zhongkaihua@huawei.com>
Signed-off-by: Leo Yan <leo.yan@linaro.org>
Tested-by: Jumana Mundichipparakkal <jumana.mp@arm.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2017-08-16 09:32:07 +01:00
Leo Yan
a6d083441c arm64: dts: hi3660: add L2 cache topology
This patch adds the L2 cache topology on 96boards Hikey960.

Signed-off-by: Leo Yan <leo.yan@linaro.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2017-08-16 09:32:06 +01:00
Leo Yan
30fec8268c arm64: dts: hi3660: enable idle states
There are two clusters on the Hi3660, the first one is Cortex-A53 based
and the other one is Cortex-A73 based. These two clusters have different
idle states.

Thanks to Daniel Lezcano's recent changes, the generic ARM cpuidle
driver can now support several clusters with different idle states, thus
supporting the big.Little architecture.

In addition to the WFI idle state which is the default shallowest state
for all ARM cpus, the Hi3660 supports the following states:

 - CA53 CPUs:
        - CPU_SLEEP:       CPU power off state
        - CLUSTER_SLEEP_0: Cluster power off state

 - CA73 CPUs:
        - CPU_NAP:         CPU retention state
        - CPU_SLEEP:       CPU power off state
        - CLUSTER_SLEEP_1: Cluster power off state

This patch adds the idle states description for the Hi3660 to the device
tree.

Cc: Kevin Wang <jean.wangtao@linaro.org>
Signed-off-by: Leo Yan <leo.yan@linaro.org>
Acked-by: Daniel Lezcano <daniel.lezcano@linaro.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2017-08-16 09:32:06 +01:00
Shawn Guo
341b26b719 arm64: dts: hi6220: improve g-tx-fifo-size setting for usb device
The current usb device g-tx-fifo-size setting in DT causes two problems
for kernel driver.

1. On hi6220, there are 15 tx_fifo dedicated for all EPs except EP0,
   while DT only provides tx_fifo settings for 6 EPs.  It results in the
   following annoying complaints from kernel.

[    4.451623] dwc2 f72c0000.usb: dwc2_check_param_tx_fifo_sizes: Invalid parameter g_tx_fifo_size[7]=0
[    4.461303] dwc2 f72c0000.usb: dwc2_check_param_tx_fifo_sizes: Invalid parameter g_tx_fifo_size[8]=0
[    4.470969] dwc2 f72c0000.usb: dwc2_check_param_tx_fifo_sizes: Invalid parameter g_tx_fifo_size[9]=0
[    4.480632] dwc2 f72c0000.usb: dwc2_check_param_tx_fifo_sizes: Invalid parameter g_tx_fifo_size[10]=0
[    4.490385] dwc2 f72c0000.usb: dwc2_check_param_tx_fifo_sizes: Invalid parameter g_tx_fifo_size[11]=0
[    4.500140] dwc2 f72c0000.usb: dwc2_check_param_tx_fifo_sizes: Invalid parameter g_tx_fifo_size[12]=0
[    4.509892] dwc2 f72c0000.usb: dwc2_check_param_tx_fifo_sizes: Invalid parameter g_tx_fifo_size[13]=0
[    4.519646] dwc2 f72c0000.usb: dwc2_check_param_tx_fifo_sizes: Invalid parameter g_tx_fifo_size[14]=0
[    4.529399] dwc2 f72c0000.usb: dwc2_check_param_tx_fifo_sizes: Invalid parameter g_tx_fifo_size[15]=0
[    4.539244] dwc2 f72c0000.usb: EPs: 16, dedicated fifos, 1920 entries in SPRAM

   Besides of that, the total 1920 fifo entries isn't fully utilized.
   Endpoint Info Control block consumes 128 entries, g-rx-fifo-size
   is 512, and g-np-tx-fifo-size is 128.  So the fifi entries available
   for tx_fifo is: 1920 - 128 - 512 - 128 = 1152.  Considering that
   the minimal valid tx_fifo size for each EP is 16, it should be
   reasonable to allocate 1152 entries as: 128 x 8 + 16 x 7 = 1136 (only
   16 entries unused).  With this new setting, we can get more EPs to
   use while removing the above warning messages in the meantime.

2. Another consequence of above invalid g_tx_fifo_size parameter is that
   kernel driver will use values read from hardware register as the
   fall-back.  The value is 2048 for each EP fifo.  That's obviously
   invalid either, because even fifo entries for one EP exceeds the
   total entries 1920.  That's why we see the following fat warning from
   function dwc2_hsotg_init_fifo().  The new g-tx-fifo-size settings
   help to remove the warning as well.

[   65.431634] dwc2 f72c0000.usb: Do port resume before switching to device mode
[   65.624176] insufficient fifo memory
[   65.624369] ------------[ cut here ]------------
[   65.633633] WARNING: CPU: 0 PID: 5 at drivers/usb/dwc2/gadget.c:330 dwc2_hsotg_init_fifo+0x164/0x1ac
[   65.643808] CPU: 0 PID: 5 Comm: kworker/u16:0 Not tainted 4.13.0-rc1-00022-g50861cf9dc1b-dirty #81
[   65.653769] Hardware name: HiKey Development Board (DT)
[   65.659624] Workqueue: dwc2 dwc2_conn_id_status_change
[   65.665377] task: ffffffc005f73400 task.stack: ffffffc005f98000
[   65.671987] PC is at dwc2_hsotg_init_fifo+0x164/0x1ac
[   65.677633] LR is at dwc2_hsotg_init_fifo+0x164/0x1ac
[   65.683275] pc : [<ffffff8008638044>] lr : [<ffffff8008638044>] pstate: 600001c5
[   65.691504] sp : ffffffc005f9bce0
[   65.695218] x29: ffffffc005f9bce0 x28: ffffffc005f6ac00
[   65.701172] x27: ffffffc005f73400 x26: 0000000008000580
[   65.707124] x25: ffffff8008bb4af0 x24: ffffff8008d02b70
[   65.713074] x23: 0000003fcc831084 x22: ffffffc0337cf0bc
[   65.719024] x21: 0000000000000580 x20: ffffffc0337cf018
[   65.724976] x19: ffffffc0337cf098 x18: 0000000000000000
[   65.730926] x17: 0000000000000000 x16: 0000000000000000
[   65.736873] x15: 0000000000000000 x14: ffffff8008ca8900
[   65.742825] x13: 0000004035299000 x12: 0000000034d5d91d
[   65.748775] x11: 0000000000000000 x10: 00000000000008d0
[   65.754726] x9 : ffffffc005f9bce0 x8 : 00000000000001b5
[   65.760674] x7 : 66696620746e6569 x6 : ffffff8008d60050
[   65.766623] x5 : 0000000000000000 x4 : 0000000000000000
[   65.772573] x3 : 0000000000000002 x2 : 0000000000000002
[   65.778521] x1 : 0000000000000001 x0 : 0000000000000018
[   65.784469] Call trace:
[   65.787236] Exception stack(0xffffffc005f9bb10 to 0xffffffc005f9bc40)
[   65.794420] bb00:                                   ffffffc0337cf098 0000008000000000
[   65.803145] bb20: ffffffc005f9bce0 ffffff8008638044 ffffff8008bb4af0 0000000008000580
[   65.811870] bb40: ffffffc005f73400 ffffffc005f6ac00 0000000000000000 ffffff8008da2998
[   65.820595] bb60: ffffffc005f9bce0 ffffffc005f9bce0 ffffffc005f9bca0 00000000ffffffc8
[   65.829315] bb80: ffffffc005f9bbb0 ffffff80081046a0 ffffffc005f9bce0 ffffffc005f9bce0
[   65.838038] bba0: ffffffc005f9bca0 00000000ffffffc8 0000000000000018 0000000000000001
[   65.846761] bbc0: 0000000000000002 0000000000000002 0000000000000000 0000000000000000
[   65.855485] bbe0: ffffff8008d60050 66696620746e6569 00000000000001b5 ffffffc005f9bce0
[   65.864207] bc00: 00000000000008d0 0000000000000000 0000000034d5d91d 0000004035299000
[   65.872928] bc20: ffffff8008ca8900 0000000000000000 0000000000000000 0000000000000000
[   65.900856] [<ffffff8008638044>] dwc2_hsotg_init_fifo+0x164/0x1ac
[   65.927195] [<ffffff800863b390>] dwc2_hsotg_core_init_disconnected+0x80/0x3c0
[   65.954736] [<ffffff800862fef0>] dwc2_conn_id_status_change+0xfc/0x21c
[   65.981561] [<ffffff80080d1ca8>] process_one_work+0x124/0x294
[   66.007419] [<ffffff80080d1e70>] worker_thread+0x58/0x3c8
[   66.023243] [<ffffff80080d79a0>] kthread+0x100/0x12c
[   66.032455] [<ffffff8008082ec0>] ret_from_fork+0x10/0x50
[   66.041987] ---[ end trace 7079dcaa2d9e46fa ]---

Signed-off-by: Shawn Guo <shawn.guo@linaro.org>
Tested-by: John Stultz <john.stultz@linaro.org>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2017-08-16 09:32:05 +01:00
Zhangfei Gao
94d2d94b40 arm64: dts: hi6220: add acpu_sctrl
Add acpu_sctrl clock node

Signed-off-by: Zhangfei Gao <zhangfei.gao@linaro.org>
Signed-off-by: Li Pengcheng <lipengcheng8@huawei.com>
Signed-off-by: Wei Xu <xuwei5@hisilicon.com>
2017-08-16 09:31:01 +01:00
Yoshihiro Shimoda
933ddbe5f5 pinctrl: sh-pfc: r8a7795: Add USB 2.0 pins, groups and functions
Add pins, groups, and functions for USB 2.0 on R-Car H3 ES2.0.

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-08-16 10:21:12 +02:00
Yoshihiro Shimoda
f9d130808c pinctrl: sh-pfc: r8a7795: Change USB3_{OVC,PWEN} definitions
Since the latest datasheet revises the names, this patch changes
the definitions from USB3_{OVC,PWEN} to USB2_CH3_{OVC,PWEN}.

Signed-off-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
2017-08-16 10:18:00 +02:00
James Smart
16a5a480f0 nvmet-fc: correct use after free on list teardown
Use list_for_each_entry_safe to prevent list handling from referencing
next pointers directly after list_del's

Signed-off-by: James Smart <james.smart@broadcom.com>
Signed-off-by: Christoph Hellwig <hch@lst.de>
2017-08-16 10:06:18 +02:00
Martin Wilck
42819eb7a0 nvmet: don't overwrite identify sn/fr with 0-bytes
The merged version of my patch "nvmet: don't report 0-bytes in serial
number" fails to remove two lines which should have been replaced,
so that the space-padded strings are overwritten again with 0-bytes.
Fix it.

Fixes: 42de82a8b5 nvmet: don't report 0-bytes in serial number
Signed-off-by: Martin Wilck <mwilck@suse.com>
Reviewed-by: Sagi Grimberg <sagi@grimbeg.me>
Signed-off-by: Christoph Hellwig <hch@lst.de>
2017-08-16 10:06:10 +02:00
Geert Uytterhoeven
d71e851d82 clk: renesas: cpg-mssr: Add R8A77995 support
Add R-Car D3 (R8A77995) Clock Pulse Generator / Module Standby and
Software Reset support, using the CPG/MSSR driver core and the common
R-Car Gen3 CPG code.

Based on the R-Car Series, 3rd Generation Hardware User's Manual, Rev.
0.55, Jun. 30, 2017.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
Acked-by: Rob Herring <robh@kernel.org>
2017-08-16 09:51:48 +02:00
Geert Uytterhoeven
696997e004 clk: renesas: rcar-gen3: Add support for SCCG/Clean peripheral clocks
On R-Car Gen3 SoCs with a Spread Spectrum Clock Generator (e.g. R-Car
D3), a peripheral clock divider has been added, to select between clean
and spread spectrum parents.

Add a new clock type to the R-Car Gen3 driver core to handle this.
To avoid increasing the size of struct cpg_core_clk, both parents and
dividers are stored in the existing parent resp. div fields.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
2017-08-16 09:51:47 +02:00
Geert Uytterhoeven
09a7dea9d5 clk: renesas: rcar-gen3: Add divider support for PLL1 and PLL3
On some R-Car Gen3 SoCs (e.g. R-Car D3), PLL1 and PLL3 use a divider
value different from one.  Extend struct rcar_gen3_cpg_pll_config to handle
this.  As all multipliers and dividers are small, table size increase
can be kept limited by storing them in u8s instead of unsigned ints,
which saves ca. 0.5 KiB for a generic kernel.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
2017-08-16 09:51:47 +02:00
Geert Uytterhoeven
714c53aa2e clk: renesas: Add r8a77995 CPG Core Clock Definitions
Add all R-Car D3 Clock Pulse Generator Core Clock Outputs, as listed
in Table 8.2f ("List of Clocks [R-Car D3]") of the R-Car Series, 3rd
Generation Hardware User's Manual (Rev. 0.55, Jun. 30, 2017).

Note that internal CPG clocks (S0, S1, S2, S3, S1C, S3C, SDSRC, and
SSPSRC) are not included, as they are used as internal clock sources
only, and never referenced from DT.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Acked-by: Stephen Boyd <sboyd@codeaurora.org>
2017-08-16 09:51:46 +02:00
Thomas Bogendoerfer
4098116039 parisc: pci memory bar assignment fails with 64bit kernels on dino/cujo
For 64bit kernels the lmmio_space_offset of the host bridge window
isn't set correctly on systems with dino/cujo PCI host bridges.
This leads to not assigned memory bars and failing drivers, which
need to use these bars.

Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
Cc: <stable@vger.kernel.org>
Acked-by: Helge Deller <deller@gmx.de>
Signed-off-by: Helge Deller <deller@gmx.de>
2017-08-16 09:50:39 +02:00
Aneesh Kumar K.V
4ae279c2c9 powerpc/mm/hugetlb: Allow runtime allocation of 16G.
Now that we have GIGANTIC_PAGE enabled on powerpc, use this for 16G hugepages
with hash translation mode. Depending on the total system memory we have, we may
be able to allocate 16G hugepages runtime. This also remove the hugetlb setup
difference between hash/radix translation mode.

Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2017-08-16 14:56:13 +10:00
Aneesh Kumar K.V
79cc38ded1 powerpc/mm/hugetlb: Add support for reserving gigantic huge pages via kernel command line
With commit aa888a7497 ("hugetlb: support larger than MAX_ORDER") we added
support for allocating gigantic hugepages via kernel command line. Switch
ppc64 arch specific code to use that.

W.r.t FSL support, we now limit our allocation range using BOOTMEM_ALLOC_ACCESSIBLE.

We use the kernel command line to do reservation of hugetlb pages on powernv
platforms. On pseries hash mmu mode the supported gigantic huge page size is
16GB and that can only be allocated with hypervisor assist. For pseries the
command line option doesn't do the allocation. Instead pseries does gigantic
hugepage allocation based on hypervisor hint that is specified via
"ibm,expected#pages" property of the memory node.

Cc: Scott Wood <oss@buserror.net>
Cc: Christophe Leroy <christophe.leroy@c-s.fr>
Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
2017-08-16 14:56:12 +10:00
David S. Miller
cc324d1a3e Merge branch 'sparc64-16gb-hugepages'
Nitin Gupta says:

====================
sparc64: Add 16GB hugepage support

SPARC architecture supports 16G hugepages but the kernel did not
support these. This patch series adds support for it and also cleanes
up some page walk/alloc functions.

Patch 1/3: Core changes needed to add 16G hugepage support: To map a
  single 16G hugepage, two PUD entries are used. Each PUD entry maps
  8G portion of a 16G page. This page table encoding scheme is same as
  that used for hugepages at PMD level (8M, 256M and 2G pages) where
  each PMD entry points successively to 8M regions within a page.  No
  page table entries below the PUD level are allocated for 16G
  hugepage since those are not required.

  TSB entries for a 16G page are created at every 4M boundary since
  the HUGE_TSB is used for these pages which is configured with page
  size of 4M.  When walking page tables (on a TSB miss), bits [32:22]
  are transferred from vaddr to PUD to resolve addresses at 4M
  boundary. The resolved address mapping is then stored in HUGE_TSB.

Patch 2/3: get_user_pages() etc. are used for direct IO. These
  functions were not aware of hugepages at the PUD level and would try
  to continue walking page tables beyond the PUD level. Since 16G
  hugepages have page tables allocated till PUD level only, these
  accesses would result in invalid access. This patch adds the case
  for PUD huge pages to these functions.

Patch 3/3: Patch 1 added the case of PUD entry being huge in page
  table walk and alloc functions. This new case further increased
  nesting in these functions and made them harder to follow. This
  patch flattens these functions for better readability.

Cc: sparclinux@vger.kernel.org

Chagenlog v6 vs v5:
 - Move include of hvcalls.S after the trap table to avoid
   overflowing previous space (Anthony)
Changelog v5 vs v4:
 - Checking at PUD level for hugepage entry during page table walk is
    patched out if 16GB hugepages are not being used.
	Changelog v4 vs v3:
 - Added cover letter (patch 0/4) for patch series.

Changelog v3 vs v2:
 - Fixed email headers so the subject shows up correctly.

Changelog v2 vs v1:
 - Remove redundant brgez,pn (Bob Picco)
 - Remove unncessary label rename from 700 to 701 (Rob Gardner)
 - Add patch description (Paul)
 - Add 16G case to get_user_pages()
====================

Signed-off-by: David S. Miller <davem@davemloft.net>
2017-08-15 21:48:27 -07:00
Nitin Gupta
4dbe87d5a7 sparc64: Cleanup hugepage table walk functions
Flatten out nested code structure in huge_pte_offset()
and huge_pte_alloc().

Signed-off-by: Nitin Gupta <nitin.m.gupta@oracle.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2017-08-15 21:48:07 -07:00
Nitin Gupta
df7b2155bb sparc64: Add 16GB hugepage support
Adds support for 16GB hugepage size. To use this page size
use kernel parameters as:

default_hugepagesz=16G hugepagesz=16G hugepages=10

Testing:

Tested with the stream benchmark which allocates 48G of
arrays backed by 16G hugepages and does RW operation on
them in parallel.

Orabug: 25362942

Cc: Anthony Yznaga <anthony.yznaga@oracle.com>
Reviewed-by: Bob Picco <bob.picco@oracle.com>
Signed-off-by: Nitin Gupta <nitin.m.gupta@oracle.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2017-08-15 21:48:07 -07:00
Nitin Gupta
44382b0195 sparc64: Support huge PUD case in get_user_pages
get_user_pages() is used to do direct IO. It already
handles the case where the address range is backed
by PMD huge pages. This patch now adds the case where
the range could be backed by PUD huge pages.

Signed-off-by: Nitin Gupta <nitin.m.gupta@oracle.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2017-08-15 21:48:06 -07:00
David S. Miller
91752a9c7b Merge branch 'sparc64-vcc'
Jag Raman says:

====================
sparc64: Enable Virtual Console Concentrator (VCC)

Patchset to enable Virtual Console Concentrator (VCC). VCC provides
access to the serial console of a guest domain. It creates a RAW
VIO/LDC link between the guest domain & primary through which serial
console data is shared.

This set addresses feedback provided by Dave Miller. Cleanup of
driver state is also addressed in this set. Patches updated
are 4, 5, 6 & 7.
====================

Signed-off-by: David S. Miller <davem@davemloft.net>
2017-08-15 21:34:22 -07:00
Jag Raman
8f03f948ba sparc64: vcc: Add install & cleanup TTY operations
Add handlers to support TTY install & cleanup operations

Signed-off-by: Jagannathan Raman <jag.raman@oracle.com>
Reviewed-by: Liam Merwick <liam.merwick@oracle.com>
Reviewed-by: Shannon Nelson <shannon.nelson@oracle.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2017-08-15 21:33:54 -07:00
Jag Raman
e942e5775c sparc64: vcc: Add break_ctl TTY operation
Add handler to support TTY break_ctl operation

Signed-off-by: Jagannathan Raman <jag.raman@oracle.com>
Reviewed-by: Liam Merwick <liam.merwick@oracle.com>
Reviewed-by: Shannon Nelson <shannon.nelson@oracle.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2017-08-15 21:33:54 -07:00
Jag Raman
aeee7debf3 sparc64: vcc: Add chars_in_buffer TTY operation
Add handler to support TTY chars_in_buffer operation

Signed-off-by: Jagannathan Raman <jag.raman@oracle.com>
Reviewed-by: Liam Merwick <liam.merwick@oracle.com>
Reviewed-by: Shannon Nelson <shannon.nelson@oracle.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2017-08-15 21:33:54 -07:00
Jag Raman
cf0452600b sparc64: vcc: Add write & write_room TTY operations
Add handlers to support TTY write & write_room operations

Signed-off-by: Jagannathan Raman <jag.raman@oracle.com>
Reviewed-by: Liam Merwick <liam.merwick@oracle.com>
Reviewed-by: Shannon Nelson <shannon.nelson@oracle.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2017-08-15 21:33:53 -07:00
Jag Raman
6a3ff25bc6 sparc64: vcc: Add hangup TTY operation
Add handler to support TTY hangup operation

Signed-off-by: Jagannathan Raman <jag.raman@oracle.com>
Reviewed-by: Liam Merwick <liam.merwick@oracle.com>
Reviewed-by: Shannon Nelson <shannon.nelson@oracle.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2017-08-15 21:33:53 -07:00
Jag Raman
63a7174484 sparc64: vcc: Add open & close TTY operations
Add handlers to support TTY open & close operations

Signed-off-by: Jagannathan Raman <jag.raman@oracle.com>
Reviewed-by: Liam Merwick <liam.merwick@oracle.com>
Reviewed-by: Shannon Nelson <shannon.nelson@oracle.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2017-08-15 21:33:53 -07:00
Jag Raman
103b9b0bc9 sparc64: vcc: Enable LDC event processing engine
Enable event processing engine to handle LDC events

Signed-off-by: Jagannathan Raman <jag.raman@oracle.com>
Reviewed-by: Liam Merwick <liam.merwick@oracle.com>
Reviewed-by: Shannon Nelson <shannon.nelson@oracle.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
2017-08-15 21:33:52 -07:00