When irdma_ws_add fails, irdma_ws_remove is used to cleanup the leaf node.
This lead to holding the qos mutex twice in the QP resume path. Fix this
by avoiding the call to irdma_ws_remove and unwinding the error in
irdma_ws_add. This skips the call to irdma_tc_in_use function which is not
needed in the error unwind cases.
Fixes: 3ae331c751 ("RDMA/irdma: Add QoS definitions")
Link: https://lore.kernel.org/r/20211019151654.1943-2-shiraz.saleem@intel.com
Signed-off-by: Mustafa Ismail <mustafa.ismail@intel.com>
Signed-off-by: Shiraz Saleem <shiraz.saleem@intel.com>
Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
Currently VLAN is reported in UD work completion when VLAN id is zero,
i.e. no VLAN case.
Report VLAN in UD work completion only when VLAN id is non-zero.
Fixes: b48c24c2d7 ("RDMA/irdma: Implement device supported verb APIs")
Link: https://lore.kernel.org/r/20211019151654.1943-1-shiraz.saleem@intel.com
Signed-off-by: Mustafa Ismail <mustafa.ismail@intel.com>
Signed-off-by: Shiraz Saleem <shiraz.saleem@intel.com>
Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
Device's QP memory should only be allocated and released by IB layer.
This patch removes the redundant release of the device's qp memory and
uses completion APIs to make sure that .destroy_qp() only return, when qp
reference becomes 0.
Fixes: 514aee660d ("RDMA: Globally allocate and release QP memory")
Link: https://lore.kernel.org/r/20211019082212.7052-1-pkushwaha@marvell.com
Acked-by: Michal Kalderon <michal.kalderon@marvell.com>
Signed-off-by: Ariel Elior <aelior@marvell.com>
Signed-off-by: Shai Malin <smalin@marvell.com>
Signed-off-by: Alok Prasad <palok@marvell.com>
Signed-off-by: Prabhakar Kushwaha <pkushwaha@marvell.com>
Signed-off-by: Jason Gunthorpe <jgg@nvidia.com>
First, fix nr_workers checks against max_workers, with max_worker
registration, it may pretty easily happen that nr_workers > max_workers.
Also, synchronise writing to acct->max_worker with wqe->lock. It's not
an actual problem, but as we don't care about io_wqe_create_worker(),
it's better than WRITE_ONCE()/READ_ONCE().
Fixes: 2e480058dd ("io-wq: provide a way to limit max number of workers")
Reported-by: Beld Zhang <beldzhang@gmail.com>
Signed-off-by: Pavel Begunkov <asml.silence@gmail.com>
Link: https://lore.kernel.org/r/11f90e6b49410b7d1a88f5d04fb8d95bb86b8cf3.1634671835.git.asml.silence@gmail.com
Signed-off-by: Jens Axboe <axboe@kernel.dk>
Eric Dumazet says:
====================
net: sched: fixes after recent qdisc->running changes
First patch fixes a plain bug in qdisc_run_begin().
Second patch removes a pair of atomic operations, increasing performance.
====================
Link: https://lore.kernel.org/r/20211019003402.2110017-1-eric.dumazet@gmail.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
__QDISC_STATE_RUNNING is only set/cleared from contexts owning qdisc lock.
Thus we can use less expensive bit operations, as we were doing
before commit f9eb8aea2a ("net_sched: transform qdisc running bit into a seqcount")
Fixes: 29cbcd8582 ("net: sched: Remove Qdisc::running sequence counter")
Signed-off-by: Eric Dumazet <edumazet@google.com>
Cc: Ahmed S. Darwish <a.darwish@linutronix.de>
Acked-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Tested-by: Toke Høiland-Jørgensen <toke@redhat.com>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
For non TCQ_F_NOLOCK qdisc, qdisc_run_begin() tries to set
__QDISC_STATE_RUNNING and should return true if the bit was not set.
test_and_set_bit() returns old bit value, therefore we need to invert.
Fixes: 29cbcd8582 ("net: sched: Remove Qdisc::running sequence counter")
Signed-off-by: Eric Dumazet <edumazet@google.com>
Cc: Ahmed S. Darwish <a.darwish@linutronix.de>
Tested-by: Ido Schimmel <idosch@nvidia.com>
Acked-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de>
Tested-by: Toke Høiland-Jørgensen <toke@redhat.com>
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
Highlights:
----------
- MPU:
- ST boards:
- Add new stm32mp135f-dk board. It embedds new STM32MP135 SoC,
with 512 MB of DDR3. Several connections are available on this
board:
4*USB2.0, 1*USB2.0 typeC DRD, SDcard, 2*RJ45, HDMI,
Combo Wifi/BT, ...
Only SD card, uart4 (console) and watchdog IPs are enabled in
this tag.
- Change IRQ level for STUSB1600 on DKx boards.
- Fix SAI subclocks range.
- Add ck_usb0_48m clock in USB OHCI node device to match with
STM32MP15 datasheet.
- DH boards:
- Reduce DHCOR SPI NOR frequency to 50 MHz to avoid sporadic issues.
- Fix SAI pin muxing.
- Odyssey:
- Set DCMI pins.
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Merge tag 'stm32-dt-for-v5.16-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32 into arm/dt
STM32 DT for v5.16, round 1
Highlights:
----------
- MPU:
- ST boards:
- Add new stm32mp135f-dk board. It embedds new STM32MP135 SoC,
with 512 MB of DDR3. Several connections are available on this
board:
4*USB2.0, 1*USB2.0 typeC DRD, SDcard, 2*RJ45, HDMI,
Combo Wifi/BT, ...
Only SD card, uart4 (console) and watchdog IPs are enabled in
this tag.
- Change IRQ level for STUSB1600 on DKx boards.
- Fix SAI subclocks range.
- Add ck_usb0_48m clock in USB OHCI node device to match with
STM32MP15 datasheet.
- DH boards:
- Reduce DHCOR SPI NOR frequency to 50 MHz to avoid sporadic issues.
- Fix SAI pin muxing.
- Odyssey:
- Set DCMI pins.
* tag 'stm32-dt-for-v5.16-1' of git://git.kernel.org/pub/scm/linux/kernel/git/atorgue/stm32:
ARM: dts: stm32: use usbphyc ck_usbo_48m as USBH OHCI clock on stm32mp151
ARM: dts: stm32: fix AV96 board SAI2 pin muxing on stm32mp15
ARM: dts: stm32: fix SAI sub nodes register range
ARM: dts: stm32: fix STUSB1600 Type-C irq level on stm32mp15xx-dkx
ARM: dts: stm32: set the DCMI pins on stm32mp157c-odyssey
ARM: dts: stm32: Reduce DHCOR SPI NOR frequency to 50 MHz
ARM: dts: stm32: add initial support of stm32mp135f-dk board
dt-bindings: stm32: document stm32mp135f-dk board
ARM: dts: stm32: add STM32MP13 SoCs support
Link: https://lore.kernel.org/r/9d52c3e2-a3b9-89f3-1896-7cd3560e7010@foss.st.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- SPI Multi I/O Bus, SDHI, and Ethernet support for the RZ/G2L SoC,
- SPI Multi I/O Bus, camera, and video-on support for the R-Car V3U
SoC,
- SPI FLASH support for the Falcon development board,
- eMMC, microSD, and Ethernet support for the RZ/G2L SMARC EVK
development board,
- 2 GHz High-Performance support for the R-Car H3e-2G, M3e-2G, and
M3Ne-2G SoCs,
- Miscellaneous fixes and improvements.
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Merge tag 'renesas-arm-dt-for-v5.16-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into arm/dt
Renesas ARM DT updates for v5.16 (take two)
- SPI Multi I/O Bus, SDHI, and Ethernet support for the RZ/G2L SoC,
- SPI Multi I/O Bus, camera, and video-on support for the R-Car V3U
SoC,
- SPI FLASH support for the Falcon development board,
- eMMC, microSD, and Ethernet support for the RZ/G2L SMARC EVK
development board,
- 2 GHz High-Performance support for the R-Car H3e-2G, M3e-2G, and
M3Ne-2G SoCs,
- Miscellaneous fixes and improvements.
* tag 'renesas-arm-dt-for-v5.16-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
mailmap: Fix text encoding for Niklas Söderlund
arm64: dts: renesas: rcar-gen3e: Add Cortex-A57 2 GHz opps
arm64: dts: renesas: rzg2l-smarc-som: Enable Ethernet
arm64: dts: renesas: r9a07g044: Add GbEthernet nodes
arm64: dts: renesas: Add ports node to all adv7482 nodes
arm64: dts: renesas: r8a779a0: Add and connect all CSI-2, ISP and VIN nodes
arm64: dts: renesas: rzg2l-smarc: Enable microSD on SMARC platform
arm64: dts: renesas: rzg2l-smarc-som: Enable eMMC on SMARC platform
arm64: dts: renesas: r9a07g044: Add SDHI nodes
arm64: dts: renesas: falcon-cpu: Add SPI flash via RPC
arm64: dts: renesas: r8a779a0: Add RPC node
arm64: dts: renesas: r9a07g044: Add SPI Multi I/O Bus controller node
Link: https://lore.kernel.org/r/cover.1634298094.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- New machines:
* TYAN S7106 BMC, a x86 server from about four years ago
- Descriptions for the AST2600 ADC, which now has an upstream driver
- Lots of GPIO line names. The OpenBMC project has adopted a scheme for
naming the lines, and new additions will follow this guide
- New I2C devices for Rainier, Everest, EthanolX, Mt Jade
- Fixes for fp5280g2 which has seen some recent development, including
the addtion of a QEmu machine for testing
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Merge tag 'aspeed-5.16-devicetree' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/bmc into arm/dt
ASPEED device tree updates for 5.15
- New machines:
* TYAN S7106 BMC, a x86 server from about four years ago
- Descriptions for the AST2600 ADC, which now has an upstream driver
- Lots of GPIO line names. The OpenBMC project has adopted a scheme for
naming the lines, and new additions will follow this guide
- New I2C devices for Rainier, Everest, EthanolX, Mt Jade
- Fixes for fp5280g2 which has seen some recent development, including
the addtion of a QEmu machine for testing
* tag 'aspeed-5.16-devicetree' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/bmc:
ARM: dts: aspeed: fp5280g2: Use the 64M layout
ARM: dts: aspeed: Add TYAN S7106 BMC machine
ARM: dts: aspeed: rainier: Add power-config-full-load gpio
ARM: dts: aspeed: p10bmc: Define secure boot gpio
ARM: dts: aspeed: mtjade: Add some gpios
ARM: dts: aspeed: Add ADC for AST2600 and enable for Rainier and Everest
ARM: dts: everest: Define name for gpio line B6
ARM: dts: everest: Define name for gpio line Q2
ARM: dts: rainier: Define name for gpio line Q2
ARM: dts: everest: Add 'factory-reset-toggle' as GPIOF6
ARM: dts: aspeed: everest: Add I2C bus 15 muxes
ARM: dts: aspeed: rainier: Add system LEDs
ARM: dts: aspeed: amd-ethanolx: Add FRU EEPROM
ARM: dts: fp5280g2: Enable KCS 3 for MCTP binding
Link: https://lore.kernel.org/r/CACPK8XdrMzY9tzdof7KpzxKquTo7GcWW4N9Zqwtmmu73C7htXA@mail.gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- Add SPMI PMIC support for the Hikey970 board
- Correct the sp805 watchdog compatible string to match the document
- Correct the operating-points table name to match the dtschema
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Merge tag 'hisi-arm64-dt-for-5.16' of git://github.com/hisilicon/linux-hisi into arm/dt
ARM64: DT: HiSilicon ARM64 DT updates for 5.16
- Add SPMI PMIC support for the Hikey970 board
- Correct the sp805 watchdog compatible string to match the document
- Correct the operating-points table name to match the dtschema
* tag 'hisi-arm64-dt-for-5.16' of git://github.com/hisilicon/linux-hisi:
arm64: dts: hisilicon: align operating-points table name with dtschema
arm64: dts: hisilicon: fix arm,sp805 compatible string
arm64: dts: hisilicon: Add support for Hikey 970 PMIC
Link: https://lore.kernel.org/r/6168EB53.60503@hisilicon.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
- Flag the janice SPI display lines properly for the right line
semantics.
- Fix some errors in the Skomer regulator configuration.
- Fix some SD card pin configurations on Skomer.
- Assign the Skomer SD card a 300 ms power-on delay.
- Rewrite the battery nodes to use the standard binding
"monitored-battery" as used in the updated bindings, and
provide the right Samsung battery compatibles for the Samsung
phones.
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Merge tag 'ux500-dts-for-v5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik into arm/dt
Ux500 DTS updates:
- Flag the janice SPI display lines properly for the right line
semantics.
- Fix some errors in the Skomer regulator configuration.
- Fix some SD card pin configurations on Skomer.
- Assign the Skomer SD card a 300 ms power-on delay.
- Rewrite the battery nodes to use the standard binding
"monitored-battery" as used in the updated bindings, and
provide the right Samsung battery compatibles for the Samsung
phones.
* tag 'ux500-dts-for-v5.16' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-nomadik:
ARM: dts: ux500: Switch battery nodes to standard
ARM: dts: ux500: Skomer eMMC needs 300 ms power on
ARM: dts: ux500: Fix up SD card pin config
ARM: dts: ux500: Skomer regulator fixes
ARM: dts: ux500: Tag Janice display SPI correct
Link: https://lore.kernel.org/r/CACRpkdYf5GwRvG1Gemk4mE+aw6UnAVTY8OudwsVNPQXThHXu6g@mail.gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
for 5.16, please pull the following:
- Rafal updates the BCM4908 DTS files to produce fewer warnings by
fixing the UART clock name, moving the reboot syscon node out of the bus
node, and finally updating the NAND controller node names.
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Merge tag 'arm-soc/for-5.16/devicetree-arm64' of https://github.com/Broadcom/stblinux into arm/dt
This pull request contains Broadcom ARM64-based SoCs Device Tree changes
for 5.16, please pull the following:
- Rafal updates the BCM4908 DTS files to produce fewer warnings by
fixing the UART clock name, moving the reboot syscon node out of the bus
node, and finally updating the NAND controller node names.
* tag 'arm-soc/for-5.16/devicetree-arm64' of https://github.com/Broadcom/stblinux:
arm64: dts: broadcom: bcm4908: Fix UART clock name
arm64: dts: broadcom: bcm4908: Move reboot syscon out of bus
arm64: dts: broadcom: bcm4908: Fix NAND node name
Link: https://lore.kernel.org/r/20211013174016.831348-2-f.fainelli@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
for 5.16, please pull the following:
- Matthew provides a set of updates to the Northstar Plus Device Tree
files to fix a number of warnings, and prepare the files to support the
addition of the Cisco Meraki MX64/MX65 wireless controller devices and
finally adds support for those boards.
- Rafal continues to provide updates to the BCM5301X Device Tree files
in order to fix warnings with the various node names, MDIO muxes and
memory nodes. He also adds support for the external switches on the
BCM53573 SoC and adds Tenda AC9 switch ports.
- Christian provides the description of the Ethernet switch ports for
the Cisco Meraki MR32 based on the 53016 SoC
- Arinc adds support for the Asus RT-AC88U device based on the BCM4709
and featuring 8 Ethernet ports over the integrated and the external
Realtek switch (not supported yet)
- Stefan adds support for the Raspberry Pi Compute Module 4 IO board and
does a number of preparatory changes to get there to the Device Tree
files before doing the actual addition
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Merge tag 'arm-soc/for-5.16/devicetree' of https://github.com/Broadcom/stblinux into arm/dt
This pull request contains Broadcom ARM-based SoCs Device Tree changes
for 5.16, please pull the following:
- Matthew provides a set of updates to the Northstar Plus Device Tree
files to fix a number of warnings, and prepare the files to support the
addition of the Cisco Meraki MX64/MX65 wireless controller devices and
finally adds support for those boards.
- Rafal continues to provide updates to the BCM5301X Device Tree files
in order to fix warnings with the various node names, MDIO muxes and
memory nodes. He also adds support for the external switches on the
BCM53573 SoC and adds Tenda AC9 switch ports.
- Christian provides the description of the Ethernet switch ports for
the Cisco Meraki MR32 based on the 53016 SoC
- Arinc adds support for the Asus RT-AC88U device based on the BCM4709
and featuring 8 Ethernet ports over the integrated and the external
Realtek switch (not supported yet)
- Stefan adds support for the Raspberry Pi Compute Module 4 IO board and
does a number of preparatory changes to get there to the Device Tree
files before doing the actual addition
* tag 'arm-soc/for-5.16/devicetree' of https://github.com/Broadcom/stblinux: (31 commits)
arm64: dts: broadcom: Add reference to RPi CM4 IO Board
ARM: dts: Add Raspberry Pi Compute Module 4 IO Board
ARM: dts: Add Raspberry Pi Compute Module 4
dt-bindings: arm: bcm2835: Add Raspberry Pi Compute Module 4
ARM: dts: bcm283x-rpi: Move Wifi/BT into separate dtsi
dt-bindings: display: bcm2835: add optional property power-domains
ARM: dts: BCM5301X: Add DT for Asus RT-AC88U
ARM: BCM53016: MR32: get mac-address from nvmem
ARM: BCM53016: Specify switch ports for Meraki MR32
ARM: dts: BCM53573: Add Tenda AC9 switch ports
ARM: dts: BCM53573: Describe on-SoC BCM53125 rev 4 switch
ARM: dts: BCM5301X: Specify switch ports for more devices
ARM: dts: NSP: Fix MX65 MDIO mux warnings
ARM: dts: NSP: Fix MX64/MX65 eeprom node name
ARM: dts: NSP: Fix MDIO mux node names
ARM: dts: NSP: Fix mpcore, mmc node names
ARM: dts: NSP: Add bcm958623hr board name to dts
ARM: dts: BCM5301X: Fix memory nodes names
ARM: dts: BCM5301X: Fix MDIO mux binding
ARM: dts: BCM5301X: Fix nodes names
...
Link: https://lore.kernel.org/r/20211013174016.831348-1-f.fainelli@gmail.com
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Otherwise, hw_id_name string is NULL for SDMA 2 and 3 when dumping
ip version from VBIOS.
Signed-off-by: Guchun Chen <guchun.chen@amd.com>
Reviewed-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Output a warning message if RAS TA returns UNSUPPORTED_ERROR_INJ status.
v2: implement it in psp_ras_ta_check_status function.
Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Create new function to check status returned by RAS TA.
Signed-off-by: Tao Zhou <tao.zhou1@amd.com>
Reviewed-by: Hawking Zhang <Hawking.Zhang@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This reverts commit 1445d967fb.
This patch introduced a couple of dmesg warnings, this is not a valid
approach anymore. For this reason, we are reverting this patch, and we
need to revert the workaround patch.
v2: squash in unused variable removal (Alex)
Cc: Hanghong Ma <hanghong.ma@amd.com>
Cc: Mark Broadworth <mark.broadworth@amd.com>
Signed-off-by: Agustin Gutierrez <agustin.gutierrez@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[Why]
V3_4 is latest in use.
[How]
Add bios parser support for firmware_info_v3_4 along
with some relevant fields it is also retrieving from dce_info
and smu_info.
Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Acked-by: Agustin Gutierrez Sanchez <agustin.gutierrez@amd.com>
Signed-off-by: Nevenko Stupar <Nevenko.Stupar@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
This DC patchset brings improvements in multiple areas. In summary, we
highlight:
* Fix some issues such as DP2 problem, prefetch bandwidth calculation
for DCN3.1 and others.
* Increased Z9 latency and removed z10 save after dsc disable.
* Revert a couple of bad changes.
* Added missing PSR state patch.
Acked-by: Agustin Gutierrez Sanchez <agustin.gutierrez@amd.com>
Signed-off-by: Aric Cyr <aric.cyr@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[Why & How]
Disable hdmistream and hdmichar root clocks when not being used.
Reviewed-by: Aric Cyr <Aric.Cyr@amd.com>
Acked-by: Agustin Gutierrez Sanchez <agustin.gutierrez@amd.com>
Signed-off-by: Jake Wang <haonan.wang2@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[Why]
bios_golden_init will override dccg_init during init_hw.
[How]
Move dccg_init to after bios_golden_init.
Reviewed-by: Aric Cyr <Aric.Cyr@amd.com>
Reviewed-by: Eric Yang <eric.yang2@amd.com>
Acked-by: Agustin Gutierrez Sanchez <agustin.gutierrez@amd.com>
Signed-off-by: Jake Wang <haonan.wang2@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[Why & How]
Z10 save is done during PSR and bootup.
DSC disable does not need to save for Z10.
Reviewed-by: Eric Yang <eric.yang2@amd.com>
Acked-by: Agustin Gutierrez Sanchez <agustin.gutierrez@amd.com>
Signed-off-by: Jake Wang <haonan.wang2@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[Why & How]
Disable dpstreamclk, symclk32_se, and symclk32_le when not in use.
Reviewed-by: Ariel Bernstein <eric.yang2@amd.com>
Acked-by: Agustin Gutierrez Sanchez <agustin.gutierrez@amd.com>
Signed-off-by: Jake Wang <haonan.wang2@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[why]
The original latencies were causing underflow in some modes
[how]
Replace with the up-to-date watermark values based on new measurments
Reviewed-by: Ahmad Othman <ahmad.othman@amd.com>
Acked-by: Agustin Gutierrez Sanchez <agustin.gutierrez@amd.com>
Signed-off-by: Nikola Cornij <nikola.cornij@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[Why]
Z9 latency is higher than when we originally tuned the watermark
parameters, causing underflow. Increasing the value until the latency
issues is resolved.
Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com>
Acked-by: Agustin Gutierrez Sanchez <agustin.gutierrez@amd.com>
Signed-off-by: Eric Yang <Eric.Yang2@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[Why]
Immediate flip can be enabled dynamically and has higher BW requirements
when validating which voltage mode to use.
If we validate when it's not set then potentially DCFCLK will be too low
and we will underflow.
[How]
DM always requires support so always require it as part of DML input
parameters.
This can't be enabled unconditionally on older ASIC because it blocks
some expected modes so only target DCN3.1 for now.
Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Acked-by: Agustin Gutierrez Sanchez <agustin.gutierrez@amd.com>
Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[Why & How]
Disable root clock for dsc when not being used.
Reviewed-by: Nikola Cornij <Nikola.Cornij@amd.com>
Acked-by: Agustin Gutierrez Sanchez <agustin.gutierrez@amd.com>
Signed-off-by: Jake Wang <haonan.wang2@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[why]
PSR_STATE2b was introduced on DMCUB side, but not on the driver side,
which caused convert_psr_state helper function to return
PSR_STATE_INVALID. That caused visual lagging during state transition.
[how]
Add PSR_STATE2b to dc_psr_state and convert_psr_state
Reviewed-by: Wyatt Wood <Wyatt.Wood@amd.com>
Acked-by: Agustin Gutierrez Sanchez <agustin.gutierrez@amd.com>
Signed-off-by: Mikita Lipski <mikita.lipski@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[Why]
Prefetch BW calculated is lower than the DML reference because of a
porting error that's excluding cursor and row bandwidth from the
pixel data bandwidth.
[How]
Change the dml_max4 to dml_max3 and include cursor and row bandwidth
in the same calculation as the rest of the pixel data during vactive.
Reviewed-by: Dmytro Laktyushkin <Dmytro.Laktyushkin@amd.com>
Acked-by: Agustin Gutierrez Sanchez <agustin.gutierrez@amd.com>
Signed-off-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Remap phyd32clk to PHYF and PHYG for B0, PHYC and PHYD are unused
Reviewed-by: Nicholas Kazlauskas <Nicholas.Kazlauskas@amd.com>
Acked-by: Agustin Gutierrez Sanchez <agustin.gutierrez@amd.com>
Signed-off-by: Hansen <Hansen.Dsouza@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[why]
The requirement is that image width up to 4096 shall be supported
Reviewed-by: Aric Cyr <Aric.Cyr@amd.com>
Acked-by: Agustin Gutierrez Sanchez <agustin.gutierrez@amd.com>
Signed-off-by: Nikola Cornij <nikola.cornij@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[Why]
Error message on Linux when booting.
[How]
Removed power down on boot from DCN31 HW init
to match DCN10 HW init.
Reviewed-by: Anthony Koo <Anthony.Koo@amd.com>
Acked-by: Agustin Gutierrez Sanchez <agustin.gutierrez@amd.com>
Signed-off-by: Derek Lai <derek.lai@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
In bfq_pd_alloc(), the function bfqg_stats_init() init bfqg. If
blkg_rwstat_init() init bfqg_stats->bytes successful and init
bfqg_stats->ios failed, bfqg_stats_init() return failed, bfqg will
be freed. But blkg_rwstat->cpu_cnt is not deleted from the list of
percpu_counters. If we traverse the list of percpu_counters, It will
have UAF problem.
we should use blkg_rwstat_exit() to cleanup bfqg_stats bytes in the
above scenario.
Fixes: commit fd41e60331 ("bfq-iosched: stop using blkg->stat_bytes and ->stat_ios")
Signed-off-by: Zheng Liang <zhengliang6@huawei.com>
Acked-by: Tejun Heo <tj@kernel.org>
Link: https://lore.kernel.org/r/20211018024225.1493938-1-zhengliang6@huawei.com
Signed-off-by: Jens Axboe <axboe@kernel.dk>
If we don't use an IO scheduler or have shared tags, then we don't need
to call into this external function at all. This saves ~2% for such
a setup.
Signed-off-by: Jens Axboe <axboe@kernel.dk>
[Why]
Calculation of scaling ratio can result in a crash due to zero'd src or
dst plane rects.
[How]
Validate that src and dst rects are valid before using for scaling
calculations.
Reviewed-by: Josip Pavic <Josip.Pavic@amd.com>
Acked-by: Agustin Gutierrez Sanchez <agustin.gutierrez@amd.com>
Signed-off-by: Aric Cyr <aric.cyr@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Hardware team has recommended to generically hard code this register to
0xFF as part of the effort to eventually remove this control. However
we set it to 0xF instead.
This causes 4 of audio 8ch to be muted.
Reviewed-by: Ariel Bernstein <eric.bernstein@amd.com>
Acked-by: Agustin Gutierrez Sanchez <agustin.gutierrez@amd.com>
Signed-off-by: Wenjing Liu <wenjing.liu@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[Why & How]
Increase width of some variables to avoid comparing integers of
different widths
Reviewed-by: Aric Cyr <Aric.Cyr@amd.com>
Acked-by: Agustin Gutierrez Sanchez <agustin.gutierrez@amd.com>
Signed-off-by: Josip Pavic <Josip.Pavic@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[WHAT]
One of the current VPG power on calls is unnecessary
Reviewed-by: Eric Yang <eric.yang2@amd.com>
Acked-by: Agustin Gutierrez Sanchez <agustin.gutierrez@amd.com>
Signed-off-by: Michael Strauss <michael.strauss@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[why]
Some DP2.0 RX requires us to set MST_EN even for SST configuration.
We added this debug option so we can configure this temporary workaround
for the RX.
Reviewed-by: George Shen <george.shen@amd.com>
Acked-by: Agustin Gutierrez Sanchez <agustin.gutierrez@amd.com>
Signed-off-by: Wenjing Liu <wenjing.liu@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[Why]
When rapidly plugging and unplugging a DP sink, detection link
training can be mistakenly skipped.
This is due to the hotplug processing occurring before the
encoder assignment logic has had a chance to process the removal
of a stream. The encoder that would be used for detection link
training is then erroneously reported as already in use and
detection link training is skipped.
[How]
During hot plug processing, only determine a link encoder to be
unavailable for a particular link if it has been assigned to a
different link.
Reviewed-by: Meenakshikumar Somasundaram <Meenakshikumar.Somasundaram@amd.com>
Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Acked-by: Agustin Gutierrez Sanchez <agustin.gutierrez@amd.com>
Signed-off-by: Jimmy Kizito <Jimmy.Kizito@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[Why]
When copying a stream, the encoder assigned to it is copied too.
Encoder assignment should only happen when executing the encoder
assignment function link_encs_assign().
[How]
Clear the link encoder pointer for copied stream.
Reviewed-by: Meenakshikumar Somasundaram <Meenakshikumar.Somasundaram@amd.com>
Reviewed-by: Jun Lei <Jun.Lei@amd.com>
Acked-by: Agustin Gutierrez Sanchez <agustin.gutierrez@amd.com>
Signed-off-by: Jimmy Kizito <Jimmy.Kizito@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
[Why & How]
Disable root clock for dpp when not being used.
Reviewed-by: Eric Yang <eric.yang2@amd.com>
Acked-by: Agustin Gutierrez Sanchez <agustin.gutierrez@amd.com>
Signed-off-by: Jake Wang <haonan.wang2@amd.com>
Tested-by: Daniel Wheeler <daniel.wheeler@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>