Pass the original kprobe for preparing an optimized kprobe arch-dep
part, since for some architecture (e.g. ARM32) requires the information
in original kprobe.
Signed-off-by: Masami Hiramatsu <masami.hiramatsu.pt@hitachi.com>
Signed-off-by: Wang Nan <wangnan0@huawei.com>
Signed-off-by: Jon Medhurst <tixy@linaro.org>
These have extra 'checker' functions associated with them so lets make
sure those get covered by testing. As they may create uninitialised
space on the stack we also update the test code to ensure such space is
consistent between test runs. This is done by disabling interrupts in
setup_test_context().
Signed-off-by: Jon Medhurst <tixy@linaro.org>
This patch prohibits probing instructions for which the stack
requirements are unable to be determined statically. Some test cases
are found not work again after the modification, this patch also
removes them.
Signed-off-by: Wang Nan <wangnan0@huawei.com>
Reviewed-by: Jon Medhurst <tixy@linaro.org>
Signed-off-by: Jon Medhurst <tixy@linaro.org>
This patch uses the previously introduced checker functionality on
store instructions to record their stack consumption information to
arch_probes_insn.
Signed-off-by: Wang Nan <wangnan0@huawei.com>
Reviewed-by: Jon Medhurst <tixy@linaro.org>
Signed-off-by: Jon Medhurst <tixy@linaro.org>
Add handling for gta04 tv out chain:
venc -> opa362 -> svideo
Use invert-polarity in venc node because opa362
is doing polarity inversion also.
Signed-off-by: Marek Belisko <marek@goldelico.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
CM-T3517, CM-T3530 and CM-T3730 features NAND storage chip connected to
GPMC bus.
Add GPMC DT entry into the root DT file omap3-cm-t3x.dtsi, common for
all three modules.
NAND timings are calculated to be safe for CM-T3x devices as it works
now in non DT boot (in this case the timings are updated by U-Boot).
Update GPMC ranges in boards DT files to include all connected devices.
Signed-off-by: Dmitry Lifshitz <lifshitz@compulab.co.il>
Acked-by: Igor Grinberg <grinberg@compulab.co.il>
Acked-by: Roger Quadros <rogerq@ti.com>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Fixes the following compilation error:
include/sound/compress_driver.h: In function ‘snd_compr_drain_notify’:
include/sound/compress_driver.h:177:2: error: implicit declaration of function ‘snd_BUG_ON’ [-Werror=implicit-function-declaration]
if (snd_BUG_ON(!stream))
snd_BUG_ON() is defined in sound/core.h but the file is not included explicitly,
so include it.
Signed-off-by: Qais Yousef <qais.yousef@imgtec.com>
Acked-by: Vinod Koul <vinod.koul@intel.com>
Signed-off-by: Takashi Iwai <tiwai@suse.de>
In a recent cleanup, the mmp_tdma_terminate_all function was
introduced but does not set a proper return value. Almost
no slave driver uses that return value, but if one does, the
result will be undefined, which the compiler warns about:
dma/mmp_tdma.c: In function 'mmp_tdma_terminate_all':
dma/mmp_tdma.c:474:1: warning: no return statement in function returning non-void [-Wreturn-type]
This changes the driver to return zero, like most other
drivers do.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Fixes: f43a6fd400 ("dmaengine: mmp-tdma: Split device_control")
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
The mmp tdma driver does not actually require this header, and
we want to enable multiplatform support for MMP, which would
make it inaccessible and cause a build error.
This patch just removes the old #include.
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
Commit db08425ebd ("dmaengine: k3: Split device_control") introduced
two new helper functions, which unfortunately have the same names
as the existing suspend/resume functions, resulting in a build error
when CONFIG_PM_SLEEP is enabled:
drivers/dma/k3dma.c:823:12: error: conflicting types for 'k3_dma_resume'
static int k3_dma_resume(struct device *dev)
^
drivers/dma/k3dma.c:625:12: note: previous definition of 'k3_dma_resume' was here
static int k3_dma_resume(struct dma_chan *chan)
^
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Fixes: db08425ebd ("dmaengine: k3: Split device_control")
Reported-by: Mark Brown <broonie@kernel.org>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
While splitting device control in db08425ebd ("dmaengine: k3:
Split device_control") new function with the same 'k3_dma_resume' name
was added, leading to build error:
drivers/dma/k3dma.c:823:12: error: conflicting types for ‘k3_dma_resume’
drivers/dma/k3dma.c:625:12: note: previous definition of ‘k3_dma_resume’ was here
Signed-off-by: Krzysztof Kozlowski <k.kozlowski@samsung.com>
Signed-off-by: Vinod Koul <vinod.koul@intel.com>
This patch fixes I2C trivial-devices.txt DT documentation file to
reference isil (NASDAQ symbol and the most used prefix inside the
kernel) for Intersil.
It reverts 7c75c1d5e7 ("dt-bindings: Document deprecated device
vendor name to fix related warning").
Signed-off-by: Arnaud Ebalard <arno@natisbad.org>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
This patch removes a duplicate AHCI-mode SATA Device ID for the Intel Sunrise Point PCH.
Signed-off-by: James Ralston <james.d.ralston@intel.com>
Signed-off-by: Tejun Heo <tj@kernel.org>
The driver was recently adapted to a core API change, but the
change was incomplete, missing out the suspend helper and
leaving an extraneous local variable around:
usb/phy/phy-mv-usb.c: In function 'mv_otg_update_state':
usb/phy/phy-mv-usb.c:341:18: warning: unused variable 'phy' [-Wunused-variable]
usb/phy/phy-mv-usb.c: In function 'mv_otg_suspend':
usb/phy/phy-mv-usb.c:861:16: error: 'struct usb_phy' has no member named 'state'
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Fixes: e47d92545c ("usb: move the OTG state from the USB PHY to the OTG structure")
Signed-off-by: Felipe Balbi <balbi@ti.com>
Bump mpt2sas driver version to 20.100.00.00.
Signed-off-by: Sreekanth Reddy <Sreekanth.Reddy@avagotech.com>
Reviewed-by: Martin K. Petersen <martin.petersen@oracle.com>
Signed-off-by: Christoph Hellwig <hch@lst.de>
Added a support to set cpu affinity mask for each MSIX vector enabled
by the HBA. So that, running the irqbalancer will balance interrupts among
the cpus.
Change_set:
1. Added affinity_hint varable of type cpumask_var_t in adapter_reply_queue
structure. And allocated a memory for this varable by calling
alloc_cpumask_var.
2. Call the API irq_set_affinity_hint for each MSIx vector to affiniate it
with calculated cpus at driver inilization time.
3. While freeing the MSIX vector, call this same API to release the cpu
affinity mask for each MSIx vector by providing the NULL value in
cpumask argument.
4. then call the free_cpumask_var API to free the memory allocated in step 2.
Signed-off-by: Sreekanth Reddy <Sreekanth.Reddy@avagotech.com>
Reviewed-by: Martin K. Petersen <martin.petersen@oracle.com>
Signed-off-by: Christoph Hellwig <hch@lst.de>
Copyright, Trademark & Confidentiality legal statements throughout the
source code changed from LSI to Avago.
Signed-off-by: Sreekanth Reddy <Sreekanth.Reddy@avagotech.com>
Reviewed-by: Martin K. Petersen <martin.petersen@oracle.com>
Signed-off-by: Christoph Hellwig <hch@lst.de>
For any SCSI command, if the driver receives IOC status =
SCSI_IOC_TERMINATED and log info = 0x32010081 then that command will be
completed with DID_RESET host status.
The definition of this log info value is "Virtual IO has failed and has
to be retried".
Firmware will provide this log info value with IOC Status
"SCSI_IOC_TERMINATED", whenever a drive (with is a part of a volume)
is pulled and pushed back within some minimal delay. With this log info
value, firmware informs the driver to retry the failed IO command
infinite times, so to provide some time for the firmware to discover
the reinserted drive successfully instated of just retrying failed
command for five times( doesn't giving enough time for firmware to
complete the drive discovery) and failing the IO permanently even
though drive came back successfully.
Signed-off-by: Sreekanth Reddy <Sreekanth.Reddy@avagotech.com>
Reviewed-by: Martin K. Petersen <martin.petersen@oracle.com>
Signed-off-by: Christoph Hellwig <hch@lst.de>
Change Set:
1. Extended the upper boundary restriction for the module parameter
max_sgl_entries. Earlier, the max_sgl_entries was capped at the
SCSI_MAX_SG_SEGMENTS kernel definition. With this change, the user
would be able to set the max_sgl_entries to any value which is
greater than SCSI_MAX_SG_SEGMENTS and less than the minimum of
SCSI_MAX_SG_CHAIN_SEGMENTS & hardware limit (Calculated using
IOCFacts's MaxChainDepth).
2. Added a print for the message log whenever the user sets the
max_sgl_entries to a value greater than SCSI_MAX_SG_SEGMENTS to
warn about the kernel definition overriding.
Signed-off-by: Sreekanth Reddy <Sreekanth.Reddy@avagotech.com>
Reviewed-by: Martin K. Petersen <martin.petersen@oracle.com>
Signed-off-by: Christoph Hellwig <hch@lst.de>
Change List in this MPI2 specification,
1. Added SSUTimeout field to MPI2_CONFIG_PAGE_BIOS_1,
and more defines for the BiosOptions field.
Signed-off-by: Sreekanth Reddy <Sreekanth.Reddy@avagotech.com>
Reviewed-by: Martin K. Petersen <martin.petersen@oracle.com>
Signed-off-by: Christoph Hellwig <hch@lst.de>
Bump driver version to 19.100.00.00.
Signed-off-by: Sreekanth Reddy <Sreekanth.Reddy@avagotech.com>
Reviewed-by: Martin K. Petersen <martin.petersen@oracle.com>
Signed-off-by: Christoph Hellwig <hch@lst.de>
When a flaky disk is there in a topology then during driver load,
discovery related I/O times out; which results in SCSI error recovery
initiating host reset and then the controller won't see any disk.
In this patch, The driver would return FAILED status to the host reset
initiated due to discovery related I/O timeout if ioc->is_driver_loading
is set. This flag would be set until we exit out of scsih_scan_finished().
i.e.
During device discovery if one of the disk is flaky
(which responds to some discovery commands and doesn't respond to some)
the driver wouldn't perform host reset for discovery related I/O timeout.
Instead it would return Failure for the host reset resulting in the
flaky disk getting removed by the SCSI Mid layer,
so other disks would be added correctly.
Signed-off-by: Sreekanth Reddy <Sreekanth.Reddy@avagotech.com>
Reviewed-by: Martin K. Petersen <martin.petersen@oracle.com>
Signed-off-by: Christoph Hellwig <hch@lst.de>
This patch will log a message when driver receives "Temperature Threshold
exceeded" event from any temperature sensor.
The message will look similar to like:
mpt3sas0: Temperature Threshold flags a b c d exceeded for Sensor: x !!!
mpt3sas0: Current Temp In Celsius: y
where a b c d are threshold flags 0 1 2 3
Change_set:
1. Get the number of sensor count of this IOC by reading IO Unit page 8 at
driver initialization time.
2. Also unmask the Temperature Threshold Event at driver initialization
time
3. Whenever a MPI2_EVENT_TEMP_THRESHOLD event is received from the
firmware, then print the sensor number, the maximum threshold number it
has exceed and the current temperature of this sensor.
Signed-off-by: Sreekanth Reddy <Sreekanth.Reddy@avagotech.com>
Reviewed-by: Martin K. Petersen <martin.petersen@oracle.com>
Signed-off-by: Christoph Hellwig <hch@lst.de>
wait_for_completion_timeout does not return negative values so
"result" handling here should be simplified to cover the actually
possible cases only.
Signed-off-by: Nicholas Mc Guire <der.herr@hofr.at>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
On Rockchip I2C the controller drops SDA low slightly too soon to meet
the "repeated start" requirements.
>From my own experimentation over a number of rates:
- controller appears to drop SDA at .875x (7/8) programmed clk high.
- controller appears to keep SCL high for 2x programmed clk high.
The first rule isn't enough to meet tSU;STA requirements in
Standard-mode on the system I tested on. The second rule is probably
enough to meet tHD;STA requirements in nearly all cases (especially
after accounting for the first), but it doesn't hurt to account for it
anyway just in case.
Even though the repeated start requirement only need to be accounted
for during a small part of the transfer, we'll adjust the timings for
the whole transfer to meet it. I believe that adjusting the timings
in just the right place to switch things up for repeated start would
require several extra interrupts and that doesn't seem terribly worth
it.
With this change and worst case rise/fall times, I see 100kHz i2c
going to ~85kHz. With slightly optimized rise/fall (800ns / 50ns) I
see i2c going to ~89kHz. Fast-mode isn't affected much because
tSU;STA is shorter relative to tHD;STA there.
As part of this change we needed to account for the SDA falling time.
The specification indicates that this should be the same, but we'll
follow Designware's lead and add a binding. Note that we deviate from
Designware and assign the default SDA falling time to be the same as
the SCL falling time, which is incredibly likely.
Signed-off-by: Doug Anderson <dianders@chromium.org>
[wsa: rebased to i2c/for-next]
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
The number of clock cycles to be written into the CLKDIV register
that determines the I2C clk high phase includes the rise time.
So to meet the timing requirements defined in the I2C specification
which defines the minimal time SCL has to be high, the rise time
has to taken into account. The same applies to the low phase with
falling time.
In my test on RK3288-Pink2 board, which is not an upstream board yet,
if external pull-up resistor is 4.7K, rise_ns is about 700ns.
So the measured high_ns is about 3900ns, which is less than 4000ns
(the minimum high_ns in I2C specification for Standard-mode).
To fix this bug min_low_ns should include fall time and min_high_ns
should include rise time.
This patch merged the patch from chromium project which can get the
rise and fall times for signals from the device tree. This allows us
to more accurately calculate timings. see:
https://chromium-review.googlesource.com/#/c/232774/
Signed-off-by: Addy Ke <addy.ke@rock-chips.com>
Reviewed-by: Doug Anderson <dianders@chromium.org>
Tested-by: Doug Anderson <dianders@chromium.org>
[wsa: fixed a typo in the docs]
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
The I2C controller sends a NACK to the slave when transfer size register
reaches zero, irrespective of the hold bit. So, in order to handle transfers
greater than 252 bytes, the transfer size register has to be maintained at a
value >= 1. This patch implements the same.
The interrupt status is cleared at the beginning of the isr instead of
the end, to avoid missing any interrupts.
Signed-off-by: Harini Katakam <harinik@xilinx.com>
[wsa: added braces around else branch]
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Older toolchains may not specify __LITTLE_ENDIAN__, but older
toolchains were all little endian. Don't make things unnecessarily
hard for those toolchains.
Signed-off-by: Chris Metcalf <cmetcalf@ezchip.com>
This isn't only short and easier to read and fully portable but also
shrinks a Malta kernel's by 160 bytes.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
The sama5_defconfig can be used both on the sama5d3 and the sama5d4.
Enabling DEBUG_LL is an issue though, since it will by default use the kernel
addresses for the sama5d3 DBGU UART, that is located at a different address on
the sama5d4.
Remove this from the defconfig.
Signed-off-by: Maxime Ripard <maxime.ripard@free-electrons.com>
Signed-off-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Sparse emits a bunch of warnings in mips-cm.h due to casting away of
__iomem by the addr_gcr_*() functions:
arch/mips/include/asm/mips-cm.h:134:1: warning: cast removes address space of expression
And subsequent passing of the return values to __raw_readl() and
__raw_writel() in the read_gcr_*() and write_gcr_*() functions:
arch/mips/include/asm/mips-cm.h:134:1: warning: incorrect type in argument 2 (different address spaces)
arch/mips/include/asm/mips-cm.h:134:1: expected void volatile [noderef] <asn:2>*mem
arch/mips/include/asm/mips-cm.h:134:1: got unsigned int [usertype] *
arch/mips/include/asm/mips-cm.h:134:1: warning: incorrect type in argument 1 (different address spaces)
arch/mips/include/asm/mips-cm.h:134:1: expected void const volatile [noderef] <asn:2>*mem
arch/mips/include/asm/mips-cm.h:134:1: got unsigned int [usertype] *
Fix by adding __iomem to the addr_gcr_*() return type and cast.
Signed-off-by: James Hogan <james.hogan@imgtec.com>
Cc: Paul Burton <paul.burton@imgtec.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/8874/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
[...]
HOSTCC scripts/kconfig/zconf.tab.o
HOSTLD scripts/kconfig/conf
arch/mips/Kconfig:2681:error: recursive dependency detected!
arch/mips/Kconfig:2681: symbol MIPS32_N32 depends on MIPS32_COMPAT
arch/mips/Kconfig:2658: symbol MIPS32_COMPAT is selected by MIPS32_N32
Introduced by d74473bdf7a4c1ef7ae2b75f585fe5649ac2dcea (MIPS: Compat: Fix
build error if CONFIG_MIPS32_COMPAT but no compat ABI.)
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
In that case nor __NR_seccomp_*_32 symbols will be defined in
<asm/unistd.h> so the attempt to use it in kernel.seccomp.c will fail
with:
kernel/seccomp.c:565:2: error: '__NR_seccomp_read_32' undeclared here (not in a function)
__NR_seccomp_read_32, __NR_seccomp_write_32, __NR_seccomp_exit_32, __NR_seccomp_sigreturn_32,
^
kernel/seccomp.c:565:24: error: '__NR_seccomp_write_32' undeclared here (not in a function)
__NR_seccomp_read_32, __NR_seccomp_write_32, __NR_seccomp_exit_32, __NR_seccomp_sigreturn_32,
^
kernel/seccomp.c:565:47: error: '__NR_seccomp_exit_32' undeclared here (not in a function)
__NR_seccomp_read_32, __NR_seccomp_write_32, __NR_seccomp_exit_32, __NR_seccomp_sigreturn_32,
^
kernel/seccomp.c:565:69: error: '__NR_seccomp_sigreturn_32' undeclared here (not in a function)
__NR_seccomp_read_32, __NR_seccomp_write_32, __NR_seccomp_exit_32, __NR_seccomp_sigreturn_32,
Solved by changing the compat ABIs in kconfig to select MIPS32_COMPAT
directly. This also means the user no longer has to select MIPS32_COMPAT
before being able to see the ABI options.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Fixes sparse warnings:
arch/mips/jz4740/irq.c:63:6: warning: symbol 'jz4740_irq_suspend' was not declared. Should it be static?
arch/mips/jz4740/irq.c:69:6: warning: symbol 'jz4740_irq_resume' was not declared. Should it be static?
Also, I've seen some elusive build errors on my automated build test
where JZ4740_IRQ_BASE and NR_IRQS are missing, but I can't reproduce
them manually for some reason. Anyway, mach-jz4740/irq.h should help us
avoid relying on some implicit include.
Signed-off-by: Brian Norris <computersforpeace@gmail.com>
Cc: linux-mips@linux-mips.org
Patchwork: https://patchwork.linux-mips.org/patch/8724/
Acked-by: Lars-Peter Clausen <lars@metafoo.de>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
In particular the use of the antiquated PIX PATA drivers was a nuiscance
since most userland has switched to the new /dev/sda drivers as well as
the lack of EXT4.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Commit 4227a2d4ef (MIPS: Support for hybrid
FPRs) changes the kernel to execute read_c0_config5() even on processors
that don't have a Config5 register. According to the arch spec the
behaviour of trying to read or write this register is UNDEFINED where this
register doesn't exist, that is merely looking at this register is
already cruel because that might kill a kitten.
In case of Qemu older than v2.2 Qemu has elected to implement this
UNDEFINED behaviour by taking a RI exception - which then fries the
kernel:
[...]
Freeing YAMON memory: 956k freed
Freeing unused kernel memory: 240K (80674000 - 806b0000)
Reserved instruction in kernel code[#1]:
CPU: 0 PID: 1 Comm: init Not tainted 3.18.0-rc6-00058-g4227a2d #26
task: 86047588 ti: 86048000 task.ti: 86048000
$ 0 : 00000000 77a638cc 00000000 00000000
[...]
For qemu v2.2.0 commit f31b035a9f10dc9b57f01c426110af845d453ce2
(target-mips: correctly handle access to unimplemented CP0 register)
changed the behaviour to returning zero on read and ignoring writes
which more matches how typical hardware implementations actually behave.
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Because of wrong macro check in commit 96bba98393 ("ath10k: fix build error
when hwmon is off"), hwmon never be enabled. Fix that.
Signed-off-by: Rajkumar Manoharan <rmanohar@qti.qualcomm.com>
Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
When replenishing Rx buffers driver updates the address of the
buffer and the index of rx buffer in rx ring to the firmware.
Change in order by CPU can cause rx ring corruption. Add memory
barrier before updating rx buffer index to guarantee the order.
This could fix some instances of rx ring corruption due to done
bit in rx attention flag not set.
Signed-off-by: Vasanthakumar Thiagarajan <vthiagar@qti.qualcomm.com>
Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
wait_for_completion_timeout does not return negative values so the tests
for <= 0 are not needed and the case differentiation in the error handling
path unnecessary.
Signed-off-by: Nicholas Mc Guire <der.herr@hofr.at>
Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
CSR atlas7 uses Network on Chip(NoC) bus architecture, there are dozens
of MARCOs, in each MARCO, there are dozens of hardware modules.
Signed-off-by: Zhiwu Song <Zhiwu.Song@csr.com>
Signed-off-by: Hao Liu <Hao.Liu@csr.com>
Signed-off-by: Barry Song <Baohua.Song@csr.com>
Acked-by: Arnd Bergmann <arnd@arndb.de>
Recent commit
30c78167bc ("ath10k:
set max_num_vdevs based on wmi op version")
skipped wmi-tlv case and left max_num_vdevs reset.
Make sure it is properly set.
Signed-off-by: Michal Kazior <michal.kazior@tieto.com>
Signed-off-by: Kalle Valo <kvalo@qca.qualcomm.com>
