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| Author | SHA1 | Message | Date | |
|---|---|---|---|---|
Arnd Bergmann
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8158597fd0 |
A few more Qualcomm ARM32 DeviceTree updates for v6.4
This adds IPA definition to the sdx65 platform, and brings a few stylistic changes to sdx55 and sdx65. Compatibles for the two new Qualcomm Robotics Platform boards, RB1 and RB2, are defined, as is Xiaomi Mi A3 and the MI01.6 development baord on IPQ5332. These are all ARM64 boards, despite being introduced through the ARM32 pull request... -----BEGIN PGP SIGNATURE----- iQJJBAABCAAzFiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmQ4vBQVHGFuZGVyc3Nv bkBrZXJuZWwub3JnAAoJEAsfOT8Nma3FraQQAKyY9KYmybeOmUboXT9ie2s3BRFQ TYQ91BA/mA/og1wQ/8QftnufPKohINa1VCe0bIpT1S+yWApphg4pfM1wfFwRqGy6 9dp6nO8MXTsliVNUzhw9/osqswh/XqKEpjk9gpLkQuw0QRfIaiU2t0/rcAUpiUtT +M3m06qw5eCiw8s3TGq+w/3aoK5Gpnh5ec63BpiURzOcV/DIq+4ZmTu5v+N0dQl5 jmbtPT/Ccowic0oTxu0OEa8ctrpBmdfs+eiOdO1hzigz6/4mHbakDW+AgNeu8PcH o6dYDU/9wZQOiRcyoX8kX+zVWXYj0BZt7P8+FlGMAEDEmLXLyGG2SbkZJTkHid91 n7+RT/pah6sInVaEjARe5qLIymsYxVtYCM2EBA7Ozo3oJFYFebNWbrZfoUkoPEl4 8azB6LJcOSEiVVoD9irK8EKBMce3d8EwDueTBeGUdyJlxWm7suyxoNEuI3onBSJn aq2xxUVoT/F6vPueNI3AP5ctZF0ZUjbhRUADMeZVo0n432qyKoCkte/bs1qUEAm7 82cSknnVMjAv8HfuwKhf4b1WlC762mfnyMKI2mmxLfWDkHyLejEEjfye3vb4fcW+ tVMpjbkQ49VlU1kJHGSuBif5d2c6cxGQr7QqBxpE94me21IZhCSfMLRWAW7LW3rl 3QLHq/gMiUtwFnVe =KMpQ -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmQ5eHkACgkQYKtH/8kJ Uic7SQ/9G4V2YILTPWef+hLHSSs6ivaL5ZgrZ7dhnHThhKOmF8qUZo4TuXVrmCBk +K6YV8zUI7YBIja4+i6/C2wlk6AbNEzqwAb6fJfXv9sixyk5wLQDrtWKnMar7WtJ N7ORMorx+Nn5oj0LrUf4Wvpfhnr382rZf0m0nltKMPBkrO6IDY2R2HsT4C5vzrQn B9Wa+7FA1ncKxlxIAEYp0aEGsy48tWh6KQgFwTmfvLnqOAZ+0fdoBQZBdvO3D1ky cK8q6gZKDW8hIGOX6ELxyGULN25ILnWQ+7wRoiecWF46zUh8eDWL/AiALbj7H916 S3uDQvq2T3iBhqIUBVHP50aNpLMQ+gz9fI0w1SlD8pImEb/hi6ovWe/fniLkj3Gr 6GTPtI/RyUNpHP5M3TIA5RKBnwubQnLnATFNB2IEIXtOUwxf1D5YZZGlXfKMOpAh AKvd5MPo176t0Ga+u1BBc07EV6zEqXxgho3tvyQB4xZpcZ1/Wub9SdSqQ3AWebEQ Bziuv2Swms/matnCw46+eUMyypHhvYwR0tZY/e0PpOSSkzVmsuS183sm0e41A3R5 PYS7tp7u8f9vOlIJ50RIqClD4XA9G0EuTSsKgTMd9QFpc45usDnV1VoltzMEgutU ldhSnfZ2VDk/gP4or8pmPX69ZDwxG64s/32WiKsJKUtG45dP6ZU= =TaSa -----END PGP SIGNATURE----- Merge tag 'qcom-dts-for-6.4-2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/dt A few more Qualcomm ARM32 DeviceTree updates for v6.4 This adds IPA definition to the sdx65 platform, and brings a few stylistic changes to sdx55 and sdx65. Compatibles for the two new Qualcomm Robotics Platform boards, RB1 and RB2, are defined, as is Xiaomi Mi A3 and the MI01.6 development baord on IPQ5332. These are all ARM64 boards, despite being introduced through the ARM32 pull request... * tag 'qcom-dts-for-6.4-2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: dt-bindings: arm: qcom: Document the Qualcomm qrb4210-rb2 board ARM: dts: qcom: sdx55-fn980: Move "status" property to the end of node ARM: dts: qcom: sdx55: Move reset and wake gpios to board dts dt-bindings: arm: qcom: document MI01.6 board based on IPQ5332 family dt-bindings: arm: qcom: Document xiaomi,laurel-sprout board dt-bindings: arm: qcom: Add QRB2210/QCM2290 and RB1 board ARM: dts: qcom: sdx65: move status properties to end of nodes ARM: dts: qcom: sdx65: add IPA information Link: https://lore.kernel.org/r/20230414023723.2411793-1-andersson@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Arnd Bergmann
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0a25e38509 |
ASPEED device tree updates for 6.4
- Fixes for romed8hm3 GPIO, asrock SPI clocks, bonnell eeprom - Misc updates for various BMC systems - Add AST2600 UDMA node -----BEGIN PGP SIGNATURE----- iQIzBAABCAAdFiEE+nHMAt9PCBDH63wBa3ZZB4FHcJ4FAmQ3rWMACgkQa3ZZB4FH cJ71Bg/+I8/JSiGupExCkzAlmRbwpFkOXx0VEoWNclAWOTeQxBGm6mjG3w5hGTUm 2JB/+fSxO56jbuiUzIglm7fUbbHQJVunZLiIXqLi2PJlXJlqLgOzOABJow+nwPvZ utOwy52gs0aler/V9SSRDJIRol1UratwkxX1Xo8izNgaKxP3Ru4W5uITlDZvrEDb EAFxxpv7QsJQTssGmCu6N5FYd1C4pgsULzEY5kh5JagR4A0Ngygte1LhNc6xHYZL DREYCat9UMwP3ZX5J2xV9rooz+79dudYmXiFbP1yJdyx0XQLtQzNQccXfwEMT8W1 rhJdh9k/JDeDf4uKqtLq+LcnTWphk8Afy/WMU6h89T5gkB3CTekGe/PBoYQHndlZ cSxmp+0ZO9o/pEoq5tTQNVwizn08qVXr2iTr+B+t9WhyiBnjafCijdhi2d770D2N C0LNLlhAn+ao7MhcHr4wrUoUNoqjzFpvaTg70pcZlbFx/wi9QH1j9AeFQTxMbeS8 klz44DWknOdRX5AcQRf/V+eRG93jlcDbdu7grvBJ2fwXlpwcUiyCrzETNzC3aiww MpSvBNnnYS5/PxJsK2xQ2EowuZ1J/xNonQEwZA1w0krhVZzspnXfi5X2h+oB9n+c 4thCUytRAnlvhQv5Sk13Ycx7A2C4thHDTNovvQzJ0xbFKVHg2vU= =sPZX -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmQ5eEwACgkQYKtH/8kJ Uiex4w//f2oY8GQO5F6wVALJTVByjhRuDakc07E6yZLzgjEk4wVKLr5t0TUiAkVx on7TqfomKSLgZxmRD1EqdQkMiCLqpv8HsdyYNm2U0uqXo/gBDSGuCnAFzQLa3cpT OfnuXQZCsUbHaKRqzhFp08GLmlkjTQXmczh0ejG/Bv+Ethl1XL+CcHftvR2aeZJx S3xC5UhgvE+s3zU+67q4r1Hhv4RPl2FoPsL9Y+JExkkmHlHnxOW7tBt0POijZ3Pa iW67LISEkYqg64zQCf+htfKyz45YAuweq8D8cy/RM677hbCnSolrmxjr4CcFhIwr 5EqtLOVx2VKRbOOViYyYNtvSg0c8xXb+9VKja9Qx8tnjd4yb26DL72tlGtBCzJvX RUN8dFBF47rkzoPhpImpzliQIipw1aAaFYalCwSUUsKMgXil6Y97Edhr5A2AOokS wpi8pUZ5v8OO4nDIF3we1sK1qRf+BsfiE5IND8lnYeUfuc5RterX+jrDVbeuZcQJ J+hocUmGY7OXgIpvdWEunA8OEzwgVXAcFdKfvMRffvP2WuieqxJEPbUH4hacx/rx SsPgwyXA+/tMA9S6zE5SVefPqxwP0FzdCuG299ELtB6LLlEz4ePUWDvh3vpXiLvb FVV8z+xg5DOIbj5IhUchvvBV0MHAOBb9ihATHNIa0FEWpgLS0s4= =BuBw -----END PGP SIGNATURE----- Merge tag 'aspeed-6.4-devicetree' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/bmc into soc/dt ASPEED device tree updates for 6.4 - Fixes for romed8hm3 GPIO, asrock SPI clocks, bonnell eeprom - Misc updates for various BMC systems - Add AST2600 UDMA node * tag 'aspeed-6.4-devicetree' of git://git.kernel.org/pub/scm/linux/kernel/git/joel/bmc: ARM: dts: aspeed-g6: Add UDMA node ARM: dts: aspeed: greatlakes: add mctp device ARM: dts: aspeed: greatlakes: Add gpio names ARM: dts: aspeed: p10bmc: Change power supply info ARM: dts: aspeed: bonnell: Update eeprom size ARM: dts: aspeed: bonnell: Remove MAC3 ARM: dts: aspeed: everest: Add reserved memory for TPM event log ARM: dts: aspeed: mtmitchell: Enable NCSI ARM: dts: aspeed: asrock: Correct firmware flash SPI clocks ARM: dts: aspeed: e3c246d4i: Add PECI device ARM: dts: aspeed: romed8hm3: Fix GPIO polarity of system-fault LED Link: https://lore.kernel.org/r/CACPK8XfmK5S=1PQjBQHb6daDR3qTWN-_NLoXP7+ZDCk13wDxcA@mail.gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Arnd Bergmann
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9e0dabbd9b |
This pull request contains Broadcom ARM64-based SoCs Device Tree changes
for 6.4, please pull the following: - Rob fixes the GICv3 ITS node name for the Stingray platforms - William adds the new-style High Speed SPI controller nodes to the BCA SocS - Rafal fixes the NAND controller interrupt name for BCM4908, LED node(s) and procmon for BCM4908. He also adds support for the USB ports, and declares USB triggered LEDs for the Netgear R8000P and TP-Link C2300. -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEm+Rq3+YGJdiR9yuFh9CWnEQHBwQFAmQ0mjwACgkQh9CWnEQH BwR0nQ//f9Q6E83ROQ3eNdRrCQuvxHeJ5EQgXRM+4F3jiazJdKpAxiNSg2uoM7/T haom+DYrkeG6Jv6yqlDJIbFccHeaJUmFBzXxZ42ly5M0HliMF5jnsdqqdPdcwoPB hzhuSI0pWU2OUESJpVxoPnjCywrz8FnjnVpeIUOLricJm3oleju5Wrcj2AWv04bx 3Vkxag1YUDj1W8boR4T0WIK+dJ4ZBdRKsFZhFtkuIP0+EI2NzFgS9Rk2tWpiCb5W 06mIytL4LFkliUmlECQIMup+Dgx8z9AkwxTPhE1or/CtYw5xw4JKOG3Gf8M5FX+g LNEZzQ4227TFioztmBNHkQ0Ht1wE/wD5Jw8i8qy87SwTvOEEX8abmQ2hRSXzJAo0 QRqfSE2WIZzA6cV4IGuud/GeeDDm7jKmz3SxzMkAMjin0tkf2OxkoicQeJUxxEXx J71wSYuZuQPrW/QjD10QbdClgAjB9sdiCWYnRljoKxJttq0ro4qxEPLm0ovKiyb/ KIhqz8sGoJ20CPKcGmki7eF9f8A3uLYzn7q6+fzYvd31QbDSbA4aOuyzCVqgFM/5 eoitbk3jrNmxbeGNqWopf9cJqgRpiiid3U9GzhFctj07+u/zY4buVlnH8fcVtug5 2wQR4po996ul0+E5hpnk8OPBZ6Be76/no8nyaxJiajqpGbFqsrQ= =vioZ -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmQ5eCIACgkQYKtH/8kJ UifNLg/+Mu/sNCH2A0pIjolcR7Umn0Uvx9frZiusZdACa4+hA2N8EVj1NV3MW4z3 SvcwWy+ALDy6CjYzBbMFQYrVpu46TEjBvDNMgh4VA73bVemJg5F8WXoFRv6IaXXT XUzJVm5GbPbCkLXHemxs+MEgHanNAqHZfGRN+hMxaKy9kxqrxZq60IYIw90t1eJk NH/QbPcq0ck3WHwaVZluxCGCdb+ApiL5uHbsKfrDDcG6iUgu0LBw8moseb0e2tJp HJhNTYaFC7VLsx+IUD3zBUtMyVNT28A3hwfuqRDZ7ceVWOXd4Qu7ESJ9g/GaW33T RgdC6rnEWhKYVXEgN2x8KR3aMymwzwKGKgWTlNldImWyVkIUhWCkMJ7uUU69oyCS 3z4D2jAMIZE80vCWPH+oORcCGOk8tn+KX1IK0kfEzgrRaBpCHvHvTUVs/b7RDHAi MBr4FETixQXh49wmT4BvdKz1MsA9gKw2JZ0jYnO99uNLttMdRlwpO+4ZDP4uI4Jk 2TPILd4lGnyW5NcXc8muvDtPaooZO1l/8TIMThmfH9ITNPWD6jIhCa3VeJ6ntXSA nXrAew9ZBKGQcJ4NFSXq2H8rP6aeBLUtmotPqx+PlW5w6Um7PjuRdcx0xPyvcKrh t4v/o8KjPrLAQhAEg7PvmJA8bZqiZxvr2OBnJjRPMR58FKPThAo= =4E45 -----END PGP SIGNATURE----- Merge tag 'arm-soc/for-6.4/devicetree-arm64' of https://github.com/Broadcom/stblinux into soc/dt This pull request contains Broadcom ARM64-based SoCs Device Tree changes for 6.4, please pull the following: - Rob fixes the GICv3 ITS node name for the Stingray platforms - William adds the new-style High Speed SPI controller nodes to the BCA SocS - Rafal fixes the NAND controller interrupt name for BCM4908, LED node(s) and procmon for BCM4908. He also adds support for the USB ports, and declares USB triggered LEDs for the Netgear R8000P and TP-Link C2300. * tag 'arm-soc/for-6.4/devicetree-arm64' of https://github.com/Broadcom/stblinux: arm64: dts: broadcom: bcmbca: bcm4908: add TP-Link C2300 USB LED triggers arm64: dts: broadcom: bcmbca: bcm4908: add Netgear R8000P USB LED triggers arm64: dts: broadcom: bcmbca: bcm4908: add on-SoC USB ports arm64: dts: broadcom: bcmbca: bcm4908: fix procmon nodename arm64: dts: broadcom: bcmbca: bcm4908: fix LED nodenames arm64: dts: broadcom: bcmbca: bcm4908: fix NAND interrupt name arm64: dts: broadcom: bcmbca: Add spi controller node arm64: dts: broadcom: stringray: Fix GICv3 ITS node name Link: https://lore.kernel.org/r/20230410232606.1917803-2-f.fainelli@gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Arnd Bergmann
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0b3751dc8d |
This pull request contains Broadcom ARM-based SoCs Device Tree changes
for 6.4, please pull the following: - William adds the new-style High Speed SPI controller node to the BCA SoCs -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEm+Rq3+YGJdiR9yuFh9CWnEQHBwQFAmQ0mX8ACgkQh9CWnEQH BwQhjhAAyHMwI6uMjnEHf150ggtuckE2Lijz74c0O1RmcINL+fQiiEVWLjO2ongv n+hNfndWynGjxBpkj2JSwUaSKTuxJMGqb6k5ky1O8+DQUpagKArXMRXkwU4V/ZAk KU2JtQ0MA0ACzBKJh4uIftKsYwZ84tdHjNX+gUvex8qp0TBNNj+3bvPs/zcoY7NB BHpigD7NAPlnKcUEzSlIYcief+az2KMl/d5+UKIE8nXh+DPju1PHsxLxQK9UOuSN kmJ9l/yjSHu5eyZFtUIkkT5DybBtWs73T9lN7QPp2AP/caxsJFInlBaHTQKRGdQa 9Sln6cGxPMvwHYFDLXplX8vNprad5g1ErR0dJhb/6PhAUY7DnnhEysPs+odhSKgD BUHIkwDTR7xGhTe/7SfCFvxF2xXCAgS+cakCPv+s0+1DAR4MQW4DIsKHLsmEmOlI AeIA67TGxBmfihH1lioUC2YVaEtSntScJ+Kf6WRF/bcCcylSAKYAa3PdCZ9ZOAbL enJXV0X0+UihSTPMzdBFncHfRR7hNaCR7PP7pBb65i8mvI9WSERHGmdC+/FkQDMY X/CJBH28vm+aAFkei2ZxXjb6ZGRE+n/8oTUP+pqs1S93k3IET8a7DG7BGIEYIcy3 6UCYj1rvc7WhSTxzRxqhevDVzIQCm/X2x6qzcWVbgRdDQnRrCEs= =H9IN -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmQ5eAIACgkQYKtH/8kJ UifB9hAAiTgIFHleb4uzY4ahUVMl9vhMlpDepRqh57T+WjCyKFTu0ybMzV6BWMTQ glMlBm1xAO7h9L9WMnoIrCLqjuyCifob6Q9/126KuKhbwqzpVxUStvxnhOzHlv1K 54K+LS5gl2CKNkpdBQFGCdPsWvL2ICCc6DUS1DUuY+8zZKwGG73JLqeodAt1Juhr UCWb2qewAWRi16h9L9ZGTrsOF90k3hDAenT77YGLnCBwOn0N3umO+lGXtqd+PJ4B FkLnv0sEC4bsJbp9rxfg7zGZdgdFznT0257SmloYmhWCdWa5+DuKIOZ6Lblh9QCi 22M+iM9vM2K99XfDo0Kr9GDL9Dcf2e4Ly2on3RZUVT5o+C7bmt4C9JGCCxlR5SJG Swne3l2tfExHkPS3SZyKjHKuv68Mj055HBldBVedktX0ZmalFnT0HitVqTflx4+j HWbRaPL0YXd7lN2rdfudbUtwGrrLjvPr/UhDGHfRR9jsHX6b0UdVQbdRatfzdAiO sWo0bGlbNZYP8IPK3/OlQyhJdVZlXKUIx6ZGISWYyLR0jrRDbnYVhs1a72SJfC/e Hxn3iQOI/vDw5+wcOz0oYhojKHgN/SSR9WwES9tSpyp6aKbRzKSGiADihAIx3psU aKVgZeLYZGzABza6zgoE/0U2Sa8mChDkkzF2FnFLUtXz4Q/eZFs= =HvvQ -----END PGP SIGNATURE----- Merge tag 'arm-soc/for-6.4/devicetree' of https://github.com/Broadcom/stblinux into soc/dt This pull request contains Broadcom ARM-based SoCs Device Tree changes for 6.4, please pull the following: - William adds the new-style High Speed SPI controller node to the BCA SoCs * tag 'arm-soc/for-6.4/devicetree' of https://github.com/Broadcom/stblinux: ARM: dts: broadcom: bcmbca: Add spi controller node Link: https://lore.kernel.org/r/20230410232606.1917803-1-f.fainelli@gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Fabio Estevam
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325ae154b4 |
ARM: dts: nomadik: Replace deprecated spi-gpio properties
As stated in Documentation/devicetree/bindings/spi/spi-gpio.yaml, 'gpio-mosi' and 'gpio-sck' are deprecated properties. Use the recommeded 'mosi-gpios' and 'sck-gpios' instead. Signed-off-by: Fabio Estevam <festevam@denx.de> Link: https://lore.kernel.org/r/20230407162504.1683422-1-festevam@gmail.com Signed-off-by: Linus Walleij <linus.walleij@linaro.org> Link: https://lore.kernel.org/r/20230410220300.2431524-1-linus.walleij@linaro.org Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Arnd Bergmann
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10678a0751 |
Qualcomm ARM64 updates for v6.4
PCI I/O and MEM ranges are corrected across all targets with PCIe enabled. Likewise is CPU clocks defined to be provided from CPUfreq for a wide range of platforms, to satisfy the OPP definitions, and LLCC bank information is corrected for all relevant platforms. IPQ5332 gains SMEM, CPUfreq and support for triggering download mode. The MI01.2 board is introduced. On MSM8916 WCN compatibles are moved to be defined per board, to avoid issues when boards rely on the incorrect defaults. Support for Yiming UZ801 4G modem stick is introduced. XO clock is defined and fed to RPMCC on MSM8953 and MSM8976, to ensure clock trees are properly rooted. DSI clocks feeding into gcc are described on MSM8953. On MSM8996 the external audio components are moved from the SoC dtsi. A few DWC3 quirks are added. On MSM8998 GPIO names are introduced for Sony Xperia XZ Premium, XZ1 and XZ1 Compact. A numbe of boards have GPIO keys properly marked as wakeup-source. The SA8775P platform is extended with CPUfreq, UARTs, I2C controllers, SPI controllers, SPMI and PMICs, PDC support. The associated PMICs gains reset and power key support, as well as thermal zones defined. Nodes are sorted. On top of this the SA8775P Ride board/platform is introduced. On SC7180 and SC7280 a range of fixes coming from DeviceTree validation are introduced, some clearing up unused properties, others correcting errors. A number of Google rev0 boards on SC7180 are dropped, as these are not considered to be in use by anyone anymore. On SC8280XP RTC support is introduced and enabled for the CRD and Lenovo Thinkpad X13s. It gains another UART, upon which Bluetooth is enabled on the Lenovo ThinkPad X13s. The touchpad definition is altered to attempt to probe both devices seen in the wild. A number of bug fixes are also introduced, and the regulator definitions on X13s are corrected. On SDM845 dynamic power coefficients are improved. BWMON compatible is corrected. Xiaomi Pocophone F1 gains notification LED. Sony Xperia XZ2, XZ2 Compact and XZ3 gains display, touchscreen, gpu and remoteproc support. OnePlus 6 and 6T gains hall sensor. GPU clock controller and remoteproc nodes are added for SM6115. CPU clock are defined to come from CPUfreq. Board-specific USB-properties are moved out of the SoC dtsi. On SM6375 L3 scaling, IMEM, RMTFS, RPM sleep stats, Tsens, modem remoteproc and WiFi nodes are added. Tsens thermal zones are defined and additional low power states are defined. Sony Xperia 10 IV gains volume down key support. On SM8150 another UART is introduced, to be used by GNSS on the SA8155 ADP. Support for the Flash LED block in PM8150L is added. On SM8250 TPDM MM and PRNG is defined, MHI region is added to PCIe node. A few bug fixes are introduced after Devicetree validation. The DisplayPort controller on both SM8350 and SM8450 is defined and the related QMP instance is transitioned to the USB3/DP combo variant. IMEM and PIL info is introduced, for post mortem debugging of remoteprocs. On the HDK PMIC GLINK is enabled and role switch is enabled. Some audio resources are corrected. A typo in the USB role property of the Microsoft Surface is corrected, thanks to DeviceTree validation. PCIe controllers and PHYs descriptions are corrected, and pinctrl state definitions are moved from the soc to the board definition. BWMON compatibles are corrected. PM8550B gains the definition of the eUSB2 repeater and this is enabled on the MTP. PMIC GLINK is also defined for the MTP and connected to DWC3, for role switching support. In addition to this, a range of cleanups based on Devicetree validation is introduced. A few clock bindings are introduced, from topic-branches shared with the clock tree, to aid introduction of references to these. -----BEGIN PGP SIGNATURE----- iQJJBAABCAAzFiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmQ0QQEVHGFuZGVyc3Nv bkBrZXJuZWwub3JnAAoJEAsfOT8Nma3F3WgQALGaxeK2rYNfVVR8YMrsjDYow2vq Uup1AxG2sAGdLBiegf0btiIlw6y+t7pdUuP+elKx3sLrx/UiJfa7/fqdMhfft3Qo 16xhKIHQwokgGyl6hFJg2WTLrbC/qq60rB2YP/aR3pBCovu1nL/jX/9de28jNXUe FydCDCAfa1Zd3fDdp0uqGWA9mCSDDnlL0UuiP7PIkUFEEkPHdif/a3H1O5y1S+LW Eq38bJeMoQUYOYx4hYTxzmkCjbZVFEhho2lVyfHLy2fIaGuA4Gm4THnXMu5P9vIL Q4dNR6/XnquH2G9LcDLIcPWkWg8KkFDNnRQBkIkNZQAUqqY2klY/8sa0aZZJk53f KD393N/aWUV7tGYynLLc5oluoKLIlFFMdWVdxxR36zP70hu6Q2kGj4NUIB+odMdS QgJIyBBJ2dafvB5llXGaUXMOFYJYolcoss0EWfCU5jCg2XhxC8Q6mvpF1vAuCTTZ aueb0RlXxzdTcCy0jkqCl1GsBOuQONtAOnQ8nRE+8ookzLGJ8RBnoUmWUifzxnqe ueYdGPu2nnmqrbYAJqzr1Y9G7ImsX0V72iwC0wFFL8woZzDPGgEcDIyOaGCI3Hus P3weJ9WScj6ScRvRTI4EdZL03oaPPsF8zMA8xyXoCzeWtp3wsrtFNbVqAZSEvcAq a92owWcK+flh9Ckj =ZyN2 -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmQ5d90ACgkQYKtH/8kJ UifbkRAA0tH8h0ehQRsfgaijE+KNM5IOwi7iszD7NObNG+5Nal5QO6H9CvrEEbgv 4c6qwkC7F+ZN+zTVeKTufqZ6/zkylW+AMzL4UuAl5BxhMMrWzsg1NR1+NlbKssEb EBbLll7uxohuK79JNjmor/VV+zJX+hOyAhsf6yo6gpYFiJdgrRGwWVFVflNTNQis mpw5U4SyFNo4lq/HDERuxWbbsTl+VmoCeezCRgolaVkq4RTeMNcIxbm/kJ+t9ela HNm6mpJWqUUGeNpos5VdCqLApxBQgYmwz1mPHTQfC0V9v8YlVnTTKVmw4lHoGnZp ADN7iQSqqpsOLjML3+7HfQ8FWTTpj6FbE+vcSTiLjnstv9oDYd2wf9FPzJqcDVTl MucZVPk75zutakDuHOxizdfSTXPnpyEXnpnEUla6E+BntkB5eCTz45NN9B35gowA fY437FQ95eY2mV2vpya91rH2Rtw5BJbZW6jsw+WxT29A67LBa+sJrTayDNzYLuUz GjSb2vmRr2r3WG1jy8QQxVC3R/t4rlqXBnmJ91nHNIgrGl5ExrIEt+IDRsqHlS7T V1xX4fl9Ge2zfZeoFPFhgIBpPtvEkW5mUKIjRX6EBvRnG9+T8CWuWSnJDuFa6AMZ kxAhqUojmDO8f1E/BPiHHCP31dfUrMOVor0fu9qu7o8/H/WPo04= =OcHF -----END PGP SIGNATURE----- Merge tag 'qcom-arm64-for-6.4' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/dt Qualcomm ARM64 updates for v6.4 PCI I/O and MEM ranges are corrected across all targets with PCIe enabled. Likewise is CPU clocks defined to be provided from CPUfreq for a wide range of platforms, to satisfy the OPP definitions, and LLCC bank information is corrected for all relevant platforms. IPQ5332 gains SMEM, CPUfreq and support for triggering download mode. The MI01.2 board is introduced. On MSM8916 WCN compatibles are moved to be defined per board, to avoid issues when boards rely on the incorrect defaults. Support for Yiming UZ801 4G modem stick is introduced. XO clock is defined and fed to RPMCC on MSM8953 and MSM8976, to ensure clock trees are properly rooted. DSI clocks feeding into gcc are described on MSM8953. On MSM8996 the external audio components are moved from the SoC dtsi. A few DWC3 quirks are added. On MSM8998 GPIO names are introduced for Sony Xperia XZ Premium, XZ1 and XZ1 Compact. A numbe of boards have GPIO keys properly marked as wakeup-source. The SA8775P platform is extended with CPUfreq, UARTs, I2C controllers, SPI controllers, SPMI and PMICs, PDC support. The associated PMICs gains reset and power key support, as well as thermal zones defined. Nodes are sorted. On top of this the SA8775P Ride board/platform is introduced. On SC7180 and SC7280 a range of fixes coming from DeviceTree validation are introduced, some clearing up unused properties, others correcting errors. A number of Google rev0 boards on SC7180 are dropped, as these are not considered to be in use by anyone anymore. On SC8280XP RTC support is introduced and enabled for the CRD and Lenovo Thinkpad X13s. It gains another UART, upon which Bluetooth is enabled on the Lenovo ThinkPad X13s. The touchpad definition is altered to attempt to probe both devices seen in the wild. A number of bug fixes are also introduced, and the regulator definitions on X13s are corrected. On SDM845 dynamic power coefficients are improved. BWMON compatible is corrected. Xiaomi Pocophone F1 gains notification LED. Sony Xperia XZ2, XZ2 Compact and XZ3 gains display, touchscreen, gpu and remoteproc support. OnePlus 6 and 6T gains hall sensor. GPU clock controller and remoteproc nodes are added for SM6115. CPU clock are defined to come from CPUfreq. Board-specific USB-properties are moved out of the SoC dtsi. On SM6375 L3 scaling, IMEM, RMTFS, RPM sleep stats, Tsens, modem remoteproc and WiFi nodes are added. Tsens thermal zones are defined and additional low power states are defined. Sony Xperia 10 IV gains volume down key support. On SM8150 another UART is introduced, to be used by GNSS on the SA8155 ADP. Support for the Flash LED block in PM8150L is added. On SM8250 TPDM MM and PRNG is defined, MHI region is added to PCIe node. A few bug fixes are introduced after Devicetree validation. The DisplayPort controller on both SM8350 and SM8450 is defined and the related QMP instance is transitioned to the USB3/DP combo variant. IMEM and PIL info is introduced, for post mortem debugging of remoteprocs. On the HDK PMIC GLINK is enabled and role switch is enabled. Some audio resources are corrected. A typo in the USB role property of the Microsoft Surface is corrected, thanks to DeviceTree validation. PCIe controllers and PHYs descriptions are corrected, and pinctrl state definitions are moved from the soc to the board definition. BWMON compatibles are corrected. PM8550B gains the definition of the eUSB2 repeater and this is enabled on the MTP. PMIC GLINK is also defined for the MTP and connected to DWC3, for role switching support. In addition to this, a range of cleanups based on Devicetree validation is introduced. A few clock bindings are introduced, from topic-branches shared with the clock tree, to aid introduction of references to these. * tag 'qcom-arm64-for-6.4' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (256 commits) arm64: dts: qcom: sc8280xp-x13s: Add bluetooth arm64: dts: qcom: sc8280xp: Define uart2 arm64: dts: qcom: sc8280xp: Add "mhi" region to the PCIe nodes arm64: dts: qcom: sm8250: Add "mhi" region to the PCIe nodes arm64: dts: qcom: sdm845: Add "mhi" region to the PCIe nodes arm64: dts: qcom: sa8775p-ride: set gpio-line-names for PMIC GPIOs arm64: dts: qcom: sa8775p: add PMIC GPIO controller nodes arm64: dts: qcom: sa8775p: pmic: add thermal zones arm64: dts: qcom: sa8775p: pmic: add support for the pmm8654 RESIN input arm64: dts: qcom: sa8775p: pmic: add the power key arm64: dts: qcom: sa8775p: add the Power On device node arm64: dts: qcom: sa8775p: add support for the on-board PMICs arm64: dts: qcom: sa8775p: add the spmi node arm64: dts: qcom: sa8775p: add the pdc node arm64: dts: qcom: sa8775p: sort soc nodes by reg property arm64: dts: qcom: sa8775p: pad reg properties to 8 digits arm64: dts: qcom: sc8280xp: correct Soundwire wakeup interrupt name arm64: dts: qcom: sdm845-tama: Enable GPI_DMA0/1 arm64: dts: qcom: sdm845-tama: Enable GPU arm64: dts: qcom: sdm845-tama: Enable remoteprocs ... Link: https://lore.kernel.org/r/20230410170233.5931-1-andersson@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
||
Lucas De Marchi
|
adfbae9ffe |
drm/i915/gt: Avoid out-of-bounds access when loading HuC
When HuC is loaded by GSC, there is no header definition for the kernel
to look at and firmware is just handed to GSC. However when reading the
version, it should still check the size of the blob to guarantee it's not
incurring into out-of-bounds array access.
If firmware is smaller than expected, the following message is now
printed:
# echo boom > /lib/firmware/i915/dg2_huc_gsc.bin
# dmesg | grep -i huc
[drm] GT0: HuC firmware i915/dg2_huc_gsc.bin: invalid size: 5 < 184
[drm] *ERROR* GT0: HuC firmware i915/dg2_huc_gsc.bin: fetch failed -ENODATA
...
Even without this change the size, header and signature are still
checked by GSC when loading, so this only avoids the out-of-bounds array
access.
Fixes:
|
||
|
Arnd Bergmann
|
a8127d2aae |
Qualcomm ARM32 DeviceTree updates for v6.4
stdout-path is defined for the ALFA Network AP120C-AC, to avoid the need to pass this information on the kernel commandline. Ath10k is wired up to read calibration data from the "ART" partition. PCI I/O port ranges are fixed on IPQ4019 and IPQ8064. Supply clocks are defined for KPSS L2CC and ACC clock controllers. Supply clocks for the global clock controller are being specified on IPQ4019, MSM8974 and MSM8226. PCIe RC support is enabled on the SDX55 T55 development board, IPA is defined for the SDX55 and a number of cleanup patches are introduced. Compatibles for QRB2210/QCM2290, IPQ9574, QRD8550 and IPQ5332 platforms are added, and the RB1, Yiming LTE dongle, Xiaomi Mi A3, MI01.2 and MI01.6 boards. -----BEGIN PGP SIGNATURE----- iQJJBAABCAAzFiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmQ0MIQVHGFuZGVyc3Nv bkBrZXJuZWwub3JnAAoJEAsfOT8Nma3F64sQALPbH9x9FBLHt28OCiYPT9Q7gUZ0 aIg46Xe37HJYlZVPf2KsgrXxN3uOl3l+KzzVmmFeCajqrZA96pRxVWI5Jvn9mXaE Q1TVNohGfXKFK4u4/QjjS8ItJLzRyKqHSI6kIiia1pOd132jkHszn1x0pXdJVldk p0Ep5jQ6Ugf9SMBtLtcklhS/FmpCP1fjgS/LYWoTT7GvTDO0uhmNFZL6gZGPj8BD u8JVy0cstIGpuWS4zwtinYCck5KhzOEiQ13vQ++bUmc9Kodn+jH/ldu74LBO0X2Q R2hLrt7+xIcM2E77fRtfEXijQvqbx4vQ/oUMGzoBAg2mHPsl6mX4J+vFhKh0ryEu IeOJ0LWCaH4ibqE+kWaIz5IeVLEnYb9g1cySbzDcO4fT+zJlsgOsaY5fwv4q/kjE 5N+ZKcXgoFD0/p1vCBSj/vukjmPpZ0/520unJzx4AE7DwwHSJNxt2bqhqLDl9yoN qRG2V8+/tlDCjrXiyLizezdDqOJzVFdmBxHkTdg8JtjY7167FumYboyIDyvM1/zl HUmL999+/isouHBUYvt8AI3G3P/MyXuthRDR43wnbtrG1vn5ynCclUo9f6S/BUBt t+kuXEONdaBDrTUxSfChA1YyzCIRj4h+RXSiC0jzWTHrW7jUZU9JHxynRhyG4Ug7 /TK2FC7BZzClbDZf =YUEe -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmQ5dvYACgkQYKtH/8kJ UidHcA/9G4j2JoYN/Vx5zGiFhwvgzdG5x1UX/ZzkBK3Hboe2Z3U1imE4zdroEpV6 qp4jp/vmahmKZTIn5AZjQBzsg/l1bM81lQXS4lhA0d+RTvjxIvTrCL7M/CHzxTNz QJGnhE0PeQ7m5Dqj2i/Tyy/2UXJjwb3qCIV2EynWhAay6qhE/QDTuNl/Wuh2xNn/ wEgpyAUtCgYoyqCK7jqo5TA40CzKAO8girNep1HOToaHOoUs4u8uKCqlGUGBgDoE ZMdGd+LSBEM95oVY9A0TSCbgziBPZpnxciMcIDv7vKjlPls4rTmYLCb6QlqxjYfO CTcE4+kDjLVDcO/pbA5FTSo5oIPSLxIuntQJqUIQkYmTSZ0qDHC1ghQkJ0guGT1G gr4E6u74jr6xJHXK4bcnpfgXN6d03DpR6LtVoBm1XoswyvpDT6aW2Q/NQPIl2c7P R2S07is5k3Q3A5Oo5kaQJMbAKvddLuF9K8Kdo9a+6DYJU2qWbJDVorfMKYeRwKTt 8zWgR3wpPNjzFLAf85qyVq/F8zWlVkbadVwMVj9edx6A/TK/LSZX+0VFfy/TpDnC Tx2AZdyMHL6SC96OXjRCZjsh+ttgVzdgZ2VYfpSe+d5Vf2okAs5cCezfDayL9Bik 9DuTM6kq2uCAdF4udN3K7462ZeWxlfs2AHZWtcWNrrLv4riMuek= =a7tv -----END PGP SIGNATURE----- Merge tag 'qcom-dts-for-6.4' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/dt Qualcomm ARM32 DeviceTree updates for v6.4 stdout-path is defined for the ALFA Network AP120C-AC, to avoid the need to pass this information on the kernel commandline. Ath10k is wired up to read calibration data from the "ART" partition. PCI I/O port ranges are fixed on IPQ4019 and IPQ8064. Supply clocks are defined for KPSS L2CC and ACC clock controllers. Supply clocks for the global clock controller are being specified on IPQ4019, MSM8974 and MSM8226. PCIe RC support is enabled on the SDX55 T55 development board, IPA is defined for the SDX55 and a number of cleanup patches are introduced. Compatibles for QRB2210/QCM2290, IPQ9574, QRD8550 and IPQ5332 platforms are added, and the RB1, Yiming LTE dongle, Xiaomi Mi A3, MI01.2 and MI01.6 boards. * tag 'qcom-dts-for-6.4' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (28 commits) dt-bindings: arm: qcom: Add Yiming LTE dongle uz801-v3.0 (yiming-uz801v3) dt-bindings: vendor-prefixes: Add Henan Yiming Technology Co., Ltd. ARM: dts: qcom: sdx55: add dedicated SDX55 TCSR compatible ARM: dts: qcom: sdx55-t55: Move "status" property down ARM: dts: qcom: sdx55-t55: Enable PCIe RC support ARM: dts: qcom: sdx55: List the property values vertically ARM: dts: qcom: sdx55: Add support for PCIe RC controller ARM: dts: qcom: sdx55: Rename pcie0_{phy/lane} to pcie_{phy/lane} ARM: dts: qcom: sdx55: Fix the unit address of PCIe EP node ARM: dts: qcom: ipq8064: Fix the PCI I/O port range ARM: dts: qcom: ipq4019: Fix the PCI I/O port range ARM: dts: qcom: apq8064: Use 0x prefix for the PCI I/O and MEM ranges dt-bindings: arm: qcom: Add ipq9574 compatible ARM: dts: qcom: msm8974: add correct XO clock source to GCC node ARM: dts: qcom: msm8226: add clocks and clock-names to GCC node ARM: dts: qcom: rename kpss-acc-v2 nodes to power-manager nodes ARM: dts: qcom: add missing clock configuration for kpss-acc-v1 ARM: dts: qcom: add and fix clock configuration for kpss-gcc nodes ARM: dts: qcom: add per SoC compatible for qcom,kpss-gcc nodes dt-bindings: qcom: add ipq5332 boards ... Link: https://lore.kernel.org/r/20230410155226.5127-1-andersson@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
||
|
Arnd Bergmann
|
c47b89b418 |
TI K3 device tree updates for v6.4
New features: * Overlays for CPSW9G and CPSW5G on J721e-evm, J7200-evm * Add support for AM625 based BeaglePlay, AM62-LP-SK * Audio, RTC, watchdog support for AM625 * McSPI for J7200,j721e, j721s2, J784s4 * ADC for j721s2 * Crypto acceleration, CPSW2G for J784s4 Non critical fixes: AM62, AM62a: * Fix schematics error to increase DDR to 4GB on AM62a-SK * L2Cache size fix (AM62a/AM625) * ti,vbus-divider property to USB1 on AM625-SK * Gpio count fix for AM625 J7200,j721e, j721s2, J784s4, AM68, AM69: * ti,sci-dev-id for J784s4 NAVSS nodes * j721e-sk: Drop application specific firmware name * am68-sk: Fix the gpio expander lines for production version Cleanups: * Pinmux header move to dt folder (next kernel PR, we will drop the uapi header). * j721e: ti,strobe-sel property cleanup for descoped HS400 MMC operation -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEE+KKGk1TrgjIXoxo03bWEnRc2JJ0FAmQ0EJgACgkQ3bWEnRc2 JJ0SYRAApVR/RAGWBrYYAQ8oN+kIDaep3mHPtRMPtVwKyK0SU5FQZM7PWok2wdpH h0gw+1S4kZKcZsrz7153TzZHUNHtJ+TEG1g+EIhJh2OSV0SnqUOWucTS9nkt7MPs DvzbrF8RL9xCEi0dUtpBT+YEx0HF5AijkvjHWKBYI/XcbxmqrrQZ34wJxUR7qsFC nO8gADcQZjp14ZwP3b4Ag6jLMez2ERqZ3tM/if9WOlvpkQ3eI9e6Gjq5inMPjzNm gjqvN1gyWDi3pbG7Y+jrs/O26atnOTRAHUKww460x15nNi6a3qU1jN4awlBtANla UTu7CSuG1I6HWQaR2bGlWgkKxNOJAcfqtiCtMHsInYy7yDlwczC1KwWSFWdGxNoF 6yelo+X4oJhiQOqhVQdHpyCiT4HoyEWaS1tsXcke16N8X0fjdTWIq1deqXp5vLdE ne5FYQK1y+HyGJJGeDddbV9zuUQby9KoziB+N/VHWgDjUGWbrdmSEA6C3BNcF5+4 X6wd0NQPMc9sFVR5s3zGXrtozVMlkMuozCYlPVtaHDtNkGftGIq0KrsjQVIKiYwb GinjS8eM63p0PGiZRBf+49EkH/yC82svSM/XepEFUyvUPwYdm43zVUVz6tNqv3RT ms9wnzJpgRd+TcPn1xr5QojFxsnZjGr/Hb6mvbcU5S1OQfgkqZo= =zvF1 -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmQ5dgAACgkQYKtH/8kJ UieM1g//bYhlrB3jwoecovyxOocd85EnfP1ykwXvGVjF+UvHujfcH7ExZaCg3Km3 RQbMVLwynhGRBvys1YwPRh09FjOSKoZwpyly0ROFCP9Sc6QJLjtzb7zVAo7U3A5K rVZ/ZeG3/OLqB3l5ZaJS6zVJppnvm3R0CtVlRO9oD/XUdKhRDQPCaXZyD3oaMCjY bXNs1y/giESPCzwnR8qVvVHGQ6JoMtnznff1zgodYvuo9+e3xSIpTZvbRY1Aguc1 QbcaRISNqOpGsZHrUlw+PrPlIYQYb1osOq81R4g6NX3/J+UN9kz+uTb7f1xtrt+W tGbvVRQHNiRXHOC5fUGwxfcV3+M6YUKpCiap/l1brcchfeHb0La1+BN0dRMgybQf EG27jfHbAAEA8L7b1gutAY3yNfhJPvahWT/wQ0L4xhu33KpRSNwHBSkg6qXAFi1u aPWfRwm3bGpVoHltTVKdULqZb+bYKY/w8GfipbvCpI2LvX8MJrsFSxqFcSw1vgB7 iNYebbVUI+e/UUTEeKYE4ct98vezbGNBTxFcsPgVQL5UHAkYrzXHet3WuDP73hEz w+01eIaDA8R1TnpgTX4doqgEj6illiv6WY2EUwoJzBGc76UVOQf2eraimWGp1Vtr mh8tlfjnErTv+iMPcBO8bjvBXDhQcb4iBN+5q8KkVvqtOtcSsjA= =3wzd -----END PGP SIGNATURE----- Merge tag 'ti-k3-dt-for-v6.4' of git://git.kernel.org/pub/scm/linux/kernel/git/ti/linux into soc/dt TI K3 device tree updates for v6.4 New features: * Overlays for CPSW9G and CPSW5G on J721e-evm, J7200-evm * Add support for AM625 based BeaglePlay, AM62-LP-SK * Audio, RTC, watchdog support for AM625 * McSPI for J7200,j721e, j721s2, J784s4 * ADC for j721s2 * Crypto acceleration, CPSW2G for J784s4 Non critical fixes: AM62, AM62a: * Fix schematics error to increase DDR to 4GB on AM62a-SK * L2Cache size fix (AM62a/AM625) * ti,vbus-divider property to USB1 on AM625-SK * Gpio count fix for AM625 J7200,j721e, j721s2, J784s4, AM68, AM69: * ti,sci-dev-id for J784s4 NAVSS nodes * j721e-sk: Drop application specific firmware name * am68-sk: Fix the gpio expander lines for production version Cleanups: * Pinmux header move to dt folder (next kernel PR, we will drop the uapi header). * j721e: ti,strobe-sel property cleanup for descoped HS400 MMC operation * tag 'ti-k3-dt-for-v6.4' of git://git.kernel.org/pub/scm/linux/kernel/git/ti/linux: (34 commits) arm64: dts: ti: k3-j784s4-evm: Add eMMC mmc0 support arm64: dts: ti: Enable audio on SK-AM62(-LP) arm64: dts: ti: k3-am62-main: Add McASP nodes arm64: dts: ti: k3-j784s4: Add MCSPI nodes arm64: dts: ti: k3-j721s2: Add MCSPI nodes arm64: dts: ti: k3-j7200: Add MCSPI nodes arm64: dts: ti: k3-j721e: Add MCSPI nodes arm64: ti: dts: Add support for AM62x LP SK arm64: dts: ti: Refractor AM625 SK dts dt-bindings: arm: ti: k3: Add compatible for AM62x LP SK arm64: dts: ti: k3-am625-sk: Add ti,vbus-divider property to usbss1 arm64: dts: ti: k3-am68-sk-base-board: Update IO EXP GPIO lines for Rev E2 arm64: dts: ti: Add k3-am625-beagleplay dt-bindings: arm: ti: Add BeaglePlay arm64: dts: ti: k3-j7200: Add overlay to enable CPSW5G ports in QSGMII mode arm64: dts: ti: j7200-main: Add CPSW5G nodes arm64: dts: ti: k3-j721e: Add overlay to enable CPSW9G ports in QSGMII mode arm64: dts: ti: k3-j721e: Add CPSW9G nodes arm64: dts: ti: k3-j784s4-evm: Enable MCU CPSW2G arm64: dts: ti: k3-j721s2-common-proc-board: Add pinmux information for ADC ... Link: https://lore.kernel.org/r/20230410140521.3u3fftgnejakqnzj@shakable Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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|
Arnd Bergmann
|
17e26de12a |
Renesas DTS updates for v6.4 (take two)
- Add PWM support for the R-Car H1 and H2 SoCs,
- Add slide switch and I2C support for the Marzen development board,
- Add SCI (serial) and Camera support for the RZ/G2L SoC and the
RZ/G2L SMARC EVK development board,
- Add IOMMU support for the R-Car V4H SoC,
- Miscellaneous fixes and improvements.
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Merge tag 'renesas-dts-for-v6.4-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into soc/dt
Renesas DTS updates for v6.4 (take two)
- Add PWM support for the R-Car H1 and H2 SoCs,
- Add slide switch and I2C support for the Marzen development board,
- Add SCI (serial) and Camera support for the RZ/G2L SoC and the
RZ/G2L SMARC EVK development board,
- Add IOMMU support for the R-Car V4H SoC,
- Miscellaneous fixes and improvements.
* tag 'renesas-dts-for-v6.4-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
arm64: dts: renesas: r8a779a0: Revise renesas,ipmmu-main
arm64: dts: renesas: falcon-csi-dsi: Set bus-type for MAX96712
arm64: dts: renesas: r8a779g0: Add iommus to MMC node
arm64: dts: renesas: r8a779g0: Add iommus to DMAC nodes
arm64: dts: renesas: r8a779g0: Add IPMMU nodes
arm64: dts: renesas: r8a779f0: Revise renesas,ipmmu-main
arm64: dts: renesas: rzg2l-smarc: Enable CRU, CSI support
arm64: dts: renesas: r9a07g044: Add CSI and CRU nodes
arm64: dts: renesas: r9a07g044: Enable SCI0 using DT overlay
ARM: dts: r8a7790: Add PWM device nodes
ARM: dts: r8a7790: Add TPU device node
ARM: dts: marzen: Enable I2C support
ARM: dts: marzen: Add slide switches
ARM: dts: r8a7779: Add PWM support
dt-bindings: clock: r8a7779: Add PWM module clock
arm64: dts: renesas: rzg2l: Add clock-names and reset-names to DMAC nodes
Link: https://lore.kernel.org/r/cover.1681113117.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
|
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Arnd Bergmann
|
2925732f0c |
MMC-aliases for rk3288-veyron devices and some dts node adaptions
for yaml conversions recently merged into the drm tree. -----BEGIN PGP SIGNATURE----- iQFEBAABCAAuFiEE7v+35S2Q1vLNA3Lx86Z5yZzRHYEFAmQyBQEQHGhlaWtvQHNu dGVjaC5kZQAKCRDzpnnJnNEdgQ0XB/9l5539KSxSHBmaPjBmFHaPpjthBHR4SzVp /xaa7ReOYJWpe4gT2u73S1PQQdGub84TD6x00ImIwJoUlbAKE656skgqDe4dkzMb WN29KFBYaFZ2vAyvgM4RTDfNtadyrQeW9PO8ZDQAJ5Ys4E9bfz5U5oy1f3MyTQ5I wmYOPTdtFGrzJeRmYa5o2fiHdj/FBUc0G5Vvg0qwIKaDR1NkhmrNXcwlpK/uP6QB +o2icz61jvFMIdBgv9G7AApofIp9x7LhpesL8C5w1oj+cFINGHhjlca1L98TGA9c HDutfCqv4GElCy325CfgSgCnZrOyfYQZjCwE37cmqIbZElLJpLFR =fEIi -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmQ5dYIACgkQYKtH/8kJ UieIRRAAysy1znBxAwVOVVBxWvnllkeomG3nPlG6Xq6oDk89G9KrDeuuvPYta8/Y BeFZd+lNm35p5MJMUSGCvcxTNauoKwf/KF2F3WcFyFEqG8kVqD8IJhiD5LGKMnWE 04GYT0tV/ikX/QzXEVVzZmsw5GGxpYv9G7xvnNe5JAJmfhyavUmWGQF3Or5x7cCK sBmIZ4DPymEM2RuACZqS5dkjRPei64Gc0C/axkzZNL0LQQ48MgEdUQvWgo8KTTIr mSeATRk6Lui3/ajSGjeSbqzQiBp/A+qE1/4jZzVvvuhZ/wj5EdkKKUUa7d64wHKS 7KRv6Y0/c1nbETm0Olaw43L7rRn1lBDl+0WkdIAgEPsqp87LJpdPmzyTWLWA8A8N vyLtkMpvUymgLuELdUuGxYzy+9l7E2qYUuTJN6HzR8xkOBku/B+HTS0eYfygElwn 7LupHbef/AHuAdY7eCSr/tBtXEZyTklvMEAMXR9ATqg1cavqi5nW5IHUH1t4mTnS wMu/O5Md59R90gqJ9xv8wOKRe+i/LJnDbmKbY0tWBq/Jh9wBW8VvdrXdVHfZ95lU hbGpEFM+vV6HtzrJqcGSGQBtdpvoR/k8J5Yqc7D6U7xfzhsr9jDZo5cOkyWYz5nv 9WbJqZaag1F3OEYso+WQ/la88M9INch59+MIfFxCO5+c+fuZiwA= =IDjR -----END PGP SIGNATURE----- Merge tag 'v6.4-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into soc/dt MMC-aliases for rk3288-veyron devices and some dts node adaptions for yaml conversions recently merged into the drm tree. * tag 'v6.4-rockchip-dts32-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: ARM: dts: rockchip: fix rk3288 dp node ARM: dts: rockchip: fix rk3288 lvds node ARM: dts: rockchip: fix rk3288 dsi node ARM: dts: rockchip: Add mmc aliases for rk3288-veyron devices Link: https://lore.kernel.org/r/9713202.NyiUUSuA9g@phil Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Arnd Bergmann
|
ff68e81685 |
New boards: OrangePi R1 Plus, NanoPi R2C + R5C + R5S, Khadas Edge2.
General RK3588 additions: audio, thermal management, sdmmc, clock fixes, watchdog; RK3588-Rock5b: rtc, pwm, audio. Display support for Odroid Go Super and PinephonePro. And some misc adaptions for recently merged yaml binding conversions. -----BEGIN PGP SIGNATURE----- iQFEBAABCAAuFiEE7v+35S2Q1vLNA3Lx86Z5yZzRHYEFAmQyBW8QHGhlaWtvQHNu dGVjaC5kZQAKCRDzpnnJnNEdgejLCACnsnj+NOWcKMAQW2ganzH5rYTEwFQ2kkRM uAWD8W0l9WZvQ2p88SKZiXM9jyCEShH6FwN+QteL0KFJWgQNcN/j1P4/Sey2qI3v TqFICm8L+oQzEsQ74sx9IxTiOSu2AejDU+ToOef5+FEbNGgPFVwscXCxVSGlb5cX W2t7U3WazVLQABNYhrcmZsj3tLVtV4S5ey+L+Gmj5UP+CSRYiskbQkamLwkblBxX C3CNRKqnqNe+1mpNsRrtixNdPMEJ3XIdi+hA6mnkI90QLifFpD9/dmwG9l7I0e99 7QPBzgNHGGfHFDuI14A9/nqls3biE9oPZznRcTc0U6XAOvJCdB4e =ewGB -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmQ5dPQACgkQYKtH/8kJ Uif/Kw/+I+0X/w8nD9wEtGTYrxO38XiJLvIULNesdPa1XnY0Q7HsfVeYEMvKCc+h zSSlH23MiSBuZ/LcHiwJtpBXzOTlVpsvgMjQ+JD12U3QvLNb2RL4rgtWJfycpzvV 357OWA8VyH1BoXh7H9gKVNoyfiZdezPL68oQOsKDCbWYOFI/quRWVi9M5f2ObkZW P5B8dvjtkFTKXu2R3500fayRsaNQAZJPwphpzHW+7h8IeytqV9Id+YjdGIJlQ708 qWZubq78FaSW5XyYEppdDglPuvcgiw3zH2V6Kv43Ks3EZnnQ419819HQBCCeioYH z0rsbqUOId8G5bYlh11S4SL97v1OGkmgBxOyOBj8SL1Kie11xZZQDCDvIMMYheyM QNL1RahpPUdVABp63wWIVl5KFKuuCbeGqjEbCLmdp+fi6VGJNqjVVpxvT9i3pB+Q L2E7svta/fU5W7vPWsvVPEpgj3P3ZbFgKemdr0WtlCjIm/TTZkZZNyr7mOsNHmvM Yz7Q+eLRVGgYsIcZG6mc5zEv2kcJRJEhPgXcwu8VHrXW6RCkoDJoKtW6xEhpxwja f1892CfOjRwWlgfZBc3R6esVkIDtRLYlNw3W5aIUEQJiZqkWStNcNHz891gHtebX jGQw7W+S2e2lM9Ge9cAEDFEdsy8ohQJgYIyEeNbI2YNH4i/d3ms= =N6Ic -----END PGP SIGNATURE----- Merge tag 'v6.4-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip into soc/dt New boards: OrangePi R1 Plus, NanoPi R2C + R5C + R5S, Khadas Edge2. General RK3588 additions: audio, thermal management, sdmmc, clock fixes, watchdog; RK3588-Rock5b: rtc, pwm, audio. Display support for Odroid Go Super and PinephonePro. And some misc adaptions for recently merged yaml binding conversions. * tag 'v6.4-rockchip-dts64-1' of git://git.kernel.org/pub/scm/linux/kernel/git/mmind/linux-rockchip: (35 commits) arm64: dts: rockchip: correct panel supplies on Odroid Go Super arm64: dts: rockchip: Add rk3588-rock-5b analog audio arm64: dts: rockchip: Add I2S rk3588 nodes arm64: dts: rockchip: Add rk3588s I2S nodes arm64: dts: rockchip: Assign PLL_PPLL clock rate to 1.1 GHz on rk3588s arm64: dts: rockchip: Fix SCMI assigned clocks on rk3588s arm64: dts: rockchip: add rk3588 thermal sensor arm64: dts: rockchip: Add pwm-fan to rk3588-rock-5b arm64: dts: rockchip: Enable RTC support for Rock 5B arm64: dts: rockchip: Add Xunlong OrangePi R1 Plus LTS dt-bindings: Add doc for Xunlong OrangePi R1 Plus LTS arm64: dts: rockchip: Add FriendlyARM NanoPi R2C dt-bindings: Add doc for FriendlyARM NanoPi R2C arm64: dts: rockchip: Add touchscreen support to rk3399-pinephone-pro arm64: dts: rockchip: Add internal display support to rk3399-pinephone-pro dt-bindings: watchdog: rockchip: Add rockchip,rk3588-wdt string arm64: dts: rockchip: Enable watchdog support for RK3588 arm64: dts: rockchip: remove hclk from dsi node on rk356x arm64: dts: rockchip: rename vbus-supply to phy-supply in rk3566-box-demo.dts arm64: dts: rockchip: fix rk3399 dp node ... Link: https://lore.kernel.org/r/7289562.MhkbZ0Pkbq@phil Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Arnd Bergmann
|
8f09b5ec41 |
- added D1 crypto node
- enabled DVFS on OrangePi PC2 board - added GPIO line names on Nezha D1 board - added suniv USB nodes and enabled on licheepi-nano - new suniv boards: PopStick v1.1 and Lctech Pi - added Allwinner T113-s DTSI - added MangoPi MQ-R T113-s board variant - swapped DMA names for A23, A31, A33, D1, H3, H5, V3s -----BEGIN PGP SIGNATURE----- iHUEABYIAB0WIQSPRixG1tysKC2PKM10Ba7+DO8kkwUCZDFhwAAKCRB0Ba7+DO8k k4J/AP0UdafVPx8HFMiXUBABSdrSVvwDWDhXcqeMiWQXZ6UWogEA7gUTOZ+ZFr2u /GDOiM0CscDyQlbHWEYx5tkAhfBUnQU= =Sv3O -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmQ5dGQACgkQYKtH/8kJ UicCgA//fqzpR1CLYH4xCF6jIiVtTEPAEU615BA+AJAWg9mACWALutARbTmvOfJo jUpCyNsVV6vCH1kGLBj36FgkVOTid691Q7lEo4lrR8Mg9hV3S+rBlbgbMD6LRX54 qSmvDVxKh3AFcDvbfxBYMKRBo+kq4samrbin0W+7E6C7Q9hqEzDGMgMRTrAGyRiF H3w6Anjbm8jdUddMGHTNveGVJZG8VDKAdOeDVzvQMACg83S4CgQWSyH/AQhq0OtG kpCMS+d3/0ElO6to0yXt5BlrsfqqmFk2lc9ovDfVUU3Z+uNOfc+V83w2mqt8+jeF Y2+kptB0LeEWwqDxFJeAHPIztPlhfZeqszsbzfAPoxhbqg1FyHGqtdsuAj/I82TD dnDVoipEWJHOf3Go3TDgz9fetsRidett0ZfAxQy2Z1/5NTRDNfFY2hSJbf1haEvO 4BOm8ZpVDHPY/wMbinu+4kiFmzu6eVMUITkdNjYAzx5W5TkPK7comTNhDe3k97dD gWyToAsAjbs6jxsRYI4M9DP7y0YR8hFuOIOMt1dibXn/S2VkteboBhID8hxl1fuY yf0p7PWkyk5ev9r6+vZScmlwDqfNXingd9Bdmr5xaRl4kIKCVO6oDJpoQT/O2dY8 kY3YIklnbJgiDsgNFJNSYqWMI+xFO8aQQDZFmDf5Wh2/3qWnvWc= =Dm8i -----END PGP SIGNATURE----- Merge tag 'sunxi-dt-for-6.4-1' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into soc/dt - added D1 crypto node - enabled DVFS on OrangePi PC2 board - added GPIO line names on Nezha D1 board - added suniv USB nodes and enabled on licheepi-nano - new suniv boards: PopStick v1.1 and Lctech Pi - added Allwinner T113-s DTSI - added MangoPi MQ-R T113-s board variant - swapped DMA names for A23, A31, A33, D1, H3, H5, V3s * tag 'sunxi-dt-for-6.4-1' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: riscv: dts: allwinner: d1: Switch dma-names order for snps,dw-apb-uart nodes ARM: dts: sunxi: h3/h5: Switch dma-names order for snps,dw-apb-uart nodes ARM: dts: sun8i: v3s: Switch dma-names order for snps,dw-apb-uart nodes ARM: dts: sun8i: a23/a33: Switch dma-names order for snps,dw-apb-uart nodes ARM: dts: sun6i: a31: Switch dma-names order for snps,dw-apb-uart nodes ARM: dts: sunxi: add MangoPi MQ-R-T113 board dt-bindings: arm: sunxi: document MangoPi MQ-R board names ARM: dts: sunxi: add Allwinner T113-s SoC .dtsi dts: add riscv include prefix link ARM: dts: suniv: Add Lctech Pi F1C200s devicetree ARM: dts: suniv: add device tree for PopStick v1.1 dt-binding: arm: sunxi: add two board compatible strings dt-bindings: vendor-prefixes: add Source Parts and Lctech names ARM: dts: suniv: licheepi-nano: enable USB ARM: dts: suniv: add USB-related device nodes riscv: dts: nezha-d1: add gpio-line-names arm64: dts: allwinner: h5: OrangePi PC2: add OPP table to enable DVFS riscv: dts: allwinner: d1: Add crypto engine node Link: https://lore.kernel.org/r/20230408125156.GA17050@jernej-laptop Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Guilherme G. Piccoli
|
611d4c716d |
x86/hyperv: Mark hv_ghcb_terminate() as noreturn
Annotate the function prototype and definition as noreturn to prevent objtool warnings like: vmlinux.o: warning: objtool: hyperv_init+0x55c: unreachable instruction Also, as per Josh's suggestion, add it to the global_noreturns list. As a comparison, an objdump output without the annotation: [...] 1b63: mov $0x1,%esi 1b68: xor %edi,%edi 1b6a: callq ffffffff8102f680 <hv_ghcb_terminate> 1b6f: jmpq ffffffff82f217ec <hyperv_init+0x9c> # unreachable 1b74: cmpq $0xffffffffffffffff,-0x702a24(%rip) [...] Now, after adding the __noreturn to the function prototype: [...] 17df: callq ffffffff8102f6d0 <hv_ghcb_negotiate_protocol> 17e4: test %al,%al 17e6: je ffffffff82f21bb9 <hyperv_init+0x469> [...] <many insns> 1bb9: mov $0x1,%esi 1bbe: xor %edi,%edi 1bc0: callq ffffffff8102f680 <hv_ghcb_terminate> 1bc5: nopw %cs:0x0(%rax,%rax,1) # end of function Reported-by: Arnd Bergmann <arnd@arndb.de> Signed-off-by: Guilherme G. Piccoli <gpiccoli@igalia.com> Signed-off-by: Josh Poimboeuf <jpoimboe@kernel.org> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Reviewed-by: Michael Kelley <mikelley@microsoft.com> Link: https://lore.kernel.org/r/32453a703dfcf0d007b473c9acbf70718222b74b.1681342859.git.jpoimboe@kernel.org |
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Josh Poimboeuf
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6e36a56a5f |
scsi: message: fusion: Mark mpt_halt_firmware() __noreturn
mpt_halt_firmware() doesn't return. Mark it as such. Fixes the following warnings: vmlinux.o: warning: objtool: mptscsih_abort+0x7f4: unreachable instruction vmlinux.o: warning: objtool: mptctl_timeout_expired+0x310: unreachable instruction Reported-by: kernel test robot <lkp@intel.com> Reported-by: Mark Rutland <mark.rutland@arm.com> Debugged-by: Peter Zijlstra <peterz@infradead.org> Signed-off-by: Josh Poimboeuf <jpoimboe@kernel.org> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Link: https://lore.kernel.org/r/d8129817423422355bf30e90dadc6764261b53e0.1681342859.git.jpoimboe@kernel.org |
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Josh Poimboeuf
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52668badd3 |
x86/cpu: Mark {hlt,resume}_play_dead() __noreturn
Fixes the following warning: vmlinux.o: warning: objtool: resume_play_dead+0x21: unreachable instruction Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Josh Poimboeuf <jpoimboe@kernel.org> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Link: https://lore.kernel.org/r/ce1407c4bf88b1334fe40413126343792a77ca50.1681342859.git.jpoimboe@kernel.org |
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Josh Poimboeuf
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09c5ae30d0 |
btrfs: Mark btrfs_assertfail() __noreturn
Fixes a bunch of warnings including: vmlinux.o: warning: objtool: select_reloc_root+0x314: unreachable instruction vmlinux.o: warning: objtool: finish_inode_if_needed+0x15b1: unreachable instruction vmlinux.o: warning: objtool: get_bio_sector_nr+0x259: unreachable instruction vmlinux.o: warning: objtool: raid_wait_read_end_io+0xc26: unreachable instruction vmlinux.o: warning: objtool: raid56_parity_alloc_scrub_rbio+0x37b: unreachable instruction ... Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Josh Poimboeuf <jpoimboe@kernel.org> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Link: https://lore.kernel.org/r/960bd9c0c9e3cfc409ba9c35a17644b11b832956.1681342859.git.jpoimboe@kernel.org |
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Josh Poimboeuf
|
1c47c8758a |
objtool: Include weak functions in global_noreturns check
If a global function doesn't return, and its prototype has the __noreturn attribute, its weak counterpart must also not return so that it matches the prototype and meets call site expectations. To properly follow the compiled control flow at the call sites, change the global_noreturns check to include both global and weak functions. On the other hand, if a weak function isn't in global_noreturns, assume the prototype doesn't have __noreturn. Even if the weak function doesn't return, call sites treat it like a returnable function. Fixes the following warning: kernel/sched/build_policy.o: warning: objtool: do_idle() falls through to next function play_idle_precise() Reported-by: kernel test robot <lkp@intel.com> Signed-off-by: Josh Poimboeuf <jpoimboe@kernel.org> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Reviewed-by: Miroslav Benes <mbenes@suse.cz> Link: https://lore.kernel.org/r/ede3460d63f4a65d282c86f1175bd2662c2286ba.1681342859.git.jpoimboe@kernel.org |
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Josh Poimboeuf
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27dea14c7f |
cpu: Mark nmi_panic_self_stop() __noreturn
In preparation for improving objtool's handling of weak noreturn functions, mark nmi_panic_self_stop() __noreturn. Signed-off-by: Josh Poimboeuf <jpoimboe@kernel.org> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Link: https://lore.kernel.org/r/316fc6dfab5a8c4e024c7185484a1ee5fb0afb79.1681342859.git.jpoimboe@kernel.org |
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Josh Poimboeuf
|
7412a60dec |
cpu: Mark panic_smp_self_stop() __noreturn
In preparation for improving objtool's handling of weak noreturn functions, mark panic_smp_self_stop() __noreturn. Signed-off-by: Josh Poimboeuf <jpoimboe@kernel.org> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Link: https://lore.kernel.org/r/92d76ab5c8bf660f04fdcd3da1084519212de248.1681342859.git.jpoimboe@kernel.org |
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Josh Poimboeuf
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5ab6876c78 |
arm64/cpu: Mark cpu_park_loop() and friends __noreturn
In preparation for marking panic_smp_self_stop() __noreturn across the kernel, first mark the arm64 implementation of cpu_park_loop() and related functions __noreturn. Signed-off-by: Josh Poimboeuf <jpoimboe@kernel.org> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Link: https://lore.kernel.org/r/55787d3193ea3e295ccbb097abfab0a10ae49d45.1681342859.git.jpoimboe@kernel.org |
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Josh Poimboeuf
|
4208d2d798 |
x86/head: Mark *_start_kernel() __noreturn
Now that start_kernel() is __noreturn, mark its chain of callers __noreturn. Signed-off-by: Josh Poimboeuf <jpoimboe@kernel.org> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Link: https://lore.kernel.org/r/c2525f96b88be98ee027ee0291d58003036d4120.1681342859.git.jpoimboe@kernel.org |
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Josh Poimboeuf
|
25a6917ca6 |
init: Mark start_kernel() __noreturn
Now that arch_call_rest_init() is __noreturn, mark its caller start_kernel() __noreturn. Signed-off-by: Josh Poimboeuf <jpoimboe@kernel.org> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Link: https://lore.kernel.org/r/7069acf026a195f26a88061227fba5a3b0337b9a.1681342859.git.jpoimboe@kernel.org |
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Josh Poimboeuf
|
9ea7e6b62c |
init: Mark [arch_call_]rest_init() __noreturn
In preparation for improving objtool's handling of weak noreturn functions, mark start_kernel(), arch_call_rest_init(), and rest_init() __noreturn. Signed-off-by: Josh Poimboeuf <jpoimboe@kernel.org> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Reviewed-by: Nick Desaulniers <ndesaulniers@google.com> Link: https://lore.kernel.org/r/7194ed8a989a85b98d92e62df660f4a90435a723.1681342859.git.jpoimboe@kernel.org |
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Arnd Bergmann
|
58982e1d3c |
i.MX arm64 device tree changes for 6.4:
- New board device trees: Apalis quadmax, DH electronics i.MX8M Plus DHCOM and PDK3, Data Modul i.MX8M Plus eDM SBC, Colibri Aster and Iris, etc. - Add FlexSPI, BBNSM and TPM PWM devices for i.MX93 SoC. - A series of imx8mq-librem5 udpates which includes minor fixes, magnetometer, CSI/camera support, and powersaving improvements. - Add Cadence USB3 support for i.MX8QXP. - Add FlexCAN support for i.MX8QXP and i.MX8QM. - Add UART DMA support for i.MX8MQ. - Add GPT devices for i.MX8MP. - Add VPU decoder and encoder support for i.MX8QM. - Add display pipeline and PCIe EP support for i.MX8M family SoCs. - A series from Peng Fan updating various i.MX8M device trees to pinctrl nodes match DT schema. - A series from Philippe Schenker improving colibri-imx8x device trees in various aspects. - Other random device tree updates. -----BEGIN PGP SIGNATURE----- iQFIBAABCgAyFiEEFmJXigPl4LoGSz08UFdYWoewfM4FAmQxOOAUHHNoYXduZ3Vv QGtlcm5lbC5vcmcACgkQUFdYWoewfM6mqwf8CYJZwCv3TEUHtV8U8wKnQddPPeyo M62FQYTS2NBcLNPv3wqus3QaED2AmuY9ibFG/R7CBpNgs89QtTJfGbGrQnFea9Kt ylXVHj4OtF0edAG1YpRfg+1kWx1If61OO1yuVGxbGZEwCgVMkBVQfNgTT+awZWOX CCAe9m6TM7mNWMPoIrymaUuTFQDkG9WisSyafAdQUBVRaIUpYzWVkBLK130mpxLo /J4jYv58beoZmd4eh942c5Ui8SYg0bGmxNdrtsvsmE7IWRkB77JxFgVrh6OokS70 c+zBU+9epWBRW4d7J4QCHCNhlXqKPF6XHuxeW8Q0OxvC/sLCSTK2QD7puQ== =aFxm -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmQ5cToACgkQYKtH/8kJ Uid09g//YYAY/H/f7j7Fz8K3+bS9Yg57RKK1MrxRv63B/YHKECCrBAp3xnwA4sRO ZV+MyqXOfHGdQSpYhUEzWkI2so2mA6AGRz8T2uCJuTB1ktoWe3XEJUqjJCRMZaq2 5YIWTi2Oct4fX/qS1fC5UqFsrM77TGA3+7NxI5SDgCMmdzoNuNXjiOA1UxfBnOhF v2kOt9yC41eWogBSxiiE97f7DE+lYw0DvdyDhKe+RkpqhkK3aLLhlXUI85TJVOhr 5hbXg/nWKK0wORXI3i3vPy+IFOjt9tKniLZX7CMpG/+F9xkKMbgwFzYhJjeBm2LL 27gkNqUGNDkWBg9yKHbvUA9iucTzvZnowrjV+Tigm2VFIMMAZX448yc9mIvqXWjc Oimo2M/7JiaPa6ernF4fmiLPkU+4OoPCeVaW7tEBxrJh318GxanzOd/4LxGLhpxB CBoW8UN/Jt0Fd5NQgkTVAiGgZzZV9kWiEeVY4sMHvWBxh6BYs0TvLlMd9uzxu226 bzKnO19X1Q49sUy6bCZsIpXRoVkRrFNgTm5QtEw4IoHSGDPZpTHJmGQkcdGFfnHM Wo0ESSO/SeP65vl+vW669XyQUcEd12SQYWOMhIWz/cUI0o30ePO2sGclNmbRHyeh rNWyvnjCnpEqw1ntD98HdZImlwFGq0zJbkhPz76Gzhl7CJ94+/8= =8OCT -----END PGP SIGNATURE----- Merge tag 'imx-dt64-6.4' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into soc/dt i.MX arm64 device tree changes for 6.4: - New board device trees: Apalis quadmax, DH electronics i.MX8M Plus DHCOM and PDK3, Data Modul i.MX8M Plus eDM SBC, Colibri Aster and Iris, etc. - Add FlexSPI, BBNSM and TPM PWM devices for i.MX93 SoC. - A series of imx8mq-librem5 udpates which includes minor fixes, magnetometer, CSI/camera support, and powersaving improvements. - Add Cadence USB3 support for i.MX8QXP. - Add FlexCAN support for i.MX8QXP and i.MX8QM. - Add UART DMA support for i.MX8MQ. - Add GPT devices for i.MX8MP. - Add VPU decoder and encoder support for i.MX8QM. - Add display pipeline and PCIe EP support for i.MX8M family SoCs. - A series from Peng Fan updating various i.MX8M device trees to pinctrl nodes match DT schema. - A series from Philippe Schenker improving colibri-imx8x device trees in various aspects. - Other random device tree updates. * tag 'imx-dt64-6.4' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (87 commits) arm64: dts: imx8mp: Add support for Data Modul i.MX8M Plus eDM SBC arm64: dts: imx8mp: Add display pipeline components arm64: dts: imx8mn: Add display pipeline components arm64: dts: imx8mm: Add display pipeline components arm64: dts: freescale: imx8qxp-mek: enable cadence usb3 arm64: dts: imx8qxp: add cadence usb3 support arm64: dts: imx8mq-librem5: add missing #clock-cells arm64: dts: imx8mm-prt8mm: update pinctrl to match dtschema arm64: dts: imx8mn-bsh-smm: update pinctrl to match dtschema arm64: dts: imx8mm-emcon: update pinctrl to match dtschema arm64: dts: imx8mq-librem5: update pinctrl to match dtschema arm64: dts: imx8mm-ddr4-evk: update gpmi pinctrl to match dtschema arm64: dts: imx8mn-evk: update i2c pinctrl to match dtschema arm64: dts: imx8mp: Add GPT blocks arm64: dts: imx8-apalis-v1.1: drop ci-disable-lpm arm64: dts: imx8dxl: drop clocks from scu clock controller arm64: dts: imx8mp: verdin-yavia: drop disable-over-current arm64: dts: imx8mq: tqma8mq-mba8mx: drop disable-over-current arm64: dts: imx8mp: Add support for DH electronics i.MX8M Plus DHCOM and PDK3 arm64: dts: colibri-imx8x: Add iris v2 carrier board ... Link: https://lore.kernel.org/r/20230408101928.280271-5-shawnguo@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Arnd Bergmann
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0efb9fa003 |
i.MX arm32 device tree changes for 6.4:
- New board device trees: Tolino Vison, chargebyte Tarragon, new revision of the IOTA board. - A couple of imx7d-remarkable2 update to enable cyttsp5 touch and BD71815 PMIC. - A series from Oleksij Rempel to configure Ethernet reference clock from device tree. - A series from Stefan Wahren to use label references for i.MX28 based boards. -----BEGIN PGP SIGNATURE----- iQFIBAABCgAyFiEEFmJXigPl4LoGSz08UFdYWoewfM4FAmQxJLYUHHNoYXduZ3Vv QGtlcm5lbC5vcmcACgkQUFdYWoewfM4t4ggAigOtwEXTRhhC7IZvZssp2ZlKhIJ7 kBKRCv1tZyyDIH6ZSrEiysjGALSPii/FrEg+Xr09ye/VPCP1kQSmXrPUpunTTqHT 3MEABv+uTH7IcLdI0g7CBUkVL+pj5sPmzQw48qA5Xrgfb8ip6HaZ4SdmoiemhrnK oQq9YRfSaOHGGVxc9SIrNPueUXZ+tUMjpWs5oi8ITm2EbMCNxwFmOCtQM038enXO MPG8COX2IxWyhCg6sqV9Lb2wPv0l+cKF2YiDKMvENjFkoUhDKgG2engr50OjHWl6 rbzaGsgjmZaq4uNhHdCbBNd849O8pH+dbT1Ix1jYAUe9r8TFKgcWp+r6xQ== =PiES -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmQ5cN4ACgkQYKtH/8kJ UicG7w//bCBxm2ZmSkpPZWoOmDMRq1OG3O35KJdZgtwGDZH5E4UMN/j0rnvVCKR5 pqNQHfG4f7OfTk2lq0HDfWFifaXmEJyOXXtCxYWoS5fIXgzOgb6lbcQNRqzNMmXX WtE6Ut8+lOdoB45fDP1Zgy1qP5w6IOHvOcKaTXs0jNs4KXhLu1i+i70PuEG/jkjY vt9W1hVVziM48KucbXQ9FAmSnZ4Pr0mHlFggamZRsRmx5dfioOsWyy4miVZy59PK 7v6s6dmJ7LBlxM+nrtWYGbRHv7agociuCGF8gZwaKOl34OuuBYAda5F+hTLrx539 oAi1ck7GblWklPp+wMMgwp6eT7jIX/TmF05lMvMnPp3aczLlUT7UdkweruyMS+04 GPt+GNK025sR4FNIFCybOF6/oUSe7v2nMBLDDfe4mKltpg0k0LcgR7AbRN8qMVYB Ekt68WJPDP9sRZ1tRyq0F6CKLdqYf828o9zCrSc/QWqmZeIfv/FubMkiJB2PpRVf fZfzXtLOudmddSdlSY8YCKm2JG/Z2QLf7kIlg/W4Ue5iaGIaX5YQjPf1LG6s3RKf hPDbQTk28lj4XajAdQPdv0Dl9KONiqTeKQ1G5L6MSwTFaHnMpxTVlZNsKT2LSmXo 7fgsksfkxN4CRXlM13lLdVdQprwKXyx11iYfebdl8V3vqLst3lg= =Pr0F -----END PGP SIGNATURE----- Merge tag 'imx-dt-6.4' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into soc/dt i.MX arm32 device tree changes for 6.4: - New board device trees: Tolino Vison, chargebyte Tarragon, new revision of the IOTA board. - A couple of imx7d-remarkable2 update to enable cyttsp5 touch and BD71815 PMIC. - A series from Oleksij Rempel to configure Ethernet reference clock from device tree. - A series from Stefan Wahren to use label references for i.MX28 based boards. * tag 'imx-dt-6.4' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: (31 commits) ARM: dts: imx6ull: Add chargebyte Tarragon support ARM: dts: imx: Add devicetree for Tolino Vison ARM: dts: imx6dl-yapp43: Add support for new HW revision of the IOTA board ARM: dts: imx6dl-yapp4: Remove unneeded status "okay" ARM: dts: imx6dl-yapp4: Move status to the end of property list ARM: dts: imx6dl-yapp4: Move phy reset into switch node ARM: dts: imx28-tx28: add SPDX-License-Identifier ARM: dts: imx28-ts4600: Convert to use label references ARM: dts: imx28-evk: Convert to use label references ARM: dts: imx28-duckbill-2: Include base board ARM: dts: imx28-duckbill: Convert to use label references ARM: dts: imx28-cfa10036: Convert to use label references ARM: dts: imx28-apx4devkit: Convert to use label references ARM: dts: imx28-m28/sps1: Convert to use label references ARM: dts: imx28-apf28: Convert to use label references ARM: dts: imx7d-remarkable2: Enable the rohm,bd71815 ARM: dts: imx7d-remarkable2: Enable the cyttsp5 ARM: dts: imx6dl-yapp4: Use reset-gpios property name ARM: dts: imx6ul-prti6g: configure ethernet reference clock parent ARM: dts: imx6ul: set enet_clk_ref to CLK_ENETx_REF_SEL ... Link: https://lore.kernel.org/r/20230408101928.280271-4-shawnguo@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Arnd Bergmann
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86724b74c9 |
i.MX dt-bindings update for 6.4:
- Add vendor prefix for chargebyte. - A bunch of new board compatibles: Tolino Vision, Toradex Apalis, chargebyte Tarragon, i.MX8M Plus based boards from DH electronics and Data Modul, etc. - A series from Marek Vasut to improve blk-ctrl bindings. -----BEGIN PGP SIGNATURE----- iQFIBAABCgAyFiEEFmJXigPl4LoGSz08UFdYWoewfM4FAmQ2CqEUHHNoYXduZ3Vv QGtlcm5lbC5vcmcACgkQUFdYWoewfM62WAf/cJ7W0MnV864M7GUBFKo4pO3brNFl yumpJsbTtCDc5tl4h/UiLQeEq5rY3zudX8+nnMlkMT4uzSxjATmUMvLCnYb8Y8B8 sC2od3OXOn2xeR8XDL1OYTYFZ2NTj+V9n6IKd4y5DYfNSywLevUTenXG8JelC/OI TAyMI1D+gjaB3dOs6V5Xoj7Pe9O5ImG3+Ev6scUGfEc95cDgJAeUxZ6cET2g55rN 0QUSlTFdNjw8S+DMEJcEIgiwg9kSJaSUJnVmSmijv6x0VE0Alo9ZBxChP8fY6Hve GR0ks0MdhGgQWb4Gt8DdCkP5HakoKzVw0keUapiv2y0u/YqMdR540lphzQ== =MLcb -----END PGP SIGNATURE----- Merge tag 'imx-bindings-6.4' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux into soc/dt i.MX dt-bindings update for 6.4: - Add vendor prefix for chargebyte. - A bunch of new board compatibles: Tolino Vision, Toradex Apalis, chargebyte Tarragon, i.MX8M Plus based boards from DH electronics and Data Modul, etc. - A series from Marek Vasut to improve blk-ctrl bindings. * tag 'imx-bindings-6.4' of git://git.kernel.org/pub/scm/linux/kernel/git/shawnguo/linux: dt-bindings: arm: Add Data Modul i.MX8M Plus eDM SBC dt-bindings: arm: fsl: Add chargebyte Tarragon dt-bindings: vendor-prefixes: add chargebyte dt-bindings: soc: imx-blk-ctrl: Drop leading label in blk-ctrl in examples dt-bindings: soc: imx8m-blk-ctrl: Rename blk_ctrl to blk-ctrl in examples dt-bindings: arm: Add DH electronics i.MX8M Plus DHCOM on PDK3 dt-bindings: arm: fsl: add compatible string for Tolino Vision dt-bindings: arm: fsl: Add Y Soft IOTA Phoenix, Lynx, Pegasus and Pegasus+ dt-bindings: arm: fsl: Add colibri-imx8x carrier boards dt-bindings: soc: imx8mp-media-blk-ctrl: Add LDB subnode into schema and example dt-bindings: soc: imx8mp-media-blk-ctrl: Align block controller example name dt-bindings: arm: fsl: Fix copy-paste error in comment dt-bindings: arm: fsl: add toradex,apalis-imx8 et al. |
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Rafael J. Wysocki
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684952212c | Merge back cpufreq changes for 6.4-rc1. | ||
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Rafael J. Wysocki
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cfeeb7d37d | Merge back general thermal control changes for 6.4-rc1. | ||
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Rafael J. Wysocki
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065ca2a8c6 | Merge back Intel thermal control material for 6.4-rc1. | ||
Clint Taylor
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764739d8ce |
drm/i915/mtl: Initial DDI port setup
Initialization sequences and C10 phy are in place to be able to enable the first 2 ports of MTL. The other ports use C20 phy that still need to be properly added. Enable the first ports for now, keeping a TODO comment about the others. Reviewed-by: Lucas De Marchi <lucas.demarchi@intel.com> Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com> Signed-off-by: Clint Taylor <clinton.a.taylor@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230413212443.1504245-10-radhakrishna.sripada@intel.com |
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Ankit Nautiyal
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b66a8abaa4 |
drm/i915/display/mtl: Fill port width in DDI_BUF_/TRANS_DDI_FUNC_/PORT_BUF_CTL for HDMI
MTL requires the PORT_CTL_WIDTH, TRANS_DDI_FUNC_CTL and DDI_BUF_CTL
to be filled with 4 lanes for TMDS mode.
This patch enables D2D link and fills PORT_WIDTH in appropriate
registers.
v2:
- Added fixes from Clint's Add HDMI implementation changes.
- Modified commit message.
v3:
- Use TRANS_DDI_PORT_WIDTH() instead of DDI_PORT_WIDTH() for the value
of TRANS_DDI_FUNC_CTL_*. (Gustavo)
Cc: Taylor, Clinton A <clinton.a.taylor@intel.com>
Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
Signed-off-by: Mika Kahola <mika.kahola@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230413212443.1504245-9-radhakrishna.sripada@intel.com
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Radhakrishna Sripada
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5836bc5f8d |
drm/i915/mtl: Add C10 phy programming for HDMI
Like DG2, we still don't have a proper algorithm that can be used for calculating PHY settings, but we do have tables of register values for a handful of the more common link rates. Some support is better than none, so let's go ahead and add/use these tables when we can, and also add some logic to hdmi_port_clock_valid() to filter the modelist to just the modes we can actually support with these link rates. Hopefully we'll have a proper / non-encumbered algorithm to calculate these registers by the time we upstream and we'll be able to replace this patch with something more general purpose. Bspec: 64568 v2: Rebasing with Clint's HDMI C10 PLL tables (Mika) v3: Remove the extra hdmi clock check pruning. Cc: Imre Deak <imre.deak@intel.com> Cc: Uma Shankar <uma.shankar@intel.com> Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com> Signed-off-by: Clint Taylor <Clinton.A.Taylor@intel.com> Signed-off-by: Mika Kahola <mika.kahola@intel.com> Signed-off-by: Ankit Nautiyal <ankit.k.nautiyal@intel.com> Reviewed-by: Imre Deak <imre.deak@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230413212443.1504245-8-radhakrishna.sripada@intel.com |
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José Roberto de Souza
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23ef619463 |
drm/i915/mtl/display: Implement DisplayPort sequences
The differences between MTL and TGL DP sequences are big enough to
MTL have its own functions.
Also it is much easier to follow MTL sequences against spec with
its own functions.
One change worthy to mention is the move of
'intel_display_power_get(dev_priv, dig_port->ddi_io_power_domain)'.
This call is not necessary for MTL but we have _put() counter part in
intel_ddi_post_disable_dp() that needs to balanced.
We could add a display version check on it but instead here it is
moving it to intel_ddi_pre_enable_dp() so it is executed for all
platforms in a single place and this will not cause any harm in MTL
and newer platforms.
v2:
- Fix logic to wait for buf idle.
- Use the right register to wait for ddi active.(RK)
v3:
- Increase wait timeout for ddi buf active (Mika)
v4:
- Increase idle timeout for ddi buf idle (Mika)
v5: use rmw in mtl_disable_ddi_buf. Donot clear
link training mask(Imre)
BSpec: 65448 65505
Cc: Matt Roper <matthew.d.roper@intel.com>
Cc: Satyeshwar Singh <satyeshwar.singh@intel.com>
Cc: Clint Taylor <clinton.a.taylor@intel.com>
Cc: Ankit Nautiyal <ankit.k.nautiyal@intel.com>
Cc: Imre Deak <imre.deak@intel.com>
Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
Signed-off-by: José Roberto de Souza <jose.souza@intel.com>
Signed-off-by: Mika Kahola <mika.kahola@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230413212443.1504245-7-radhakrishna.sripada@intel.com
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Mika Kahola
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babde06db8 |
drm/i915/mtl: MTL PICA hotplug detection
PICA is used for DP alt mode and TBT modes. Hotplug interruption is routed from PICA chip to south display engine and from there to north display engine. This patch adds functionality to enable hotplug detection for all Type-C ports (4 ports available). Differently from HPD in south display, PICA provides a dedicated HPD control register for each supported port, so we loop over ports ourselves instead of using intel_hpd_hotplug_enables() or intel_get_hpd_pins(). BSpec: 49305, 55726, 65107, 65300 Reviewed-by: Imre Deak <imre.deak@intel.com> Signed-off-by: Madhumitha Tolakanahalli Pradeep <madhumitha.tolakanahalli.pradeep@intel.com> Signed-off-by: Gustavo Sousa <gustavo.sousa@intel.com> Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com> Signed-off-by: Mika Kahola <mika.kahola@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230413212443.1504245-6-radhakrishna.sripada@intel.com |
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Mika Kahola
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ea8af87ae6 |
drm/i915/mtl: Add vswing programming for C10 phys
C10 phys uses direct mapping internally for voltage and pre-emphasis levels.
Program the levels directly to the fields in the VDR Registers.
Bspec: 65449
v2: From table "C10: Tx EQ settings for DP 1.4x" it shows level 1
and preemphasis 1 instead of two times of level 1 preemphasis 0.
Fix this in the driver code as well.
v3: VSwing update (Clint)
v4: Add vboost termination ctl programming(Imre)
Fix tx llogic and other nits
Restrict C10 vdr ctl register access for C10 phy(RK)
v5: Program vboots, termination ctl for both lanes(Imre)
Cc: Imre Deak <imre.deak@intel.com>
Cc: Uma Shankar <uma.shankar@intel.com>
Signed-off-by: Clint Taylor <Clinton.A.Taylor@intel.com>
Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
Signed-off-by: Mika Kahola <mika.kahola@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com>(v3)
Link: https://patchwork.freedesktop.org/patch/msgid/20230413212443.1504245-5-radhakrishna.sripada@intel.com
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Radhakrishna Sripada
|
51390cc0e0 |
drm/i915/mtl: Add Support for C10 PHY message bus and pll programming
XELPDP has C10 and C20 phys from Synopsys to drive displays. Each phy
has a dedicated PIPE 5.2 Message bus for configuration. This message
bus is used to configure the phy internal registers.
XELPDP has C10 phys to drive output to the EDP and the native output
from the display engine. Add structures, programming hardware state
readout logic. Port clock calculations are similar to DG2. Use the DG2
formulae to calculate the port clock but use the relevant pll signals.
Note: PHY lane 0 is always used for PLL programming.
Add sequences for C10 phy enable/disable phy lane reset,
powerdown change sequence and phy lane programming.
Bspec: 64539, 64568, 64599, 65100, 65101, 65450, 65451, 67610, 67636
v2: Squash patches related to C10 phy message bus and pll
programming support (Jani)
Move register definitions to a new file i.e. intel_cx0_reg_defs.h (Jani)
Move macro definitions (Jani)
DP rates as separate patch (Jani)
Spin out xelpdp register definitions into a separate file (Jani)
Replace macro to select registers based on phy lane with
function calls (Jani)
Fix styling issues (Jani)
Call XELPDP_PORT_P2M_MSGBUS_STATUS() with port instead of phy (Lucas)
v3: Move clear request flag into try-loop
v4: On PHY idle change drm_err_once() as drm_dbg_kms() (Jani)
use __intel_de_wait_for_register() instead of __intel_wait_for_register
and uncomment intel_uncore.h (Jani)
Add DP-alt support for PHY lane programming (Khaled)
v4: Add tx and cmn on c10mpllb_state (Imre)
Add missing waits for pending transactions between two message bus
writes (Imre)
General cleanups and simplifications (Imre)
v5: Few nit cleanups from rev4 (imre)
s/dev_priv/i915/ , s/c10mpllb/c10pll/ (RK)
Rebase
v6: Move the mtl code from intel_c10pll_calc_port_clock to mtl function
Fix typo in comment for REG_FIELD_PREP8 definition(Imre)
Cc: Mika Kahola <mika.kahola@intel.com>
Cc: Imre Deak <imre.deak@intel.com>
Cc: Uma Shankar <uma.shankar@intel.com>
Cc: Gustavo Sousa <gustavo.sousa@intel.com>
Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
Signed-off-by: Mika Kahola <mika.kahola@intel.com>
Reviewed-by: Imre Deak <imre.deak@intel.com> (v4)
Link: https://patchwork.freedesktop.org/patch/msgid/20230413212443.1504245-4-radhakrishna.sripada@intel.com
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Mika Kahola
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a42e65f33c |
drm/i915/mtl: Create separate reg file for PICA registers
Create a separate file to store registers for PICA chips
C10 and C20.
v2: Rename file (Jani)
v3: Use _PICK_EVEN_2RANGES() macro (Lucas)
Coding style fixed (Lucas)
v4: Redefine macros (Imre)
Reviewed-by: Vinod Govindapillai <vinod.govindapillai@intel.com>
Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com>
Signed-off-by: Mika Kahola <mika.kahola@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20230413212443.1504245-3-radhakrishna.sripada@intel.com
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Mika Kahola
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7cb3eb334b |
drm/i915/mtl: Add DP rates
Add DP rates for Meteorlake. Reviewed-by: Vinod Govindapillai <vinod.govindapillai@intel.com> Signed-off-by: Radhakrishna Sripada <radhakrishna.sripada@intel.com> Signed-off-by: Mika Kahola <mika.kahola@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20230413212443.1504245-2-radhakrishna.sripada@intel.com |
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Jason Gerecke
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bea407a427 |
HID: wacom: generic: Set battery quirk only when we see battery data
Some devices will include battery status usages in the HID descriptor but we won't see that battery data for one reason or another. For example, AES sensors won't send battery data unless an AES pen is in proximity. If a user does not have an AES pen but instead only interacts with the AES touchscreen with their fingers then there is no need for us to create a battery object. Similarly, if a family of peripherals shares the same HID descriptor between wired-only and wireless-capable SKUs, users of the former may never see a battery event and will not want a power_supply object created. Link: https://bugzilla.kernel.org/show_bug.cgi?id=217062 Link: https://gitlab.gnome.org/GNOME/gnome-control-center/-/issues/2354 Signed-off-by: Jason Gerecke <jason.gerecke@wacom.com> Tested-by: Mario Limonciello <mario.limonciello@amd.com> Signed-off-by: Jiri Kosina <jkosina@suse.cz> |
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Jason Gerecke
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7fc68653fc |
HID: wacom: Lazy-init batteries
Rather than creating batteries as part of the initial device probe, let's make the process lazy. This gives us the opportunity to prevent batteries from being created in situations where they are unnecessary. There are two cases in particular where batteries are being unnecessarily created at initialization. These are AES sensors (for which we don't know any battery status information until a battery-powered pen actually comes into prox) peripheral tablets which share HID descriptors between the wired-only and wireless-capable SKUs of a family of devices. This patch will delay battery initialization of the former until a pen actually comes into prox. It will delay battery initialization of the latter until either a pen comes into prox or a "heartbeat" packet is processed. Link: https://bugzilla.kernel.org/show_bug.cgi?id=217062 Link: https://gitlab.gnome.org/GNOME/gnome-control-center/-/issues/2354 Signed-off-by: Jason Gerecke <jason.gerecke@wacom.com> Tested-by: Mario Limonciello <mario.limonciello@amd.com> Signed-off-by: Jiri Kosina <jkosina@suse.cz> |
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Josh Poimboeuf
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5743654f5e |
objtool: Generate ORC data for __pfx code
Allow unwinding from prefix code by copying the CFI from the starting instruction of the corresponding function. Even when the NOPs are replaced, they're still stack-invariant instructions so the same ORC entry can be reused everywhere. Signed-off-by: Josh Poimboeuf <jpoimboe@kernel.org> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Link: https://lkml.kernel.org/r/bc3344e51f3e87102f1301a0be0f72a7689ea4a4.1681331135.git.jpoimboe@kernel.org |
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Josh Poimboeuf
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4a2c3448ed |
x86/linkage: Fix padding for typed functions
CFI typed functions are failing to get padded properly for CONFIG_CALL_PADDING. Signed-off-by: Josh Poimboeuf <jpoimboe@kernel.org> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Link: https://lkml.kernel.org/r/721f0da48d2a49fe907225711b8b76a2b787f9a8.1681331135.git.jpoimboe@kernel.org |
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Josh Poimboeuf
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bd456a1bed |
objtool: Separate prefix code from stack validation code
Simplify the prefix code by moving it after validate_reachable_instructions(). Signed-off-by: Josh Poimboeuf <jpoimboe@kernel.org> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Link: https://lkml.kernel.org/r/d7f31ac2de462d0cd7b1db01b7ecb525c057c8f6.1681331135.git.jpoimboe@kernel.org |
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Josh Poimboeuf
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6126ed5dfb |
objtool: Remove superfluous dead_end_function() check
annotate_call_site() already sets 'insn->dead_end' for calls to dead end functions. Signed-off-by: Josh Poimboeuf <jpoimboe@kernel.org> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Link: https://lkml.kernel.org/r/5d603a301e9a8b1036b61503385907e154867ace.1681325924.git.jpoimboe@kernel.org |
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Josh Poimboeuf
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9290e772ba |
objtool: Add symbol iteration helpers
Add [sec_]for_each_sym() and use them. Signed-off-by: Josh Poimboeuf <jpoimboe@kernel.org> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Link: https://lkml.kernel.org/r/59023e5886ab125aa30702e633be7732b1acaa7e.1681325924.git.jpoimboe@kernel.org |
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Josh Poimboeuf
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246b2c8548 |
objtool: Add WARN_INSN()
It's easier to use and also gives easy access to the instruction's containing function, which is useful for printing that function's symbol. It will also be useful in the future for rate-limiting and disassembly of warned functions. Signed-off-by: Josh Poimboeuf <jpoimboe@kernel.org> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Link: https://lkml.kernel.org/r/2eaa3155c90fba683d8723599f279c46025b75f3.1681325924.git.jpoimboe@kernel.org |
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Josh Poimboeuf
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27d000d635 |
scripts/objdump-func: Support multiple functions
Allow specifying multiple functions on the cmdline. Note this removes the secret EXTRA_ARGS feature. While at it, spread out the awk to make it more readable. Signed-off-by: Josh Poimboeuf <jpoimboe@kernel.org> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Link: https://lkml.kernel.org/r/0bf5f4f5978660985037b24c6db49b114374eb4d.1681325924.git.jpoimboe@kernel.org |
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Josh Poimboeuf
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e8deb00c0c |
context_tracking: Fix KCSAN noinstr violation
With KCSAN enabled, even empty inline stubs can be out-of-lined. Force the context_tracking_guest_exit() stub inline. Fixes the following warnings: vmlinux.o: warning: objtool: vmx_vcpu_enter_exit+0x1be: call to context_tracking_guest_exit() leaves .noinstr.text section vmlinux.o: warning: objtool: svm_vcpu_enter_exit+0x85: call to context_tracking_guest_exit() leaves .noinstr.text section Signed-off-by: Josh Poimboeuf <jpoimboe@kernel.org> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Link: https://lore.kernel.org/r/dc93f45abdec90c171108b4b590b7fff5790963c.1681320026.git.jpoimboe@kernel.org |
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Josh Poimboeuf
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7f530fba11 |
objtool: Add stackleak instrumentation to uaccess safe list
If a function has a large stack frame, the stackleak plugin adds a call to stackleak_track_stack() after the prologue. This function may be called in uaccess-enabled code. Add it to the uaccess safe list. Fixes the following warning: vmlinux.o: warning: objtool: kasan_report+0x12: call to stackleak_track_stack() with UACCESS enabled Signed-off-by: Josh Poimboeuf <jpoimboe@kernel.org> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Link: https://lkml.kernel.org/r/42e9b487ef89e9b237fd5220ad1c7cf1a2ad7eb8.1681320562.git.jpoimboe@kernel.org |