Add 100MHz and 200MHz pinctrl setting for eMMC, and enable 8 bit bus mode
to config the eMMC work at HS400ES mode.
Also update to use Standard Drive Strength for USDHC pad to get a better
signal quality per Hardware team suggests.
Reviewed-by: Sherry Sun <sherry.sun@nxp.com>
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Enable CM33 node to support rpmsg feature. To use rpmsg, also need
to enable mu node for mailbox doorbell and reserved memory node
for vring, and data buffer. And reserved a piece DRAM memory for case
that m33 images loaded in DRAM.
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add flexspi node, flexspi has a special memory region mapped to
0x60000000~0x6fffffff. This region is for AHB usage. So add this region
to SoC ranges.
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add cpuidle node and enable cpuidle for dual cores. The HW mode in
Arm Trusted Firmware is SoC Application Power Domain Sleep mode.
Signed-off-by: Jacky Bai <ping.bai@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add thermal node. Cooling map is not added, because frequency runtime
changing not supported for now.
Reviewed-by: Jacky Bai <ping.bai@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Set default clock rate and parents for SDHC[0,1,2].
The PLL3 PFD2 maximum frequency is 332Mhz, we can't set it to 389Mhz
as USDHC clock parent. Because PLL3 PFD0 is used for NIC, PFD1 is used
for audio, the only choice is PFD3 which can reach to 400Mhz.
USDHC1 and USDHC2 maximum PCC clock rate is 200Mhz in Over Drive mode,
and 100Mhz in Nominal/Low Drive mode, when PTE or PTF is used.
The patch adjusts clock parent to PLL3 PFD3 DIV1 for USDHC0, PLL3
PFD3 DIV2 for USDHC1 and USDHC2. And set the max rate to meet
restrictions.
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
Signed-off-by: Ye Li <ye.li@nxp.com>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Enable driver for Bluetooth NXP UART applicable amongst others for NXP
88W8997 and IW416 as found on multiple Toradex SoMs.
Signed-off-by: Marcel Ziswiler <marcel.ziswiler@toradex.com>
Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
There is no "vselect-en" property, neither in the bindings nor in the
Linux driver:
imx8mm-phyboard-polis-rdk.dtb: pmic@8: regulators:ldo2: Unevaluated properties are not allowed ('vselect-en' was unexpected)
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Yannic Moog <y.moog@phytec.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Cadence USB3 bindings specify a specific reg order. Adjust DT entries
to match the bindings.
Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Alias names use dashes instead of underscores, fix this.
Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Alias names use dashes instead of underscores, fix this. Silences also
dtbs_check warning:
imx8qxp-tqma8xqp-mba8xx.dtb: aliases: 'vpu_core0', 'vpu_core1', 'vpu_core2'
do not match any of the regexes: '^[a-z][a-z0-9\\-]*$', 'pinctrl-[0-9]+'
from schema $id: http://devicetree.org/schemas/aliases.yaml#
Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Fixes the warning:
lm75 0-0048: supply vs not found, using dummy regulator
Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
HW GEN1 and GEN2 have different min WQ sizes but they are
currently set to the same value.
Use a gen specific attribute min_hw_wq_size and extend ABI to
pass it to user-space.
Signed-off-by: Sindhu Devale <sindhu.devale@intel.com>
Signed-off-by: Shiraz Saleem <shiraz.saleem@intel.com>
Link: https://lore.kernel.org/r/20230725155525.1081-3-shiraz.saleem@intel.com
Signed-off-by: Leon Romanovsky <leon@kernel.org>
Currently the attribute cap.max_send_wr and cap.max_recv_wr
sent from user-space during create QP are the provider computed
SQ/RQ depth as opposed to raw values passed from application.
This inhibits computation of an accurate value for max_send_wr
and max_recv_wr for this QP in the kernel which matches the value
returned in user create QP. Also these capabilities needs to be
reported from the driver in query QP.
Add support by extending the ABI to allow the raw cap.max_send_wr and
cap.max_recv_wr to be passed from user-space, while keeping compatibility
for the older scheme.
The internal HW depth and shift needed for the WQs needs to be computed
now for both kernel and user-mode QPs. Add new helpers to assist with this:
irdma_uk_calc_depth_shift_sq, irdma_uk_calc_depth_shift_rq and
irdma_uk_calc_depth_shift_wq.
Consolidate all the user mode QP setup into a new function
irdma_setup_umode_qp which keeps it with its counterpart
irdma_setup_kmode_qp.
Signed-off-by: Youvaraj Sagar <youvaraj.sagar@intel.com>
Signed-off-by: Sindhu Devale <sindhu.devale@intel.com>
Signed-off-by: Shiraz Saleem <shiraz.saleem@intel.com>
Link: https://lore.kernel.org/r/20230725155525.1081-2-shiraz.saleem@intel.com
Signed-off-by: Leon Romanovsky <leon@kernel.org>
The Gateworks imx8mp-venice-gw73xx-2x consists of a SOM + baseboard.
The GW702x SOM contains the following:
- i.MX8M Plus SoC
- LPDDR4 memory
- eMMC Boot device
- Gateworks System Controller (GSC) with integrated EEPROM, button
controller, and ADC's
- PMIC
- SOM connector providing:
- eQoS GbE MII
- 1x SPI
- 2x I2C
- 4x UART
- 2x USB 3.0
- 1x PCI
- 1x SDIO (4-bit 3.3V)
- 1x SDIO (4-bit 3.3V/1.8V)
- GPIO
The GW73xx Baseboard contains the following:
- GPS
- microSD
- off-board I/O connector with SPI
- off-board I/O connector with I2C, and GPIO
- off-board I/O connector with MIPI DSI, MIPI CSI, I2C, and GPIO
- off-board I/O connector with RS232 and RS485
- EERPOM
- USB 3.0 HUB
- USB 3.0 TypeA socket
- USB 2.0 Micro-B OTG socket
- Accelerometer
- 1x GbE (eQoS)
- 1x GbE (PCI)
- PCIe clock generator
- PCIe switch
- 2x full-length miniPCIe socket with PCI and USB2.0
- 1x full-length miniPCIe socket with PCI/USB3 (via mux) SIM, and USB2.0
- 1x half-length miniPCIe socket with USB2.0 and USB3.0
- USB Type-C with USB PD Sink capability and peripheral support
- USB Type-C with USB 3.0 host support
- on-board 802.11abgnac with Bluetooth 5.2
- Wide range DC input supply
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The Gateworks imx8mp-venice-gw72xx-2x consists of a SOM + baseboard.
The GW702x SOM contains the following:
- i.MX8M Plus SoC
- LPDDR4 memory
- eMMC Boot device
- Gateworks System Controller (GSC) with integrated EEPROM, button
controller, and ADC's
- PMIC
- SOM connector providing:
- eQoS GbE MII
- 1x SPI
- 2x I2C
- 4x UART
- 2x USB 3.0
- 1x PCI
- 1x SDIO (4-bit 3.3V)
- 1x SDIO (4-bit 3.3V/1.8V)
- GPIO
The GW72xx Baseboard contains the following:
- GPS
- microSD
- off-board I/O connector with SPI
- off-board I/O connector with I2C, and GPIO
- off-board I/O connector with MIPI DSI, MIPI CSI, I2C, and GPIO
- off-board I/O connector with RS232 and RS485
- EERPOM
- USB 3.0 HUB
- USB 3.0 TypeA socket
- USB 2.0 Micro-B OTG socket
- Accelerometer
- 1x GbE (eQoS)
- 1x GbE (PCI)
- PCIe clock generator
- PCIe switch
- 1x full-length miniPCIe socket with PCI and USB2.0
- 1x full-length miniPCIe socket with PCI/USB3 (via mux) SIM, and USB2.0
- 1x half-length miniPCIe socket with USB2.0 and USB3.0
- USB Type-C with USB PD Sink capability and peripheral support
- USB Type-C with USB 3.0 host support
- Wide range DC input supply
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
The Gateworks imx8mm-venice-gw7905-0x consists of a SOM + baseboard.
The GW700x SOM contains the following:
- i.MX8M Mini SoC
- LPDDR4 memory
- eMMC Boot device
- Gateworks System Controller (GSC) with integrated EEPROM, button
controller, and ADC's
- PMIC
- SOM connector providing:
- FEC GbE MII
- 1x SPI
- 2x I2C
- 4x UART
- 2x USB 2.0
- 1x PCI
- 1x SDIO (4-bit 3.3V)
- 1x SDIO (4-bit 3.3V/1.8V)
- GPIO
The GW7905 Baseboard contains the following:
- GPS
- microSD
- off-board I/O connector with I2C, SPI, GPIO
- EERPOM
- PCIe clock generator
- 1x full-length miniPCIe socket with PCI/USB3 (via mux) and USB2.0
- 1x half-length miniPCIe socket with USB2.0 and USB3.0
- USB 3.0 HUB
- USB Type-C with USB PD Sink capability and peripheral support
- USB Type-C with USB 3.0 host support
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add DT compatible string for a Gateworks GW73xx-2x board based on
the i.MX8M Plus SoC from NXP.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add DT compatible string for a Gateworks GW72xx-2x board based on
the i.MX8M Plus SoC from NXP.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add DT compatible string for a Gateworks GW71xx-2x board based on
the i.MX8M Plus SoC from NXP.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add DT compatible string for a Gateworks GW7905-0x board based on
the i.MX8M Mini from NXP.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
These drivers are used on i.MX93 based devices.
Signed-off-by: Alexander Stein <alexander.stein@ew.tq-group.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Add support for the following Raspberry Pi displays:
- DFROBOT DRF0678 7in 800x480 TFT DSI capacitive touch
- DFROBOT DRF0550 5in 800x480 TFT DSI capacitive touch
Both have the following hardware:
- FocalTech FT5406 10pt touch controller (with no interrupt)
- Powertip PH800480T013-IDF02 compatible panel
- Toshiba TC358762 compatible DSI to DBI bridge
- ATTINY based regulator used for backlight controller and panel enable
Support is added via a device-tree overlay. The touch controller is not
yet supported as polling mode is needed.
Signed-off-by: Tim Harvey <tharvey@gateworks.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
USB OTG is currently not working for new versions of the Variscite
Symphony EVK and imx8mn nano SOM (versions >= 1.4a).
The PTN5150 circuitry on newer versions of the Symphony EVK board has
a non-standard configuration in which the PTN5150 IRQ pin is left
unconnected, and the PTN5150 ID pin is connected to GPIO1_IO11. This
requires changes to the ptn5150 driver to support this new mode.
Variscite have indicated their intention to submit those changes
upstream.
In the meantime, import device tree changes from linux-5.15 branch of
varigit repos to at least make the USB OTG port operate correctly in
host mode.
Signed-off-by: Hugo Villeneuve <hvilleneuve@dimonoff.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
Modern GSC firmwares have both static and dynamic MKHI clients.
Avoid expensive dynamic client call for firmware version retrieval,
in case the firmware version is already retrieved from the fix address
client in bus_fixup().
Signed-off-by: Alexander Usyskin <alexander.usyskin@intel.com>
Signed-off-by: Tomas Winkler <tomas.winkler@intel.com>
Link: https://lore.kernel.org/r/20230716081043.3092690-3-tomas.winkler@intel.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Enable asynchronous suspend for devices on MEI bus,
required for gsc.
Signed-off-by: Alexander Usyskin <alexander.usyskin@intel.com>
Signed-off-by: Tomas Winkler <tomas.winkler@intel.com>
Link: https://lore.kernel.org/r/20230716081043.3092690-2-tomas.winkler@intel.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
In order to extend debug information log firmware status details
when waiting for firmware ready status fails.
Signed-off-by: Alexander Usyskin <alexander.usyskin@intel.com>
Signed-off-by: Tomas Winkler <tomas.winkler@intel.com>
Link: https://lore.kernel.org/r/20230716081043.3092690-1-tomas.winkler@intel.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
This source file already includes <linux/miscdevice.h>, which contains
the same macro. It doesn't need to be defined here again.
Fixes: 874bcd00f5 ("apm-emulation: move APM_MINOR_DEV to include/linux/miscdevice.h")
Signed-off-by: Randy Dunlap <rdunlap@infradead.org>
Cc: Jiri Kosina <jikos@kernel.org>
Cc: x86@kernel.org
Cc: Sohil Mehta <sohil.mehta@intel.com>
Cc: Corentin Labbe <clabbe.montjoie@gmail.com>
Reviewed-by: Sohil Mehta <sohil.mehta@intel.com>
Link: https://lore.kernel.org/r/20230728011120.759-1-rdunlap@infradead.org
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Previously, there was no way to query the number of lanes for a network
card, so the same netdev_speed would result in a fixed pair of width and
speed. As network card specifications become more diverse, such fixed
mode is no longer suitable, so a method is needed to obtain the correct
width and speed based on the number of lanes.
This patch retrieves netdev lanes and speed from net_device and
translates them to IB width and speed.
Signed-off-by: Haoyue Xu <xuhaoyue1@hisilicon.com>
Signed-off-by: Luoyouming <luoyouming@huawei.com>
Signed-off-by: Junxian Huang <huangjunxian6@hisilicon.com>
Link: https://lore.kernel.org/r/20230721092052.2090449-1-huangjunxian6@hisilicon.com
Signed-off-by: Leon Romanovsky <leon@kernel.org>
The PCI function 2 on ASIX AX99100 PCIe to Multi I/O Controller can be
configured as a single-port parallel port controller. The subvendor id
is 0x2000 when configured as parallel port. It supports IEEE-1284 EPP /
ECP with its ECR on BAR1.
Signed-off-by: Jiaqing Zhao <jiaqing.zhao@linux.intel.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Sudip Mukherjee <sudipm.mukherjee@gmail.com>
Link: https://lore.kernel.org/r/20230724083933.3173513-5-jiaqing.zhao@linux.intel.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Each of the 4 PCI functions on ASIX AX99100 PCIe to Multi I/O
Controller can be configured as a single-port serial port controller.
The subvendor id is 0x1000 when configured as serial port and MSI
interrupts are supported.
Signed-off-by: Jiaqing Zhao <jiaqing.zhao@linux.intel.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20230724083933.3173513-4-jiaqing.zhao@linux.intel.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Move PCI Vendor and Device ID of ASIX AX99100 PCIe to Multi I/O
Controller to pci_ids.h for its serial and parallel port driver
support in subsequent patches.
Signed-off-by: Jiaqing Zhao <jiaqing.zhao@linux.intel.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Bjorn Helgaas <bhelgaas@google.com>
Acked-by: Marc Kleine-Budde <mkl@pengutronix.de>
Link: https://lore.kernel.org/r/20230724083933.3173513-3-jiaqing.zhao@linux.intel.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
PCI_SUBVENDOR_ID_ASIX is defined as 0xa000, which is not the vendor id
assigned to ASIX by PCI-SIG. Remove it to avoid possible confusion and
conflict.
Signed-off-by: Jiaqing Zhao <jiaqing.zhao@linux.intel.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Marc Kleine-Budde <mkl@pengutronix.de>
Link: https://lore.kernel.org/r/20230724083933.3173513-2-jiaqing.zhao@linux.intel.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
The global pointer 'sprd_port' may not zero when sprd_probe returns
failure, that is a risk for sprd_port to be accessed afterward, and
may lead to unexpected errors.
For example:
There are two UART ports, UART1 is used for console and configured in
kernel command line, i.e. "console=";
The UART1 probe failed and the memory allocated to sprd_port[1] was
released, but sprd_port[1] was not set to NULL;
In UART2 probe, the same virtual address was allocated to sprd_port[2],
and UART2 probe process finally will go into sprd_console_setup() to
register UART1 as console since it is configured as preferred console
(filled to console_cmdline[]), but the console parameters (sprd_port[1])
belong to UART2.
So move the sprd_port[] assignment to where the port already initialized
can avoid the above issue.
Fixes: b7396a38fb ("tty/serial: Add Spreadtrum sc9836-uart driver support")
Signed-off-by: Chunyan Zhang <chunyan.zhang@unisoc.com>
Link: https://lore.kernel.org/r/20230725064053.235448-1-chunyan.zhang@unisoc.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
According to the IOControl register bits description in the page 31 of
the product datasheet, we know the bit 3 of IOControl register is
softreset, this bit will self-clearing once the reset finish.
In the probe, the softreset bit is set, and when we read this register
from debugfs/regmap interface, we found the softreset bit is still
setting, this confused us for a while. Finally we found this register
is cached, to read the real value from register, we could put it
into the regmap_volatile().
Signed-off-by: Hui Wang <hui.wang@canonical.com>
Link: https://lore.kernel.org/r/20230724034727.17335-1-hui.wang@canonical.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
in asc_init_port, clk_prepare_enable may fail, therefore, the
return value of clk_prepare_enable should be checked.
Signed-off-by: Yuanjun Gong <ruc_gongyuanjun@163.com>
Link: https://lore.kernel.org/r/20230717144733.24194-1-ruc_gongyuanjun@163.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Macroses for name generation are not useful. They hide the real place
for object declaration. Instead, use direct names such as
'meson_uart_driver_*' and 'meson_serial_console_*' for all objects.
Additionally, rename 'MESON_SERIAL_CONSOLE_DEFINE()' to
'MESON_SERIAL_CONSOLE()', and 'MESON_UART_DRIVER_DEFINE()' to
'MESON_UART_DRIVER()' to simplify the code.
Signed-off-by: Dmitry Rokosov <ddrokosov@sberdevices.ru>
Suggested-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20230728071522.17503-1-ddrokosov@sberdevices.ru
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
If ioremap() fails, it returns NULL pointer, not ERR_PTR(), fix the
return value check and call release_mem_region() to release resource.
Fixes: c563831ba8 ("8250_men_mcb: Make UART config auto configurable")
Signed-off-by: Yang Yingliang <yangyingliang@huawei.com>
Link: https://lore.kernel.org/r/20230728085723.3195044-1-yangyingliang@huawei.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Add code to expose some of the HW counters related
to tx/rx data and Congestion control.
Signed-off-by: Chandramohan Akula <chandramohan.akula@broadcom.com>
Signed-off-by: Selvin Xavier <selvin.xavier@broadcom.com>
Link: https://lore.kernel.org/r/1690383081-15033-4-git-send-email-selvin.xavier@broadcom.com
Signed-off-by: Leon Romanovsky <leon@kernel.org>
Report the additional resource counters which enables
better debugging. Includes active RC/UD QPs,
Watermark of the resources and a count that indicates the
resize cq operations after driver load.
Signed-off-by: Chandramohan Akula <chandramohan.akula@broadcom.com>
Signed-off-by: Selvin Xavier <selvin.xavier@broadcom.com>
Link: https://lore.kernel.org/r/1690383081-15033-3-git-send-email-selvin.xavier@broadcom.com
Signed-off-by: Leon Romanovsky <leon@kernel.org>
The HX3 family comes in different variants (up to 4 USB 3.0 ports;
multi-TT), e.g. CYUSB330x/CYUSB331x/CYUSB332x/CYUSB230x.
This initial version of the binding only describes USB related aspects
of the HX3 family, it does not cover the option of connecting the
controller as an i2c slave.
Reviewed-by: Rob Herring <robh@kernel.org>
Signed-off-by: Benjamin Bara <benjamin.bara@skidata.com>
Link: https://lore.kernel.org/r/20230620-hx3-v7-3-f79b4b22a1bf@skidata.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
The HX3 comes in different variants (up to 4 USB 3.0 ports; multi-TT),
e.g. CYUSB330x/CYUSB331x/CYUSB332x/CYUSB230x. It operates with two
different power supplies: 1V2 and 3V3.
Add the support for this hub, for controlling the reset pin and the
power supplies.
Reset time is extracted from data sheet, page 24:
"The RESETN pin can be tied to VDD_IO through an external resistor and
to ground (GND) through an external capacitor (minimum 5 ms time
constant)."
V_IH min is given at 0.7 * 3V3 (page 34), therefore use 10ms.
Also add USB PIDs for the USB 2.0 and USB 3.0 root hub.
Acked-by: Matthias Kaehlcke <mka@chromium.org>
Signed-off-by: Benjamin Bara <benjamin.bara@skidata.com>
Link: https://lore.kernel.org/r/20230620-hx3-v7-2-f79b4b22a1bf@skidata.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
