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1,233,488 commits

Author SHA1 Message Date
Krzysztof Kozlowski
c756d23371 arm64: dts: qcom: msm8916-gt5: drop incorrect accelerometer interrupt-names
st,lis2hh12 accelerometer binding does not allow interrupt-names:

  msm8916-samsung-gt58.dtb: accelerometer@1d: 'interrupt-names' does not match any of the regexes: 'pinctrl-[0-9]+'

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Nikita Travkin <nikita@trvn.ru>
Link: https://lore.kernel.org/r/20230617171541.286957-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-07-09 21:26:40 -07:00
Krzysztof Kozlowski
ba492bea16 arm64: dts: qcom: sc8180x-flex-5g: remove superfluous "input-enable"
Pin configuration property "input-enable" was used with the intention to
disable the output, but this is done by default by Linux drivers.  Since
commit c4a48b0df8 ("dt-bindings: pinctrl: qcom: tlmm should use
output-disable, not input-enable") the property is not accepted anymore.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230617112115.130024-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-07-09 21:26:40 -07:00
Krzysztof Kozlowski
9e3a0c7acb arm64: dts: qcom: apq8039-t2: remove superfluous "input-enable"
Pin configuration property "input-enable" was used with the intention to
disable the output, but this is done by default by Linux drivers.  Since
commit c4a48b0df8 ("dt-bindings: pinctrl: qcom: tlmm should use
output-disable, not input-enable") the property is not accepted anymore.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230617112115.130024-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-07-09 21:26:40 -07:00
Krzysztof Kozlowski
b02966f868 arm64: dts: qcom: sm8450: correct crypto unit address
Crypto node unit address should match reg.

Fixes: b92b0d2f75 ("arm64: dts: qcom: sm8450: add crypto nodes")
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230616174955.1783652-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-07-09 21:26:40 -07:00
Konrad Dybcio
adc16b84e1 arm64: dts: qcom: sc7180: Hook up BWMONs
Hook up 2 out of 4 (the rest are for NPU) BWMONs exposed on the SC7180.
This allows for scaling DDR and LLCC independently from cpufreq.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Tested-by: Nikita Travkin <nikita@trvn.ru> # Aspire 1
Link: https://lore.kernel.org/r/20230616-topic-sc7180_bwmons-v1-2-4ddb96f9a6cd@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-07-09 21:26:40 -07:00
Vincent Guittot
775a5283c2 arm64: dts: qcom: sm8250: correct dynamic power coefficients
sm8250 faces the same problem with its Energy Model as sdm845. The energy
cost of LITTLE cores is reported to be higher than medium or big cores

EM computes the energy with formula:

energy = OPP's cost / maximum cpu capacity * utilization

On v6.4-rc6 we have:
max capacity of CPU0 = 284
capacity of CPU0's OPP(1612800 Hz) = 253
cost of CPU0's OPP(1612800 Hz) = 191704

max capacity of CPU4 = 871
capacity of CPU4's OPP(710400 Hz) = 255
cost of CPU4's OPP(710400 Hz) = 343217

Both OPPs have almost the same compute capacity but the estimated energy
per unit of utilization will be estimated to:

energy CPU0 = 191704 / 284 * 1 = 675
energy CPU4 = 343217 / 871 * 1 = 394

EM estimates that little CPU0 will consume 71% more than medium CPU4 for
the same compute capacity. According to [1], little consumes 25% less than
medium core for Coremark benchmark at those OPPs for the same duration.

Set the dynamic-power-coefficient of CPU0-3 to 105 to fix the energy model
for little CPUs.

[1] https://github.com/kdrag0n/freqbench/tree/master/results/sm8250/k30s

Fixes: 6aabed5526 ("arm64: dts: qcom: sm8250: Add CPU capacities and energy model")
Signed-off-by: Vincent Guittot <vincent.guittot@linaro.org>
Link: https://lore.kernel.org/r/20230615154852.130076-1-vincent.guittot@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-07-09 21:26:40 -07:00
Dmitry Baryshkov
1770394e68 arm64: dts: qcom: msm8996: rename labels for HDMI nodes
In board files MDSS and HDMI nodes do not come next to each other,
because labels for HDMI nodes do not have the common mdss_ prefix.

Follow the DSI example and enable such grouping by changing the prefix
for HDMI labels to mdss_hdmi_*.

Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230615083422.350297-3-dmitry.baryshkov@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-07-09 21:26:40 -07:00
Dmitry Baryshkov
2b812caf5f Revert "arm64: dts: qcom: msm8996: rename labels for HDMI nodes"
The commit f43b6dc7d5 ("arm64: dts: qcom: msm8996: rename labels for
HDMI nodes") is broken, it changes all the HDMI node names,
compatible strings instead of changing just node aliases. Revert the
commit in order to land a proper clean version.

Reported-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Fixes: f43b6dc7d5 ("arm64: dts: qcom: msm8996: rename labels for HDMI nodes")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230615083422.350297-2-dmitry.baryshkov@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-07-09 21:26:40 -07:00
Konrad Dybcio
26c71d31f8 arm64: dts: qcom: sm6350: Add DPU1 nodes
Add nodes required to enable MDSS/DPU1 on SM6350. There seem to be no
additional changes required to support the derivative SoCs, such as
SM7225.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230315-topic-lagoon_gpu-v2-7-afcdfb18bb13@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-07-09 21:26:39 -07:00
Konrad Dybcio
44bcded2be arm64: dts: qcom: sm6350: Fix ZAP region
The previous ZAP region definition was wrong. Fix it.
Note this is not a device-specific fixup, but a fixup to the generic
PIL load address.

Fixes: 5f82b9cda6 ("arm64: dts: qcom: Add SM6350 device tree")
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Reviewed-by: Luca Weiss <luca.weiss@fairphone.com>
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230315-topic-lagoon_gpu-v2-6-afcdfb18bb13@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-07-09 21:26:39 -07:00
Konrad Dybcio
bd9b767502 arm64: dts: qcom: sm6350: Add GPU nodes
Add Adreno, GPU SMMU and GMU nodes to hook up everything that
the A619 needs to function properly.

Co-developed-by: Luca Weiss <luca.weiss@fairphone.com>
Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Signed-off-by: Luca Weiss <luca.weiss@fairphone.com>
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230315-topic-lagoon_gpu-v2-5-afcdfb18bb13@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-07-09 21:26:39 -07:00
Konrad Dybcio
5b1e5d9a21 arm64: dts: qcom: sm6350: Add QFPROM node
Add a node for the QFPROM NVMEM hw and define the GPU fuse.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Reviewed-by: Luca Weiss <luca.weiss@fairphone.com>
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230315-topic-lagoon_gpu-v2-4-afcdfb18bb13@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-07-09 21:26:39 -07:00
Konrad Dybcio
75a511b1e5 arm64: dts: qcom: sm6350: Add GPUCC node
Add and configure a node for the GPU clock controller.

Signed-off-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Reviewed-by: Luca Weiss <luca.weiss@fairphone.com>
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230315-topic-lagoon_gpu-v2-3-afcdfb18bb13@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-07-09 21:26:39 -07:00
Dmitry Baryshkov
3091e5820a arm64: dts: qcom: sm8150: use proper DSI PHY compatible
The DSI PHY on the Qualcomm SM8150 platform requires platform-specific
handling. Use the proper SoC-specific compatible string for the DSI
PHYs.

Reported-by: Degdag Mohamed <degdagmohamed@gmail.com>
Fixes: 2ef3bb17c4 ("arm64: dts: qcom: sm8150: Add DISPCC node")
Cc: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Marijn Suijten <marijn.suijten@somainline.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230612031623.3620155-1-dmitry.baryshkov@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-07-09 21:26:39 -07:00
Varadarajan Narayanan
ec4f047679 arm64: dts: qcom: ipq9574: Enable USB
Add regulator defines
Turn on USB related nodes
Provide vdd info

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com>
Link: https://lore.kernel.org/r/5021dbf3a28ee073795e7580bfa019df465e16ed.1686289721.git.quic_varada@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-07-09 21:26:39 -07:00
Varadarajan Narayanan
d5506524d9 arm64: dts: qcom: ipq9574: Add LDO regulator node
Add LDO regulator node

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com>
Link: https://lore.kernel.org/r/49b03513a012545651c7d0f149958c78de819880.1686289721.git.quic_varada@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-07-09 21:26:39 -07:00
Varadarajan Narayanan
a98bfb31f6 arm64: dts: qcom: ipq9574: Add USB related nodes
Add USB phy and controller related nodes

SS PHY need two supplies and HS PHY needs three supplies. 0.925V
and 3.3V are from fixed regulators and 1.8V is generated from
PMIC's LDO

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com>
Link: https://lore.kernel.org/r/37bd667c065b6c254c7e60ab4ad3a3afbe3b0fac.1686289721.git.quic_varada@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-07-09 21:26:39 -07:00
Bjorn Andersson
58d359fdc0 Merge branch 'd1c5aa4a8535c645fdb06df62a562918516ba0c6.1686289721.git.quic_varada@quicinc.com' into HEAD
Merge topic branch with USB clock defines for IPQ9574 into the
DeviceTree source tree.
2023-07-09 21:25:23 -07:00
Bjorn Andersson
1b06d8ca08 soc: qcom: rpmh-rsc: Include state in trace event
When tracing messages written to the RSC it's very useful to know the
type of TCS being targeted, in particular if/when the code borrows a
WAKE TCS for ACTIVE votes.

Add the "state" of the message to the traced information.

While at it, drop the "send-msg:" substring, as this is already captured
by the trace event itself.

Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com>
Acked-by: Manivannan Sadhasivam <manivannan.sadhasivam@linaro.org>
Acked-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230620230058.428833-1-quic_bjorande@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-07-09 21:18:35 -07:00
Bjorn Andersson
d4600cbd5b soc: qcom: cmd-db: Drop NUL bytes from debugfs output
The debugfs dump of Command DB relies uses %*pEp to print the resource
identifiers, with escaping of non-printable characters.
But p (ESCAPE_NP) does not escape NUL characters, so for identifiers
less than 8 bytes in length the output will retain these.

This does not cause an issue while looking at the dump in the terminal
(no known complaints at least), but when programmatically consuming the
debugfs output the extra characters are unwanted.

Change the fixed 8-byte sizeof() to a dynamic strnlen() to avoid
printing these NUL characters.

Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230620213703.283583-1-quic_bjorande@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-07-09 21:18:29 -07:00
Krzysztof Kozlowski
594ccb8d24 ARM: dts: qcom: msm8960: drop spi-max-frequency from controller
spi-max-frequency is a property of SPI device, not SPI controller.  Drop
it from the controller nodes.  No functional impact expected, although
qcom-msm8960-samsung-expressatt board does not have any child SPI
devices thus the property disappears.  This fixes dtbs_check warnings
like:

  qcom-msm8960-cdp.dtb: spi@16080000: Unevaluated properties are not allowed ('spi-max-frequency' was unexpected)

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230619170151.65505-4-krzysztof.kozlowski@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-07-09 21:14:53 -07:00
Krzysztof Kozlowski
1bfeee1aee ARM: dts: qcom: ipq8064: drop spi-max-frequency from controller
spi-max-frequency is a property of SPI device, not SPI controller.  Drop
it from the controller nodes.  No functional impact expected because
child SPI device already defines spi-max-frequency.  This fixes
dtbs_check warnings like:

  qcom-ipq8064-ap148.dtb: spi@1a280000: Unevaluated properties are not allowed ('spi-max-frequency' was unexpected)

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230619170151.65505-3-krzysztof.kozlowski@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-07-09 21:14:35 -07:00
Chen PJ
3f2879e404 ARM: dts: aspeed: Adding Inventec Starscream BMC
Initial introduction of Inventec Starscream x86 family
equipped with AST2600 BMC SoC.

Signed-off-by: Chen PJ <Chen.pj@inventec.com>
Link: https://lore.kernel.org/r/20230703060222.24263-2-chen.pj@inventec.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
2023-07-10 13:44:20 +09:30
Krzysztof Kozlowski
9a3b29c33b ARM: dts: qcom: sdx55: use generic node names for USB
Device node names should be generic which is also expected by USB
bindings:

  qcom-sdx55-t55.dtb: dwc3@a600000: $nodename:0: 'dwc3@a600000' does not match '^usb(@.*)?'

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230619170151.65505-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-07-09 21:14:11 -07:00
Krzysztof Kozlowski
7caf09215c ARM: dts: qcom: ipq4019: use generic node names for USB
Device node names should be generic which is also expected by USB
bindings:

  qcom-ipq4018-jalapeno.dtb: dwc3@6000000: $nodename:0: 'dwc3@6000000' does not match '^usb(@.*)?'

Override also the DWC3 node in qcom-ipq4018-ap120c-ac.dtsi by
label/phandle, not via node path, because it is less error-prone and
makes the overriding node-name independent.

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230619170151.65505-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-07-09 21:13:51 -07:00
Chen PJ
d1dbb0d34e dt-bindings: arm: aspeed: add Inventec starscream-bmc
Document the new compatibles used on Inventec starscream-bmc

Signed-off-by: Chen PJ <Chen.pj@inventec.com>
Acked-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230703060222.24263-1-chen.pj@inventec.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
2023-07-10 13:43:13 +09:30
Dmitry Baryshkov
dc015a3a6d arm64: defconfig: enable Qualcomm MSM8996 Global Clock Controller as built-in
The commit 8f680c2874 ("arm64: defconfig: Switch msm8996 clk drivers
to module") switched CONFIG_MSM_MMCC_8996 to module, which also resulted
in CONFIG_MSM_GCC_8996 being switched to module. This breaks useful
bootflow for Qualcomm MSM8996 / APQ8096 platforms, because the serial is
not enabled anymore until the GCC module is loaded.

Reported-by: Rob Clark <robdclark@gmail.com>
Fixes: 8f680c2874 ("arm64: defconfig: Switch msm8996 clk drivers to module")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230619125404.562137-1-dmitry.baryshkov@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-07-09 21:11:49 -07:00
Eddie James
267c95dc9f ARM: dts: aspeed: bonnell: Add DIMM SPD
Add the DIMM SPD to the processor I2C busses.

Signed-off-by: Eddie James <eajames@linux.ibm.com>
Reviewed-by: Joel Stanley <joel@jms.id.au>
Link: https://lore.kernel.org/r/20230322140348.569397-5-eajames@linux.ibm.com
Signed-off-by: Joel Stanley <joel@jms.id.au>
2023-07-10 13:41:38 +09:30
Konrad Dybcio
98c8b3efac soc: qcom: rpmpd: Add sync_state
Add a sync_state implementation, very similar to the one already present
in the RPMhPD driver.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230619-topic-rpmpd_syncstate-v1-1-54f986cf9444@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-07-09 21:11:32 -07:00
Luca Weiss
4bad24d73a ARM: dts: qcom: msm8226: Add ocmem
Add a node for the ocmem found on msm8226. It contains one region, used
as gmu_ram.

Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
Link: https://lore.kernel.org/r/20230506-msm8226-ocmem-v3-6-79da95a2581f@z3ntu.xyz
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-07-09 20:55:21 -07:00
Luca Weiss
2976eec238 soc: qcom: ocmem: Add support for msm8226
The msm8226 SoC also contains OCMEM but with one region only.

Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
Link: https://lore.kernel.org/r/20230506-msm8226-ocmem-v3-5-79da95a2581f@z3ntu.xyz
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-07-09 20:54:40 -07:00
Luca Weiss
f77b2d7607 dt-bindings: sram: qcom,ocmem: Add msm8226 support
Add the compatible for the OCMEM found on msm8226 which compared to
msm8974 only has a core clock and no iface clock.

Reviewed-by: Conor Dooley <conor.dooley@microchip.com>
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
Link: https://lore.kernel.org/r/20230506-msm8226-ocmem-v3-4-79da95a2581f@z3ntu.xyz
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-07-09 20:54:39 -07:00
Luca Weiss
a7e12e7bda soc: qcom: ocmem: make iface clock optional
Some platforms such as msm8226 do not have an iface clk. Since clk_bulk
APIs don't offer to a way to treat some clocks as optional simply add
core_clk and iface_clk members to our drvdata.

Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
Link: https://lore.kernel.org/r/20230506-msm8226-ocmem-v3-3-79da95a2581f@z3ntu.xyz
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-07-09 20:54:39 -07:00
Luca Weiss
7a2fcba1f4 soc: qcom: ocmem: Use dev_err_probe where appropriate
Use dev_err_probe in the driver probe function where useful, to simplify
getting PTR_ERR and to ensure the underlying errors are included in the
error message.

Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
Link: https://lore.kernel.org/r/20230506-msm8226-ocmem-v3-2-79da95a2581f@z3ntu.xyz
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-07-09 20:54:39 -07:00
Luca Weiss
a7b484b1c9 soc: qcom: ocmem: Fix NUM_PORTS & NUM_MACROS macros
Since we're using these two macros to read a value from a register, we
need to use the FIELD_GET instead of the FIELD_PREP macro, otherwise
we're getting wrong values.

So instead of:

  [    3.111779] ocmem fdd00000.sram: 2 ports, 1 regions, 512 macros, not interleaved

we now get the correct value of:

  [    3.129672] ocmem fdd00000.sram: 2 ports, 1 regions, 2 macros, not interleaved

Fixes: 88c1e9404f ("soc: qcom: add OCMEM driver")
Reviewed-by: Caleb Connolly <caleb.connolly@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
Link: https://lore.kernel.org/r/20230506-msm8226-ocmem-v3-1-79da95a2581f@z3ntu.xyz
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-07-09 20:54:39 -07:00
Konrad Dybcio
0276f69f13 soc: qcom: icc-bwmon: Set default thresholds dynamically
Currently we use predefined initial threshold values. This works, but
does not really scale well with more and more SoCs gaining bwmon support,
as the necessary kickoff values may differ between platforms due to memory
type and/or controller setup.
All of the data we need for that is already provided in the device tree,
anyway.

Change the thresholds to:
* low = 0 (as we've been doing up until now)
* med = high = BW_MIN

Throughput going below the med threshold nudges bwmon into signaling
that we should slow down (e.g. if we inherited too high bandwidth
from the bootloader).

Throughput going above the high threshold nudges bwmon into signaling
that we should speed up so as not to choke the bus traffic due to
insufficient transfer rates.

F_MIN is a perfect initial value for both of these cases - if we go
above it (and there's a 99.99% chance it'll happen at boot time), we
should definitely make the memory go faster, whereas if we go below it,
we should slow down, no matter what performance state we were at before
(it's only possible for them to be >= FMIN).

This only changes the values programmed at probe time, as high and med
thresholds are updated at interrupt, also based on the OPP table from DT.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Reviewed-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230610-topic-bwmon_opp-v2-1-0d25c1ce7dca@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-07-09 20:53:59 -07:00
Konrad Dybcio
743913b343 clk: qcom: gpucc-sm6350: Fix clock source names
fw_name for GCC inputs didn't match the bindings. Fix it.

Fixes: 013804a727 ("clk: qcom: Add GPU clock controller driver for SM6350")
Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230315-topic-lagoon_gpu-v2-2-afcdfb18bb13@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-07-09 20:53:09 -07:00
Konrad Dybcio
f6f89d194e clk: qcom: gpucc-sm6350: Introduce index-based clk lookup
Add the nowadays-prefered and marginally faster way of looking up parent
clocks in the device tree. It also allows for clock-names-independent
operation, so long as the order (which is enforced by schema) is kept.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230315-topic-lagoon_gpu-v2-1-afcdfb18bb13@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-07-09 20:53:09 -07:00
Dmitry Baryshkov
798f1df86e arm64: dts: qcom: qrb5165-rb5: fix thermal zone conflict
The commit 3a786086c6 ("arm64: dts: qcom: Add missing "-thermal"
suffix for thermal zones") renamed the thermal zone in the pm8150l.dtsi
file to comply with the schema. However this resulted in a clash with
the RB5 board file, which already contained the pm8150l-thermal zone for
the on-board sensor. This resulted in the board file definition
overriding the thermal zone defined in the PMIC include file (and thus
the on-die PMIC temp alarm was not probing at all).

Rename the thermal zone in qcom/qrb5165-rb5.dts to remove this override.

Fixes: 3a786086c6 ("arm64: dts: qcom: Add missing "-thermal" suffix for thermal zones")
Signed-off-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230613131224.666668-1-dmitry.baryshkov@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-07-09 20:52:05 -07:00
Varadarajan Narayanan
745dfa0786 clk: qcom: gcc-ipq9574: Add USB related clocks
Add the clocks needed for enabling USB in IPQ9574

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com>
Link: https://lore.kernel.org/r/d1c5aa4a8535c645fdb06df62a562918516ba0c6.1686289721.git.quic_varada@quicinc.com
[bjorn: Clock defines split out to separate commit]
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-07-09 20:43:33 -07:00
Bjorn Andersson
9e1857ee65 Merge branch 'd1c5aa4a8535c645fdb06df62a562918516ba0c6.1686289721.git.quic_varada@quicinc.com' into clk-for-6.6
Merge the USB clock constants from a topic branch, to allow them to be
used in DeviceTree source as well.
2023-07-09 20:41:52 -07:00
Varadarajan Narayanan
85c0d23009 dt-bindings: clock: Add USB related clocks for IPQ9574
Add the clocks needed for enabling USB in IPQ9574

Reviewed-by: Dmitry Baryshkov <dmitry.baryshkov@linaro.org>
Acked-by: Stephen Boyd <sboyd@kernel.org>
Signed-off-by: Varadarajan Narayanan <quic_varada@quicinc.com>
Link: https://lore.kernel.org/r/d1c5aa4a8535c645fdb06df62a562918516ba0c6.1686289721.git.quic_varada@quicinc.com
[bjorn: Split from driver patch, to allow merging into dts tree]
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-07-09 20:40:33 -07:00
Konrad Dybcio
0c55f6229b arm64: dts: qcom: qcm2290: Add USB3 PHY
Describe the USB3 PHY and hook it up to the USB3 controller.

Signed-off-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230606-topic-qcm2290_usb3-v1-1-3e8fbcb89088@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-07-09 20:32:56 -07:00
Luca Weiss
d5fb01ad5e ARM: dts: qcom: msm8226: Add mdss nodes
Add the nodes that describe the mdss so that display can work on
MSM8226.

Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
Link: https://lore.kernel.org/r/20230308-msm8226-mdp-v3-7-b6284145d67a@z3ntu.xyz
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-07-09 20:31:09 -07:00
Bjorn Andersson
e0f250c8fd arm64: dts: qcom: Drop undocumented "svid" property
The Linux typec_mux implementation required that a property named "svid"
was present in the remote node of the of_graph for a match to be found.

With the introduction of commit '4aebc4f89f ("usb: typec: mux: Clean up
mux_fwnode_match()")', the implementation is aligned with the binding
and this property can be dropped - and the associated DeviceTree
validation warning resolved.

Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com>
Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Link: https://lore.kernel.org/r/20230531024944.4105769-1-quic_bjorande@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-07-09 20:27:53 -07:00
Luca Weiss
e21e74c6e2 clk: qcom: mmcc-msm8974: Add OXILICX_GDSC for msm8226
On msm8226 we also have OXILICX_GDSC but we need a slighly different
config, with a .cxcs defined for clock but with no parent.

Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Luca Weiss <luca@z3ntu.xyz>
Link: https://lore.kernel.org/r/20230506-msm8226-oxilicx-v2-1-f7e4ebff3d61@z3ntu.xyz
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-07-09 20:25:28 -07:00
Bjorn Andersson
f51a36649d arm64: defconfig: Enable Qualcomm SC8280XP GPUCC
Enable the Qualcomm SC8280XP GPU clock controller, to allow the GPU
drivers to probe.

Signed-off-by: Bjorn Andersson <quic_bjorande@quicinc.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20230620202114.83797-1-quic_bjorande@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-07-09 20:18:30 -07:00
Krzysztof Kozlowski
4d29db2043 arm64: dts: qcom: sm8350: fix BAM DMA crash and reboot
SM8350 HDK and MTP boards were silently dying and rebooting during BAM
DMA probe, probably during reading BAM_REVISION register:

  [    1.574304] vreg_bob: Setting 3008000-3960000uV
  [    1.576918] bam-dFormat: Log Type - Time(microsec) - Message -
  Optional Info
  Log Type: B - Since Boot(Power On Reset),  D - Delta,  S - Statistic
  S - QC_IMAGE_VERSION_STRING=BOOT.MXF.1.0-00637.1-LAHAINA-1
  S - IMAGE_VARIANT_STRING=SocLahainaLAA
  S - OEM_IMAGE_VERSION_STRING=crm-ubuntu77
  S - Boot Interface: UFS

It seems that BAM DMA is not yet operational, thus mark it as failed and
disable also QCE because it won't work without BAM DMA.

Fixes: f1040a7fe8 ("arm64: dts: qcom: sm8350: Add Crypto Engine support")
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230626145959.646747-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-07-09 20:17:15 -07:00
Krzysztof Kozlowski
9ea2c3fba5 arm64: dts: qcom: sc8180x: Fix OSM L3 compatible
Since commit c70edc0677 ("dt-bindings: interconnect: Add sm8350,
sc8280xp and generic OSM L3 compatibles") OSM L3 compatible should have
generic fallback:

  sc8180x-primus.dtb: interconnect@18321000: compatible: 'oneOf' conditional failed, one must be fixed:

Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230617204118.61959-3-krzysztof.kozlowski@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-07-09 20:17:15 -07:00
Krzysztof Kozlowski
6d526ee4bf arm64: dts: qcom: sm8250: Fix EPSS L3 interconnect cells
Qualcomm EPSS L3 Interconnect does not take path (third) argument.  This
was introduced by commit b5a1243832 ("arm64: dts: qcom: sm8250: Use 2
interconnect cells") which probably wanted to use 2 cells only for RPMh
interconnects.

  sm8250-hdk.dtb: interconnect@18590000: #interconnect-cells:0:0: 1 was expected

Fixes: b5a1243832 ("arm64: dts: qcom: sm8250: Use 2 interconnect cells")
Signed-off-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org>
Link: https://lore.kernel.org/r/20230617204118.61959-2-krzysztof.kozlowski@linaro.org
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
2023-07-09 20:17:15 -07:00