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5,765 commits

Author SHA1 Message Date
Liming Sun
c9215e9018 mmc: sdhci-of-dwcmshc: Re-enable support for the BlueField-3 SoC
[ Upstream commit a0753ef66c ]

The commit 08f3dff799 (mmc: sdhci-of-dwcmshc: add rockchip platform
support") introduces the use of_device_get_match_data() to check for some
chips. Unfortunately, it also breaks the BlueField-3 FW, which uses ACPI.

To fix the problem, let's add the ACPI match data and the corresponding
quirks to re-enable the support for the BlueField-3 SoC.

Reviewed-by: David Woods <davwoods@nvidia.com>
Signed-off-by: Liming Sun <limings@nvidia.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Fixes: 08f3dff799 ("mmc: sdhci-of-dwcmshc: add rockchip platform support")
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/20220809173742.178440-1-limings@nvidia.com
[Ulf: Clarified the commit message a bit]
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
2022-09-05 10:31:30 +02:00
Sebastian Reichel
30841ba786 mmc: sdhci-of-dwcmshc: rename rk3568 to rk35xx
[ Upstream commit 86e1a8e1f9 ]

Prepare driver for rk3588 support by renaming the internal data
structures.

Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Link: https://lore.kernel.org/r/20220504213251.264819-11-sebastian.reichel@collabora.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
2022-09-05 10:31:30 +02:00
Yifeng Zhao
d1541cdf5a mmc: sdhci-of-dwcmshc: add reset call back for rockchip Socs
[ Upstream commit 70f832206f ]

The reset function build in the SDHCI will not reset the logic
circuit related to the tuning function, which may cause data
reading errors. Resetting the complete SDHCI controller through
the reset controller fixes the issue.

Signed-off-by: Yifeng Zhao <yifeng.zhao@rock-chips.com>
[rebase, use optional variant of reset getter]
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Sebastian Reichel <sebastian.reichel@collabora.com>
Link: https://lore.kernel.org/r/20220504213251.264819-10-sebastian.reichel@collabora.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
2022-09-05 10:31:30 +02:00
Wenbin Mei
1c137c46d1 mmc: mtk-sd: Clear interrupts when cqe off/disable
[ Upstream commit cc5d169260 ]

Currently we don't clear MSDC interrupts when cqe off/disable, which led
to the data complete interrupt will be reserved for the next command.
If the next command with data transfer after cqe off/disable, we process
the CMD ready interrupt and trigger DMA start for data, but the data
complete interrupt is already exists, then SW assume that the data transfer
is complete, SW will trigger DMA stop, but the data may not be transmitted
yet or is transmitting, so we may encounter the following error:
mtk-msdc 11230000.mmc: CMD bus busy detected.

Signed-off-by: Wenbin Mei <wenbin.mei@mediatek.com>
Fixes: 88bd652b3c ("mmc: mediatek: command queue support")
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/20220728080048.21336-1-wenbin.mei@mediatek.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
2022-09-05 10:31:30 +02:00
Takeshi Saito
a28c93fd39 mmc: renesas_sdhi: newer SoCs don't need manual tap correction
[ Upstream commit 00e8c11c13 ]

The newest Gen3 SoCs and Gen4 SoCs do not need manual tap correction
with HS400 anymore. So, instead of checking the SDHI version, add a
quirk flag and set manual tap correction only for affected SoCs.

Signed-off-by: Takeshi Saito <takeshi.saito.xv@renesas.com>
[wsa: rebased, renamed the quirk variable, removed stale comment]
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/20220720072901.1266-1-wsa+renesas@sang-engineering.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
2022-08-25 11:45:45 +02:00
Wolfram Sang
ef577017cd mmc: tmio: avoid glitches when resetting
[ Upstream commit 2e586f8a5b ]

If we reset because of an error, we need to preserve values for the
clock frequency. Otherwise, glitches may be seen on the bus.

To achieve that, we introduce a 'preserve' parameter to the reset
function and the IP core specific reset callbacks to handle everything
accordingly.

Reported-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/20220625131722.1397-1-wsa@kernel.org
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
2022-08-25 11:45:44 +02:00
Christophe JAILLET
d37c5f24d1 mmc: meson-gx: Fix an error handling path in meson_mmc_probe()
commit b3e1cf3115 upstream.

The commit in Fixes has introduced a new error handling which should goto
the existing error handling path.
Otherwise some resources leak.

Fixes: 19c6beaa06 ("mmc: meson-gx: add device reset")
Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/be4b863bacf323521ba3a02efdc4fca9cdedd1a6.1659855351.git.christophe.jaillet@wanadoo.fr
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2022-08-25 11:45:07 +02:00
Christophe JAILLET
2de2030f37 mmc: pxamci: Fix an error handling path in pxamci_probe()
commit 98d7c5e579 upstream.

The commit in Fixes: has moved some code around without updating gotos to
the error handling path.

Update it now and release some resources if pxamci_of_init() fails.

Fixes: fa3a511546 ("mmc: pxamci: call mmc_of_parse()")
Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/6d75855ad4e2470e9ed99e0df21bc30f0c925a29.1658862932.git.christophe.jaillet@wanadoo.fr
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2022-08-25 11:45:07 +02:00
Christophe JAILLET
21d4c35e8d mmc: pxamci: Fix another error handling path in pxamci_probe()
commit b886f54c30 upstream.

The commit in Fixes: has introduced an new error handling without branching
to the existing error handling path.

Update it now and release some resources if pxamci_init_ocr() fails.

Fixes: 61951fd6cb ("mmc: pxamci: let mmc core handle regulators")
Signed-off-by: Christophe JAILLET <christophe.jaillet@wanadoo.fr>
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/07a2dcebf8ede69b484103de8f9df043f158cffd.1658862932.git.christophe.jaillet@wanadoo.fr
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
2022-08-25 11:45:07 +02:00
Liang He
3d56b64a06 mmc: cavium-thunderx: Add of_node_put() when breaking out of loop
[ Upstream commit 7ee480795e ]

In thunder_mmc_probe(), we should call of_node_put() when breaking
out of for_each_child_of_node() which has increased and decreased
the refcount during each iteration.

Fixes: 166bac38c3 ("mmc: cavium: Add MMC PCI driver for ThunderX SOCs")
Signed-off-by: Liang He <windhl@126.com>
Acked-by: Robert Richter <rric@kernel.org>
Link: https://lore.kernel.org/r/20220719095216.1241601-2-windhl@126.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
2022-08-17 15:15:37 +02:00
Liang He
baad60b572 mmc: cavium-octeon: Add of_node_put() when breaking out of loop
[ Upstream commit 19bbb49acf ]

In octeon_mmc_probe(), we should call of_node_put() when breaking
out of for_each_child_of_node() which has increased and decreased
the refcount during each iteration.

Fixes: 01d9584333 ("mmc: cavium: Add MMC support for Octeon SOCs.")
Signed-off-by: Liang He <windhl@126.com>
Acked-by: Robert Richter <rric@kernel.org>
Link: https://lore.kernel.org/r/20220719095216.1241601-1-windhl@126.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
2022-08-17 15:15:37 +02:00
Eugen Hristev
98b2ddfa94 mmc: sdhci-of-at91: fix set_uhs_signaling rewriting of MC1R
[ Upstream commit 5987e6ded2 ]

In set_uhs_signaling, the DDR bit is being set by fully writing the MC1R
register.
This can lead to accidental erase of certain bits in this register.
Avoid this by doing a read-modify-write operation.

Fixes: d0918764c1 ("mmc: sdhci-of-at91: fix MMC_DDR_52 timing selection")
Signed-off-by: Eugen Hristev <eugen.hristev@microchip.com>
Tested-by: Karl Olsen <karl@micro-technic.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Link: https://lore.kernel.org/r/20220630090926.15061-1-eugen.hristev@microchip.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
2022-08-17 15:15:31 +02:00
Lad Prabhakar
a42d829b75 mmc: renesas_sdhi: Get the reset handle early in the probe
[ Upstream commit 0dac1e498f ]

In case of devm_reset_control_get_optional_exclusive() failure we returned
directly instead of jumping to the error path to roll back initialization.

This patch moves devm_reset_control_get_optional_exclusive() early in the
probe so that we have the reset handle prior to initialization of the
hardware.

Fixes: b4d86f37ea ("mmc: renesas_sdhi: do hard reset if possible")
Reported-by: Pavel Machek <pavel@denx.de>
Signed-off-by: Lad Prabhakar <prabhakar.mahadev-lad.rj@bp.renesas.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20220624181438.4355-2-prabhakar.mahadev-lad.rj@bp.renesas.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
2022-08-17 15:15:30 +02:00
Fabio Estevam
e972c9f132 mmc: mxcmmc: Silence a clang warning
[ Upstream commit 7dc65e3c0e ]

Change the of_device_get_match_data() cast to (uintptr_t)
to silence the following clang warning:

drivers/mmc/host/mxcmmc.c:1028:18: warning: cast to smaller integer type 'enum mxcmci_type' from 'const void *' [-Wvoid-pointer-to-enum-cast]

Reported-by: kernel test robot <lkp@intel.com>
Fixes: 8223e885e7 ("mmc: mxc: Convert the driver to DT-only")
Signed-off-by: Fabio Estevam <festevam@gmail.com>
Link: https://lore.kernel.org/r/20220526010022.1163483-1-festevam@gmail.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
2022-08-17 15:15:30 +02:00
Miaoqian Lin
8b902840f6 mmc: sdhci-of-esdhc: Fix refcount leak in esdhc_signal_voltage_switch
[ Upstream commit b5899a3e2f ]

of_find_matching_node() returns a node pointer with refcount
incremented, we should use of_node_put() on it when not need anymore.
Add missing of_node_put() to avoid refcount leak.
of_node_put() checks null pointer.

Fixes: ea35645a3c ("mmc: sdhci-of-esdhc: add support for signal voltage switch")
Signed-off-by: Miaoqian Lin <linmq006@gmail.com>
Link: https://lore.kernel.org/r/20220523144255.10310-1-linmq006@gmail.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
2022-08-17 15:15:30 +02:00
Tony Lindgren
51189eb9dd mmc: sdhci-omap: Fix a lockdep warning for PM runtime init
We need runtime PM enabled early in probe before sdhci_setup_host() for
sdhci_omap_set_capabilities(). But on the first runtime resume we must
not call sdhci_runtime_resume_host() as sdhci_setup_host() has not been
called yet. Let's check for an initialized controller like we already do
for context restore to fix a lockdep warning.

Fixes: f433e8aac6 ("mmc: sdhci-omap: Implement PM runtime functions")
Reported-by: Yegor Yefremov <yegorslists@googlemail.com>
Suggested-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Tony Lindgren <tony@atomide.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/20220622051215.34063-1-tony@atomide.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2022-07-13 12:29:17 +02:00
Mengqi Zhang
89bcd9a64b mmc: mediatek: wait dma stop bit reset to 0
MediaTek IP requires that after dma stop, it need to wait this dma stop
bit auto-reset to 0. When bus is in high loading state, it will take a
while for the dma stop complete. If there is no waiting operation here,
when program runs to clear fifo and reset, bus will hang.

In addition, there should be no return in msdc_data_xfer_next() if
there is data need be transferred, because no matter what error occurs
here, it should continue to excute to the following mmc_request_done.
Otherwise the core layer may wait complete forever.

Signed-off-by: Mengqi Zhang <mengqi.zhang@mediatek.com>
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/20220609112239.18911-1-mengqi.zhang@mediatek.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2022-06-15 10:05:56 -07:00
Chevron Li
e591fcf6b4 mmc: sdhci-pci-o2micro: Fix card detect by dealing with debouncing
The result from ->get_cd() may be incorrect as the card detect debouncing
isn't managed correctly. Let's fix it.

Signed-off-by: Chevron Li<chevron.li@bayhubtech.com>
Fixes: 7d44061704 ("mmc: sdhci-pci-o2micro: Fix O2 Host data read/write DLL Lock phase shift issue")
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/20220602132543.596-1-chevron.li@bayhubtech.com
[Ulf: Updated the commit message]
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2022-06-14 13:52:53 -07:00
Linus Torvalds
f7a447eda2 MMC core:
- Fix CQE recovery reset success for block I/O
 
 MMC host:
  - sdhci-pci-gli: Fix support for runtime resume
  - Fix unevaluatedProperties warnings in DT examples
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Merge tag 'mmc-v5.19-2' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc

Pull MMC fixes from Ulf Hansson:
 "MMC core:

   - Fix CQE recovery reset success for block I/O

  MMC host:

   - sdhci-pci-gli: Fix support for runtime resume

   - Fix unevaluatedProperties warnings in DT examples"

* tag 'mmc-v5.19-2' of git://git.kernel.org/pub/scm/linux/kernel/git/ulfh/mmc:
  dt-bindings: mmc: Fix unevaluatedProperties warnings in examples
  mmc: block: Fix CQE recovery reset success
  mmc: sdhci-pci-gli: Fix GL9763E runtime PM when the system resumes from suspend
2022-06-07 14:24:30 -07:00
Linus Torvalds
96479c0980 ARM: multiplatform changes, part 2
The second part of the multiplatform changes now converts the
 Intel/Marvell PXA platform along with the rest. The patches went through
 several rebases before the merge window as bugs were found, so they
 remained separate.
 
 This has to touch a lot of drivers, in particular the touchscreen,
 pcmcia, sound and clk bits, to detach the driver files from the
 platform and board specific header files.
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Merge tag 'arm-multiplatform-5.19-2' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc

Pull more ARM multiplatform updates from Arnd Bergmann:
 "The second part of the multiplatform changes now converts the
  Intel/Marvell PXA platform along with the rest. The patches went
  through several rebases before the merge window as bugs were found, so
  they remained separate.

  This has to touch a lot of drivers, in particular the touchscreen,
  pcmcia, sound and clk bits, to detach the driver files from the
  platform and board specific header files"

* tag 'arm-multiplatform-5.19-2' of git://git.kernel.org/pub/scm/linux/kernel/git/soc/soc: (48 commits)
  ARM: pxa/mmp: remove traces of plat-pxa
  ARM: pxa: convert to multiplatform
  ARM: pxa/sa1100: move I/O space to PCI_IOBASE
  ARM: pxa: remove support for MTD_XIP
  ARM: pxa: move mach/*.h to mach-pxa/
  ARM: PXA: fix multi-cpu build of xsc3
  ARM: pxa: move plat-pxa to drivers/soc/
  ARM: mmp: rename pxa_register_device
  ARM: mmp: remove tavorevb board support
  ARM: pxa: remove unused mach/bitfield.h
  ARM: pxa: move clk register definitions to driver
  ARM: pxa: move smemc register access from clk to platform
  cpufreq: pxa3: move clk register access to clk driver
  ARM: pxa: remove get_clk_frequency_khz()
  ARM: pxa: pcmcia: move smemc configuration back to arch
  ASoC: pxa: i2s: use normal MMIO accessors
  ASoC: pxa: ac97: use normal MMIO accessors
  ASoC: pxa: use pdev resource for FIFO regs
  Input: wm97xx - get rid of irq_enable method in wm97xx_mach_ops
  Input: wm97xx - switch to using threaded IRQ
  ...
2022-06-02 15:23:54 -07:00
Ben Chuang
291e7d52d1 mmc: sdhci-pci-gli: Fix GL9763E runtime PM when the system resumes from suspend
When the system resumes from suspend (S3 or S4), the power mode is
MMC_POWER_OFF. In this status, gl9763e_runtime_resume() should not enable
PLL. Add a condition to this function to enable PLL only when the power
mode is MMC_POWER_ON.

Fixes: d607667bb8 (mmc: sdhci-pci-gli: Add runtime PM for GL9763E)
Signed-off-by: Ben Chuang <benchuanggli@gmail.com>
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/20220520114242.150235-1-benchuanggli@gmail.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2022-05-31 15:31:39 +02:00
Linus Torvalds
2d2da475ac m68knommu: changes for linux 5.19
. correctly set up ZERO_PAGE pointer
 . drop ISA_DMA_API support
 . fix comment typos
 . fixes for undefined symbols
 . remove unused code and variables
 . elf-fdpic loader support for m68k
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Merge tag 'm68knommu-for-v5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/gerg/m68knommu

Pull m68knommu updates from Greg Ungerer:
 "A collection of changes to add elf-fdpic loader support for m68k.

  Also a collection of various fixes. They include typo corrections,
  undefined symbol compilation fixes, removal of the ISA_DMA_API support
  and removal of unused code.

  Summary:

   - correctly set up ZERO_PAGE pointer

   - drop ISA_DMA_API support

   - fix comment typos

   - fixes for undefined symbols

   - remove unused code and variables

   - elf-fdpic loader support for m68k"

* tag 'm68knommu-for-v5.19' of git://git.kernel.org/pub/scm/linux/kernel/git/gerg/m68knommu:
  m68knommu: fix 68000 CPU link with no platform selected
  m68k: removed unused "mach_get_ss"
  m68knommu: fix undefined reference to `mach_get_rtc_pll'
  m68knommu: fix undefined reference to `_init_sp'
  m68knommu: allow elf_fdpic loader to be selected
  m68knommu: add definitions to support elf_fdpic program loader
  m68knommu: implement minimal regset support
  m68knommu: use asm-generic/mmu.h for nommu setups
  m68k: fix typos in comments
  m68k: coldfire: drop ISA_DMA_API support
  m68knommu: set ZERO_PAGE() to the allocated zeroed page
2022-05-30 10:56:18 -07:00
Linus Torvalds
d7227785e3 sound updates for 5.19-rc1
Not much dramatic changes at this time, but we've received quite
 a lot of changes for ASoC, while there are still a few fixes and
 quirks for usual HD- and USB-auido.  Here are some highlights.
 
 * ASoC:
 - Overhaul of endianness specification for data formats, avoiding
   needless restrictions due to CODECs
 - Initial stages of Intel AVS driver merge
 - Introduction of v4 IPC mechanism for SOF
 - TDM mode support for AK4613
 - Support for Analog Devices ADAU1361, Cirrus Logic CS35L45, Maxim
   MAX98396, MediaTek MT8186, NXP i.MX8 micfil and SAI interfaces,
   nVidia Tegra186 ASRC, and Texas Instruments TAS2764 and TAS2780
 
 * Others
 - A few regression fixes after the USB-audio endpoint management
   refactoring
 - More enhancements for Cirrus HD-audio codec support (still ongoing)
 - Addition of generic serial MIDI driver
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Merge tag 'sound-5.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound

Pull sound updates from Takashi Iwai:
 "Not much dramatic changes at this time, but we've received quite a lot
  of changes for ASoC, while there are still a few fixes and quirks for
  usual HD- and USB-auido. Here are some highlights.

  ASoC:

   - Overhaul of endianness specification for data formats, avoiding
     needless restrictions due to CODECs

   - Initial stages of Intel AVS driver merge

   - Introduction of v4 IPC mechanism for SOF

   - TDM mode support for AK4613

   - Support for Analog Devices ADAU1361, Cirrus Logic CS35L45, Maxim
     MAX98396, MediaTek MT8186, NXP i.MX8 micfil and SAI interfaces,
     nVidia Tegra186 ASRC, and Texas Instruments TAS2764 and TAS2780

  Others:

   - A few regression fixes after the USB-audio endpoint management
     refactoring

   - More enhancements for Cirrus HD-audio codec support (still ongoing)

   - Addition of generic serial MIDI driver"

* tag 'sound-5.19-rc1' of git://git.kernel.org/pub/scm/linux/kernel/git/tiwai/sound: (504 commits)
  ALSA: hda/realtek - Add new type for ALC245
  ALSA: usb-audio: Configure sync endpoints before data
  ALSA: ctxfi: fix typo in comment
  ALSA: cs5535audio: fix typo in comment
  ALSA: ctxfi: Add SB046x PCI ID
  ALSA: usb-audio: Add missing ep_idx in fixed EP quirks
  ALSA: usb-audio: Workaround for clock setup on TEAC devices
  ALSA: lola: Bounds check loop iterator against streams array size
  ASoC: max98090: Move check for invalid values before casting in max98090_put_enab_tlv()
  ASoC: rt1308-sdw: add the default value of register 0xc320
  ASoC: rt9120: Use pm_runtime and regcache to optimize 'pwdnn' logic
  ASoC: rt9120: Fix 3byte read, valule offset typo
  ASoC: amd: acp: Set Speaker enable/disable pin through rt1019 codec driver.
  ASoC: amd: acp: Set Speaker enable/disable pin through rt1019 codec driver
  ASoC: wm2000: fix missing clk_disable_unprepare() on error in wm2000_anc_transition()
  ASoC: codecs: lpass: Fix passing zero to 'PTR_ERR'
  ASoC: SOF: sof-client-ipc-flood-test: use pm_runtime_resume_and_get()
  ASoC: SOF: mediatek: remove duplicate include in mt8195.c
  ASoC: SOF: mediatek: Add mt8195 debug dump
  ASoC: SOF: mediatek: Add mediatek common debug dump
  ...
2022-05-25 16:55:16 -07:00
Takashi Iwai
0163717ed5 ASoC: Updates for v5.19
This is quite a big update, partly due to the addition of some larger
 drivers (more of which is to follow since at least the AVS driver is
 still a work in progress) and partly due to Charles' work sorting out
 our handling of endianness.  As has been the case recently it's much
 more about drivers than the core.
 
  - Overhaul of endianness specification for data formats, avoiding
    needless restrictions due to CODECs.
  - Initial stages of Intel AVS driver merge.
  - Introduction of v4 IPC mechanism for SOF.
  - TDM mode support for AK4613.
  - Support for Analog Devices ADAU1361, Cirrus Logic CS35L45, Maxim
    MAX98396, MediaTek MT8186, NXP i.MX8 micfil and SAI interfaces,
    nVidia Tegra186 ASRC, and Texas Instruments TAS2764 and TAS2780
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Merge tag 'asoc-v5.19' of https://git.kernel.org/pub/scm/linux/kernel/git/broonie/sound into for-linus

ASoC: Updates for v5.19

This is quite a big update, partly due to the addition of some larger
drivers (more of which is to follow since at least the AVS driver is
still a work in progress) and partly due to Charles' work sorting out
our handling of endianness.  As has been the case recently it's much
more about drivers than the core.

 - Overhaul of endianness specification for data formats, avoiding
   needless restrictions due to CODECs.
 - Initial stages of Intel AVS driver merge.
 - Introduction of v4 IPC mechanism for SOF.
 - TDM mode support for AK4613.
 - Support for Analog Devices ADAU1361, Cirrus Logic CS35L45, Maxim
   MAX98396, MediaTek MT8186, NXP i.MX8 micfil and SAI interfaces,
   nVidia Tegra186 ASRC, and Texas Instruments TAS2764 and TAS2780
2022-05-23 16:03:04 +02:00
Sai Krishna Potthuri
ded2c4c345 mmc: sdhci-of-arasan: Add NULL check for data field
Add NULL check for data field retrieved from of_device_get_match_data()
before dereferencing the data.
Addresses-coverity: CID 305057:Dereference null return value (NULL_RETURNS)

Signed-off-by: Sai Krishna Potthuri <lakshmi.sai.krishna.potthuri@xilinx.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Link: https://lore.kernel.org/r/1652339993-27280-1-git-send-email-lakshmi.sai.krishna.potthuri@xilinx.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2022-05-16 15:49:31 +02:00
Arnd Bergmann
f95a387cde m68k: coldfire: drop ISA_DMA_API support
After a build regression report, I took a look at possible users of
CONFIG_ISA_DMA_API on m68k and found none, which Greg confirmed. The
CONFIG_GENERIC_ISA_DMA option in turn is only needed to implement
ISA_DMA_API, and is clearly not used on the platforms with ISA support.

The CONFIG_ISA support for AMIGA_PCMCIA is probably also unneeded,
but this is less clear. Unlike other PCMCIA implementations, this one
does not use the drivers/pcmcia subsystem at all and just supports
the "apne" network driver. When it was first added, one could use
ISA drivers on it as well, but this probably broke at some point.

With no reason to keep this, let's just drop the corresponding files
and prevent the remaining ISA drivers that use this from getting built.

The remaining definitions in asm/dma.h are used for PCI support.

Link: https://lore.kernel.org/lkml/9e5ee1c3-ca80-f343-a1f5-66f3dd1c0727@linux-m68k.org/
Acked-by: Geert Uytterhoeven <geert@linux-m68k.org>
Acked-by: Ulf Hansson <ulf.hansson@linaro.org> # For MMC
Acked-by: Greg Ungerer <gerg@linux-m68k.org>
Acked-by: Takashi Iwai <tiwai@suse.de>
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
Signed-off-by: Greg Ungerer <gerg@linux-m68k.org>
2022-05-16 13:18:30 +10:00
Ulf Hansson
0c9ee5ba75 mmc: sdhci-brcmstb: Fix compiler warning
Fix the compiler warning triggered by -Wmissing-prototypes for
brcmstb_reset() by making it static.

Reported-by: kernel test robot <lkp@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Link: https://lore.kernel.org/r/20220506082805.273909-1-ulf.hansson@linaro.org
2022-05-06 10:44:22 +02:00
Ulf Hansson
0662d797d5 Merge branch 'fixes' into next 2022-05-04 12:32:44 +02:00
Shaik Sajida Bhanu
3e5a8e8494 mmc: sdhci-msm: Reset GCC_SDCC_BCR register for SDHC
Reset GCC_SDCC_BCR register before every fresh initilazation. This will
reset whole SDHC-msm controller, clears the previous power control
states and avoids, software reset timeout issues as below.

[ 5.458061][ T262] mmc1: Reset 0x1 never completed.
[ 5.462454][ T262] mmc1: sdhci: ============ SDHCI REGISTER DUMP ===========
[ 5.469065][ T262] mmc1: sdhci: Sys addr: 0x00000000 | Version: 0x00007202
[ 5.475688][ T262] mmc1: sdhci: Blk size: 0x00000000 | Blk cnt: 0x00000000
[ 5.482315][ T262] mmc1: sdhci: Argument: 0x00000000 | Trn mode: 0x00000000
[ 5.488927][ T262] mmc1: sdhci: Present: 0x01f800f0 | Host ctl: 0x00000000
[ 5.495539][ T262] mmc1: sdhci: Power: 0x00000000 | Blk gap: 0x00000000
[ 5.502162][ T262] mmc1: sdhci: Wake-up: 0x00000000 | Clock: 0x00000003
[ 5.508768][ T262] mmc1: sdhci: Timeout: 0x00000000 | Int stat: 0x00000000
[ 5.515381][ T262] mmc1: sdhci: Int enab: 0x00000000 | Sig enab: 0x00000000
[ 5.521996][ T262] mmc1: sdhci: ACmd stat: 0x00000000 | Slot int: 0x00000000
[ 5.528607][ T262] mmc1: sdhci: Caps: 0x362dc8b2 | Caps_1: 0x0000808f
[ 5.535227][ T262] mmc1: sdhci: Cmd: 0x00000000 | Max curr: 0x00000000
[ 5.541841][ T262] mmc1: sdhci: Resp[0]: 0x00000000 | Resp[1]: 0x00000000
[ 5.548454][ T262] mmc1: sdhci: Resp[2]: 0x00000000 | Resp[3]: 0x00000000
[ 5.555079][ T262] mmc1: sdhci: Host ctl2: 0x00000000
[ 5.559651][ T262] mmc1: sdhci_msm: ----------- VENDOR REGISTER DUMP-----------
[ 5.566621][ T262] mmc1: sdhci_msm: DLL sts: 0x00000000 | DLL cfg: 0x6000642c | DLL cfg2: 0x0020a000
[ 5.575465][ T262] mmc1: sdhci_msm: DLL cfg3: 0x00000000 | DLL usr ctl: 0x00010800 | DDR cfg: 0x80040873
[ 5.584658][ T262] mmc1: sdhci_msm: Vndr func: 0x00018a9c | Vndr func2 : 0xf88218a8 Vndr func3: 0x02626040

Fixes: 0eb0d9f4de ("mmc: sdhci-msm: Initial support for Qualcomm chipsets")
Signed-off-by: Shaik Sajida Bhanu <quic_c_sbhanu@quicinc.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Reviewed-by: Philipp Zabel <p.zabel@pengutronix.de>
Tested-by: Konrad Dybcio <konrad.dybcio@somainline.org>
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/1650816153-23797-1-git-send-email-quic_c_sbhanu@quicinc.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2022-05-04 12:31:55 +02:00
Rohit Agarwal
953706844f mmc: sdhci-msm: Add compatible string check for sdx65
Add sdx65 SoC specific compatible string check inside qcom 'sdhci-msm'
controller driver.

Signed-off-by: Rohit Agarwal <quic_rohiagar@quicinc.com>
Link: https://lore.kernel.org/r/1651480665-14978-3-git-send-email-quic_rohiagar@quicinc.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2022-05-04 12:28:06 +02:00
Bhupesh Sharma
5acd6adb65 mmc: sdhci-msm: Add compatible string check for sm8150
Add sm8150 SoC specific compatible string check inside qcom 'sdhci-msm'
controller driver.

Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
Link: https://lore.kernel.org/r/20220429220833.873672-5-bhupesh.sharma@linaro.org
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2022-05-04 12:23:08 +02:00
Bhupesh Sharma
466614a976 mmc: sdhci-msm: Add SoC specific compatibles
Since Qualcomm device-trees already use SoC specific compatibles for
describing the 'sdhci-msm' nodes, it makes sense to add the support for the
same in the driver as well.

Keep the old deprecated compatible strings still in the driver, to ensure
backward compatibility with older device-trees.

Signed-off-by: Bhupesh Sharma <bhupesh.sharma@linaro.org>
Link: https://lore.kernel.org/r/20220429220833.873672-3-bhupesh.sharma@linaro.org
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2022-05-04 12:22:59 +02:00
Al Cooper
6bcc55fe64 mmc: sdhci-brcmstb: Enable Clock Gating to save power
Enabling this feature will allow the controller to stop the bus
clock when the bus is idle. The feature is not part of the standard
and is unique to newer Arasan cores and is enabled with a bit in a
vendor specific register. This feature will only be enabled for
non-removable devices because they don't switch the voltage and
clock gating breaks SD Card volatge switching.

Signed-off-by: Al Cooper <alcooperx@gmail.com>
Signed-off-by: Kamal Dasu <kdasu.kdev@gmail.com>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Link: https://lore.kernel.org/r/20220427180853.35970-3-kdasu.kdev@gmail.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2022-05-04 12:04:55 +02:00
Al Cooper
f3a70f991d mmc: sdhci-brcmstb: Re-organize flags
Re-organize the flags by basing the bit names on the flag that they
apply to. Also change the "flags" member in the "brcmstb_match_priv"
struct to const.

Signed-off-by: Al Cooper <alcooperx@gmail.com>
Signed-off-by: Kamal Dasu <kdasu.kdev@gmail.com>
Acked-by: Florian Fainelli <f.fainelli@gmail.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Link: https://lore.kernel.org/r/20220427180853.35970-2-kdasu.kdev@gmail.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2022-05-04 12:04:47 +02:00
Linus Walleij
3ae2722c93 mmc: mmci: Remove custom ios handler
The custom boardfile ios handler isn't used anywhere in the
kernel. Delete it.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20220427125557.1608825-1-linus.walleij@linaro.org
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2022-05-04 11:59:09 +02:00
Wan Jiabing
83961aacb2 mmc: atmel-mci: Simplify if(chan) and if(!chan)
Use if(!host->dma.chan) instead of if(chan) and if(!chan) to make
code better.

Signed-off-by: Wan Jiabing <wanjiabing@vivo.com>
Link: https://lore.kernel.org/r/20220427120310.838843-1-wanjiabing@vivo.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2022-05-04 11:56:02 +02:00
Ulf Hansson
89877983ac Merge branch 'fixes' into next 2022-05-04 11:52:07 +02:00
Samuel Holland
e9f3fb523d mmc: sunxi-mmc: Fix DMA descriptors allocated above 32 bits
Newer variants of the MMC controller support a 34-bit physical address
space by using word addresses instead of byte addresses. However, the
code truncates the DMA descriptor address to 32 bits before applying the
shift. This breaks DMA for descriptors allocated above the 32-bit limit.

Fixes: 3536b82e58 ("mmc: sunxi: add support for A100 mmc controller")
Signed-off-by: Samuel Holland <samuel@sholland.org>
Reviewed-by: Andre Przywara <andre.przywara@arm.com>
Reviewed-by: Jernej Skrabec <jernej.skrabec@gmail.com>
Cc: stable@vger.kernel.org
Link: https://lore.kernel.org/r/20220424231751.32053-1-samuel@sholland.org
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2022-05-04 11:50:12 +02:00
Bean Huo
897ae3fe12 mmc: sdhci-omap: Use of_device_get_match_data() helper
Only the device data is needed, not the entire struct of_device_id.
Use of_device_get_match_data() instead of open coding of_match_device().

Signed-off-by: Bean Huo <beanhuo@micron.com>
Link: https://lore.kernel.org/r/20220423221623.1074556-2-huobean@gmail.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2022-04-26 14:09:00 +02:00
Vignesh Raghavendra
c7666240ec drivers: mmc: sdhci_am654: Add the quirk to set TESTCD bit
The ARASAN MMC controller on Keystone 3 class of devices need the SDCD
line to be connected for proper functioning. Similar to the issue pointed
out in sdhci-of-arasan.c driver, commit 3794c54264 ("mmc:
sdhci-of-arasan: Set controller to test mode when no CD bit").

In cases where this can't be connected, add a quirk to force the
controller into test mode and set the TESTCD bit. Use the flag
"ti,fails-without-test-cd", to implement this above quirk when required.

Signed-off-by: Vignesh Raghavendra <vigneshr@ti.com>
Signed-off-by: Aswath Govindraju <a-govindraju@ti.com>
Link: https://lore.kernel.org/r/20220425063120.10135-3-a-govindraju@ti.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2022-04-26 14:05:55 +02:00
Linus Walleij
f7ad75041b mmc: mmci: Break IRQ status loop when all zero
We iterate an extra time through the IRQ status handling
loop despite nothing had fired. Enabling the debug prints:

mmci-pl18x 80005000.mmc: op 01 arg 00000000 flags 000000e1
mmci-pl18x 80005000.mmc: irq0 (data+cmd) 00000001
mmci-pl18x 80005000.mmc: irq0 (data+cmd) 00000000
mmci-pl18x 80005000.mmc: op 01 arg 40ff8080 flags 000000e1
mmci-pl18x 80005000.mmc: irq0 (data+cmd) 00000001
mmci-pl18x 80005000.mmc: irq0 (data+cmd) 00000000

It is pointless to loop through the function when status
is zero. Just break the loop if the status is zero.

Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Link: https://lore.kernel.org/r/20220416224549.627623-1-linus.walleij@linaro.org
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2022-04-26 14:05:22 +02:00
Heiner Kallweit
238b638b30 mmc: meson-gx: switch to device-managed dmam_alloc_coherent()
Using the device-managed version allows to simplify clean-up in probe()
error path and remove().

Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
Link: https://lore.kernel.org/r/268b3cd5-2388-2553-bdba-c72853f91aa3@gmail.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2022-04-26 14:05:21 +02:00
Ben Chuang
36ed2fd32b mmc: sdhci-pci-gli: A workaround to allow GL9755 to enter ASPM L1.2
When GL9755 enters ASPM L1 sub-states, it will stay at L1.1 and will not
enter L1.2. The workaround is to toggle PM state to allow GL9755 to enter
ASPM L1.2.

Signed-off-by: Ben Chuang <ben.chuang@genesyslogic.com.tw>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Link: https://lore.kernel.org/r/20220414094945.457500-1-benchuanggli@gmail.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2022-04-26 14:05:21 +02:00
Wolfram Sang
13acb62ce1 mmc: sh_mmcif: move platform_data header to proper location
We have a dedicated directory for platform_data meanwhile, don't spoil
the MMC directory with it.

Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20220412093102.3428-1-wsa+renesas@sang-engineering.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2022-04-26 14:05:21 +02:00
Aidan MacDonald
afadb04f1d mmc: jz4740: Apply DMA engine limits to maximum segment size
Do what is done in other DMA-enabled MMC host drivers (cf. host/mmci.c) and
limit the maximum segment size based on the DMA engine's capabilities. This
is needed to avoid warnings like the following with CONFIG_DMA_API_DEBUG=y.

------------[ cut here ]------------
WARNING: CPU: 0 PID: 21 at kernel/dma/debug.c:1162 debug_dma_map_sg+0x2f4/0x39c
DMA-API: jz4780-dma 13420000.dma-controller: mapping sg segment longer than device claims to support [len=98304] [max=65536]
CPU: 0 PID: 21 Comm: kworker/0:1H Not tainted 5.18.0-rc1 #19
Workqueue: kblockd blk_mq_run_work_fn
Stack : 81575aec 00000004 80620000 80620000 80620000 805e7358 00000009 801537ac
        814c832c 806276e3 806e34b4 80620000 81575aec 00000001 81575ab8 09291444
        00000000 00000000 805e7358 81575958 ffffffea 8157596c 00000000 636f6c62
        6220646b 80387a70 0000000f 6d5f6b6c 80620000 00000000 81575ba4 00000009
        805e170c 80896640 00000001 00010000 00000000 00000000 00006098 806e0000
        ...
Call Trace:
[<80107670>] show_stack+0x84/0x120
[<80528cd8>] __warn+0xb8/0xec
[<80528d78>] warn_slowpath_fmt+0x6c/0xb8
[<8016f1d4>] debug_dma_map_sg+0x2f4/0x39c
[<80169d4c>] __dma_map_sg_attrs+0xf0/0x118
[<8016a27c>] dma_map_sg_attrs+0x14/0x28
[<804f66b4>] jz4740_mmc_prepare_dma_data+0x74/0xa4
[<804f6714>] jz4740_mmc_pre_request+0x30/0x54
[<804f4ff4>] mmc_blk_mq_issue_rq+0x6e0/0x7bc
[<804f5590>] mmc_mq_queue_rq+0x220/0x2d4
[<8038b2c0>] blk_mq_dispatch_rq_list+0x480/0x664
[<80391040>] blk_mq_do_dispatch_sched+0x2dc/0x370
[<80391468>] __blk_mq_sched_dispatch_requests+0xec/0x164
[<80391540>] blk_mq_sched_dispatch_requests+0x44/0x94
[<80387900>] __blk_mq_run_hw_queue+0xb0/0xcc
[<80134c14>] process_one_work+0x1b8/0x264
[<80134ff8>] worker_thread+0x2ec/0x3b8
[<8013b13c>] kthread+0x104/0x10c
[<80101dcc>] ret_from_kernel_thread+0x14/0x1c

---[ end trace 0000000000000000 ]---

Signed-off-by: Aidan MacDonald <aidanmacdonald.0x0@gmail.com>
Link: https://lore.kernel.org/r/20220411153753.50443-1-aidanmacdonald.0x0@gmail.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2022-04-26 14:05:21 +02:00
Wolfram Sang
32f18e5961 mmc: improve API to make clear hw_reset callback is for cards
To make it unambiguous that the hw_reset callback is for cards and not
for controllers, we add 'card' to the callback name and convert all
users in one go. We keep the argument as mmc_host, though, because the
callback is used very early when mmc_card is not yet populated.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Link: https://lore.kernel.org/r/20220408080045.6497-4-wsa+renesas@sang-engineering.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2022-04-26 14:05:20 +02:00
Wolfram Sang
a252a4d3d4 mmc: renesas_sdhi: remove superfluous specific M3W entry
We don't need to specify the Gen3 compatible entry for M3W because it
will be provided by the generic Gen3 fallback.

Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20220404130551.20209-1-wsa+renesas@sang-engineering.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2022-04-26 14:05:20 +02:00
Wolfram Sang
f504dee2c6 mmc: renesas_sdhi: R-Car V3H ES2.0 gained HS400 support
The hardware evolved, so we only need to disable HS400 support on ES1.*
revisions. Update the code.

Signed-off-by: Takeshi Saito <takeshi.saito.xv@renesas.com>
[wsa: refactored to top-of-tree]
Signed-off-by: Wolfram Sang <wsa+renesas@sang-engineering.com>
Reviewed-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/20220404123404.16289-1-wsa+renesas@sang-engineering.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2022-04-26 14:05:20 +02:00
Janusz Krzysztofik
e3e5255e77 mmc: omap: Make it CCF clk API compatible
The driver, OMAP specific, now omits clk_prepare/unprepare() steps, not
supported by OMAP custom implementation of clock API.  However, non-CCF
stubs of those functions exist for use on such platforms until converted
to CCF.

Update the driver to be compatible with CCF implementation of clock API.

Signed-off-by: Janusz Krzysztofik <jmkrzyszt@gmail.com>
Link: https://lore.kernel.org/r/20220402112004.129886-1-jmkrzyszt@gmail.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2022-04-26 14:05:19 +02:00
Christian Löhle
25bbf0daec mmc: mmc_spi: parse speed mode options
Since SD and MMC Highspeed modes are also valid for SPI let's parse
them too.

Signed-off-by: Christian Loehle <cloehle@hyperstone.com>
Reviewed-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Link: https://lore.kernel.org/r/20c6efa9a4c7423bbfb9352705c4a53a@hyperstone.com
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
2022-04-26 14:05:19 +02:00