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147,665 commits
| Author | SHA1 | Message | Date | |
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Hans Verkuil
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c79dbdae3a |
media: common: saa7146: drop 'fmt' from struct saa7146_buf
Use the video_fmt in saa7146_vv instead of having a pointer to it in struct saa7146_buf. Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl> Signed-off-by: Mauro Carvalho Chehab <mchehab@kernel.org> |
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Hans Verkuil
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acdb157328 |
media: saa7146: drop 'dev' and 'resources' from struct saa7146_fh
Instead use vv->resources and video_drvdata(file) to obtain this information. This prepares for the vb2 conversion later when saa7146_fh is dropped completely. Signed-off-by: Hans Verkuil <hverkuil-cisco@xs4all.nl> Signed-off-by: Mauro Carvalho Chehab <mchehab@kernel.org> |
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Jakub Kicinski
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8c48eea3ad |
page_pool: allow caching from safely localized NAPI
Recent patches to mlx5 mentioned a regression when moving from driver local page pool to only using the generic page pool code. Page pool has two recycling paths (1) direct one, which runs in safe NAPI context (basically consumer context, so producing can be lockless); and (2) via a ptr_ring, which takes a spin lock because the freeing can happen from any CPU; producer and consumer may run concurrently. Since the page pool code was added, Eric introduced a revised version of deferred skb freeing. TCP skbs are now usually returned to the CPU which allocated them, and freed in softirq context. This places the freeing (producing of pages back to the pool) enticingly close to the allocation (consumer). If we can prove that we're freeing in the same softirq context in which the consumer NAPI will run - lockless use of the cache is perfectly fine, no need for the lock. Let drivers link the page pool to a NAPI instance. If the NAPI instance is scheduled on the same CPU on which we're freeing - place the pages in the direct cache. With that and patched bnxt (XDP enabled to engage the page pool, sigh, bnxt really needs page pool work :() I see a 2.6% perf boost with a TCP stream test (app on a different physical core than softirq). The CPU use of relevant functions decreases as expected: page_pool_refill_alloc_cache 1.17% -> 0% _raw_spin_lock 2.41% -> 0.98% Only consider lockless path to be safe when NAPI is scheduled - in practice this should cover majority if not all of steady state workloads. It's usually the NAPI kicking in that causes the skb flush. The main case we'll miss out on is when application runs on the same CPU as NAPI. In that case we don't use the deferred skb free path. Reviewed-by: Tariq Toukan <tariqt@nvidia.com> Acked-by: Jesper Dangaard Brouer <brouer@redhat.com> Tested-by: Dragos Tatulea <dtatulea@nvidia.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org> |
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Arnd Bergmann
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4f2f299136 |
mtk-svs:
smaller coding style changes mtk-mutex: - add support for mt8365 display and mt8195 VPP mutex - add support for more then 32 mods - use module_platform_driver instead of open coding mtk-mmsys: - add support for mt8195 RSZ switching - add remove function - use module_platform_driver instead of open coding - split out mt8173 routing table from the legacy table - bump up resets in mt8173 to 64 - add support for mt6795 (Helio X10) - clean-up IS_REACHABLE code for cmdq -----BEGIN PGP SIGNATURE----- iQJLBAABCAA1FiEEUdvKHhzqrUYPB/u8L21+TfbCqH4FAmQ5etYXHG1hdHRoaWFz LmJnZ0BnbWFpbC5jb20ACgkQL21+TfbCqH60MQ/9Ec3yNtE/28VGYD0IgG8i7KZx d8+dfB2WUqEWGdkPVIrVESH9GcYn6TxoFXEvJScE9kKEDQzt8YQQ6eM+Pb1X7UIo g2ygE3y7mGD4L1yXWtJbfA9C4m2hxe0bcFPHY/JcI5VCafcg/enVlU32JytJF/6J BTDUSCj1on84FguS8o1UbB+gEJC7cPTxWL0VCL1ALdS4tR5Ll1GD1oC6HFI8L7Ii khmE+kP7bwwzotd2UYlFwpV36GDuKGAe39oPEpVL5GzRZlVIterwd1+TLU7U3AUo IkvPEzmWIgitOdXQ/NA0XnUrLuPc4zLqWXORGnlrNajuHXxllLqkJv+o8iojWhEH ThwRtg9kQoSkqwui33ugS5zpvBjT/l6cKbzfN9b5lBaNxoAoBItr1lvp75AIdZ94 LIuLTzOa/2ah+Gte8lKcHplPK6so9PU+hZAaKSuGM1d5fxD/osHzKLHTp0IBh+L2 xuXW6XRU0kadh2D7gHbwXpRO+46u9HZ1yQ4Fcpm/r15n/Yqb/nfSFUBOgw9IY7sX jPO1LhzJE0C1eQ0ILVKFKH/X4+BCEVvqscOPPRWO5PVPfU/90rNAFIFmI4b3VQAv rqkgbgFE0zfB18Zg5P4e98fpg3h4iiwxZf3MY0mvVT03lCf43bP314rCtAzBXy1O ANukrL889xT146Ut4rA= =8k5F -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmQ5uh8ACgkQYKtH/8kJ UicW9RAAiOpQFZTsFzSZ5jryRFV2Wd9Z8eQt1f8xhfgRXylw5jvvIwpZEe01ebtR g59nGQBTMOTo78NRvrhEm1Dpa3uzcJpY4NBpvFu8UlU+kr9oCMk8OkEitWw6rrwX oUUUgSwcs5afJ5gJVojzRIWjNL4/0FWQc4XHp6FV/K2igo0BsX25z+JK+3kpMvkO 8M9fptqlR25hanXhkE8d7VtksEJPRnQOuw6aydQa3oJoBt64YYwTnDAuw6WQzjFM G800rFCrfhUve6hSQwy0amd9zzuql+e9nYo3NN3ZAzs4kKqLifaPTWue2TJ2dKXO FGKYa/LAyKUgkbplR5uuKtTjOem2FU1ePJpsLtF5hO7S1ZOyOFJLGtz7MJQoROSr vX+OPwRfJzndebxEQAYaFyeA3LKqsxHcotlU0tqHzl2dZz5g1FRlEnRDIYHKOtOt u0gpt4N4xfXxQeSmkuYHtILp/hRQM8Djf61riiFR5jxG9v4JaVdrl8K6qfyc5tJt d4ytn8a/kf1sHKwmzplidOjJ5Ih1qgmIfez6VCEr5H5WD2ZQfQQSnychhb91SJEM x/MigLinAMcg9gpTO6RVlK9jAOO0LhvrbQcWH2oWYbezfgXeVvDZuwKV8gqCRCaG PaqXaFDr4L48zov7jfYUoK0Mdbq27PcHAMLSnDSxpXhT7n+wCjE= =DkhA -----END PGP SIGNATURE----- Merge tag 'v6.3-next-soc' of https://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux into soc/drivers mtk-svs: smaller coding style changes mtk-mutex: - add support for mt8365 display and mt8195 VPP mutex - add support for more then 32 mods - use module_platform_driver instead of open coding mtk-mmsys: - add support for mt8195 RSZ switching - add remove function - use module_platform_driver instead of open coding - split out mt8173 routing table from the legacy table - bump up resets in mt8173 to 64 - add support for mt6795 (Helio X10) - clean-up IS_REACHABLE code for cmdq * tag 'v6.3-next-soc' of https://git.kernel.org/pub/scm/linux/kernel/git/matthias.bgg/linux: (25 commits) soc: mediatek: Kconfig: Add MTK_CMDQ dependency to MTK_MMSYS soc: mediatek: mutex: Use dev_err_probe() soc: mediatek: mtk-mmsys: Add support for MT6795 Helio X10 soc: mediatek: mtk-mmsys: Change MT8173 num_resets to 64 soc: mediatek: mtk-mmsys: Split out MT8173 mmsys DDP routing table soc: mediatek: Cleanup ifdefs for IS_REACHABLE(CONFIG_MTK_CMDQ) soc: mediatek: cmdq: Add inline functions for !CONFIG_MTK_CMDQ soc: mediatek: mtk-mutex: Use module_platform_driver() macro soc: mediatek: mtk-mutex: Replace max handles number with definition soc: mediatek: mtk-mutex: Compress of_device_id array entries soc: mediatek: mtk-mmsys: Add MODULE_DEVICE_TABLE() to allow auto-load soc: mediatek: mtk-mmsys: Compress of_device_id array entries soc: mediatek: mtk-mmsys: Use module_platform_driver() macro soc: mediatek: mtk-mmsys: Add .remove() callback dt-bindings: soc: mediatek: add display mutex for MT8365 SoC dt-bindings: soc: mediatek: specify which compatible requires clocks property soc: mediatek: mtk-svs: add thermal voltage compensation if needed soc: mediatek: mtk-svs: fix passing zero to 'PTR_ERR' soc: mediatek: mtk-svs: delete node name check soc: mediatek: mutex: support MT8195 VPPSYS ... Link: https://lore.kernel.org/r/bc9f7a74-ce12-b323-021c-ff2c0473e979@gmail.com Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Simon Horman
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38e4614c27 |
vfio: correct kdoc for ops structures
Address minor omissions from kdoc for ops structures flagged by check-kdoc: ./scripts/kernel-doc -Werror -none include/linux/vfio.h include/linux/vfio.h:114: warning: Function parameter or member 'name' not described in 'vfio_device_ops' include/linux/vfio.h:143: warning: Cannot understand * @migration_set_state: Optional callback to change the migration state for on line 143 - I thought it was a doc line include/linux/vfio.h:168: warning: Cannot understand * @log_start: Optional callback to ask the device start DMA logging. on line 168 - I thought it was a doc line Signed-off-by: Simon Horman <horms@kernel.org> Link: https://lore.kernel.org/r/20230329120603.468031-1-horms@kernel.org Signed-off-by: Alex Williamson <alex.williamson@redhat.com> |
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Mike Snitzer
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f7995089c5 |
dm: unexport dm_get_queue_limits()
There are no dm_get_queue_limits() callers outside of DM core and there shouldn't be. Also, remove its BUG_ON(!atomic_read(&md->holders)) to micro-optimize __process_abnormal_io(). Signed-off-by: Mike Snitzer <snitzer@kernel.org> |
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Mike Snitzer
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13f6facf3f |
dm: allow targets to require splitting WRITE_ZEROES and SECURE_ERASE
Introduce max_write_zeroes_granularity and max_secure_erase_granularity flags in the dm_target struct. If a target sets these then DM core will split IO of these operation types accordingly (in terms of max_write_zeroes_sectors and max_secure_erase_sectors respectively). Signed-off-by: Mike Snitzer <snitzer@kernel.org> |
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Arnd Bergmann
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718acce6f0 |
More Qualcomm ARM64 Devicetree updated for v6.4
Devicetree for the QCM2210/QCM2290 is introduced. Support for the RB1 board is introduced on QRB2210, RB2 on QRB4210, the AL02 board on IPQ9574, the MI01.6 board is introduced on IPQ5332 and initial support for Xiaomi Mi A3 is introduced on SM6125. Support for the output-enable/disable flag is introduced in the pinctrl-msm driver, and the non-standard "input-enable" is dropped from a range of platforms. A wide range of smaller fixes are introduced, based on Devicetree validation. MSM8953 gains LPASS, MPSS and Wireless subsystem support. The iommus property is removed from PCIe nodes in all platforms, as the only the child devices should be associated with iommu groups, through the existing iommu-map property. A few QUP instances are introduced on the IPQ5332 platform, and support for the MI01.6 board is introduced. The reserved-memory map on Huawei Nexus 6P is updated with the addition of splash screen framebuffer memory and adjustment to the reserved memory region overlapping the smem region. Regulators are introduces for the SA8775P Ride platform. A regulator is marked always-on, for correctness, on Trogdor. Pinconf fixes are introduced to both sc7180 and sc7280 devices. A dedicated reviewers list is added for boards relevant to the Chromebook engineers. A set of pinconf fixes are introduced for sc8280xp, labels are introduced for Soundwire nodes. The sensor core remoteproc and FastRPC thereon, is introduce in SDM845 and enabled for OnePlus 6/6T and Shift Shift6mq. RMTFS, remoteprocs, ath10k and ramoops is introduced for the Lenovo Tab P11. UFS support is introduced on SM6125. SM8150 no longer defines the GPU to be in headless mode by default, GPU speedbins are introduced. GPU speedbins are introduced for SM8250 as well, as is support for display on Xiaomi Mi Pad 5 Pro, with two different panels supported. Soundwire controllers, ADSP audio codec macros and the Inline Crypto Engine support is added to the SM8550 platform. -----BEGIN PGP SIGNATURE----- iQJJBAABCAAzFiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmQ4xScVHGFuZGVyc3Nv bkBrZXJuZWwub3JnAAoJEAsfOT8Nma3FyAEQANkYPPmcATVeCMu8ABqOGr2YpN2v d1e8/Kdtrg0qWtqnXgkcec/+HvOqxTYlqW/iYLGf2fkgheQhbY8YOv3AU7FEG9Jr RNsPiyZ/2o2VPcskS6jQSsbAGKaWbhSh7Ao2lSUNSsPuhHOYw/Nu3iRxKCE1FdHn yqF2b+cipMwogKgx4LFCLwRTAG6f9HumDb3dwLeiUFPZH321MeJu8FzHnLt/wU5Z 64EzST7W2J5PlWdFEoJOXGDmxnM35hKJrzliRf5oqTHhUMUlyxQI6W61vSfsz5PP 7AE8DEMHD9b5fbRUf2mcMffPmhdvL194dSx10eTFMEuyoe+19CaMiZV86Cf8HeZ7 8K6ZZJ/tF/UrOBc7zMDtCUTm5f9MYyfiKqQNJekcpYWugQSsKw8TQZ58q4jM352R vvq2ywMDk2olt4Jn0on7L6M8x+uOGIMQG3B32jJijE0fRFdMcHJMwfxEBsrGmsUW vZvDdhQtIQSy6aLHFqwzFbGePq1GeYLjEh+PbT8EHkaCHFx0dA+EobLnwcyqJYky AmWA2wjbIYU96KahSZ4Sz3MWTy9MrhHa10bwWoBvOsp1AAM/gpx5nIgoHXmzp2pg cXgCqzUBgdMrWfjEFgtLY1HyRMGbQ7T+fQhaS5xn9TnHNqnvqLAW/APhyhrAWWXx 475V7NXAQMDd5FQX =vVPv -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmQ5eO4ACgkQYKtH/8kJ UifICRAAz4I3XrqaTmlk8HtHwCSxhQfpF/6B+HmFbRG/tNFzWu4rbCyju2Gja6bi lQDxP42uuH78m35rXtAA848bZ8BpUQesJcGuwQoPYRwCPTLZH493QryEZ2DM4rp1 IjKe1FmuHlToBiPxBgk+3EqaulXM9wSvV6lb7HlsEx6vt8TC9i0IhnfD6jHJ7ESs Pln0nmTREAyNpdcGOfmCZ3m4Rc6rvz8WHu+pX/nYZIdF44txYJaVh4mU7T0DuxUo KF2rfpPko4FXxqN6V3fYBRuRihu9lAqPwg86imQruqHnc0Lrfw2IMAdnUtXcmJOo qrYvQgifJKd5TZ1aYrkiQk5jSA9Wy5Wt66rzu7XGC8XhEftYcs3D/gYkqfRifI+a d+dqYLYXOLTopdDRfGgnCa74cNs7A+Y/mUC+WZQmWFI4q7I9SUnipRfzZt44Vbmp mn1C6XIoeseO8HOHDx0dNUsgiDH/JDLZv1/RTT6fWj3+9R2fQKmtdq8i9ZBdKL7r M/bAsS8PENmV6Dv3bHWxIa4xC380bDgCrjsLdHh5Oqfvbv2NHpftHkOaCK8BgE/t 8YubTKxaxw0YQ0NtI+ku6Km9VJCG1zDEiQPMYEcklEzUj09CfkfCqBg4EkI92u2i P215llOlgIUzAgad/S0H2YhIIdnhsacU4adPEDD3devtKWdH+PE= =HFrk -----END PGP SIGNATURE----- Merge tag 'qcom-arm64-for-6.4-2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/dt More Qualcomm ARM64 Devicetree updated for v6.4 Devicetree for the QCM2210/QCM2290 is introduced. Support for the RB1 board is introduced on QRB2210, RB2 on QRB4210, the AL02 board on IPQ9574, the MI01.6 board is introduced on IPQ5332 and initial support for Xiaomi Mi A3 is introduced on SM6125. Support for the output-enable/disable flag is introduced in the pinctrl-msm driver, and the non-standard "input-enable" is dropped from a range of platforms. A wide range of smaller fixes are introduced, based on Devicetree validation. MSM8953 gains LPASS, MPSS and Wireless subsystem support. The iommus property is removed from PCIe nodes in all platforms, as the only the child devices should be associated with iommu groups, through the existing iommu-map property. A few QUP instances are introduced on the IPQ5332 platform, and support for the MI01.6 board is introduced. The reserved-memory map on Huawei Nexus 6P is updated with the addition of splash screen framebuffer memory and adjustment to the reserved memory region overlapping the smem region. Regulators are introduces for the SA8775P Ride platform. A regulator is marked always-on, for correctness, on Trogdor. Pinconf fixes are introduced to both sc7180 and sc7280 devices. A dedicated reviewers list is added for boards relevant to the Chromebook engineers. A set of pinconf fixes are introduced for sc8280xp, labels are introduced for Soundwire nodes. The sensor core remoteproc and FastRPC thereon, is introduce in SDM845 and enabled for OnePlus 6/6T and Shift Shift6mq. RMTFS, remoteprocs, ath10k and ramoops is introduced for the Lenovo Tab P11. UFS support is introduced on SM6125. SM8150 no longer defines the GPU to be in headless mode by default, GPU speedbins are introduced. GPU speedbins are introduced for SM8250 as well, as is support for display on Xiaomi Mi Pad 5 Pro, with two different panels supported. Soundwire controllers, ADSP audio codec macros and the Inline Crypto Engine support is added to the SM8550 platform. * tag 'qcom-arm64-for-6.4-2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (85 commits) arm64: dts: qcom: Add base qrb4210-rb2 board dts arm64: dts: qcom: sm8550: add Soundwire controllers arm64: dts: qcom: sm8250: Add GPU speedbin support arm64: dts: qcom: sm8150: Add GPU speedbin support arm64: dts: qcom: sm8150: Don't start Adreno in headless mode arm64: dts: qcom: ipq5332: add support for the RDP468 variant arm64: dts: qcom: sdm630: move DSI opp-table out of DSI node arm64: dts: qcom: sm6115p-j606f: Enable ATH10K WiFi arm64: dts: qcom: sm6115p-j606f: Enable remoteprocs arm64: dts: qcom: sm6115: Add RMTFS arm64: dts: qcom: sm6115-j606f: Add ramoops node arm64: dts: qcom: msm8916-thwc-ufi001c: add function to pin config arm64: dts: qcom: sm8550: Add the Inline Crypto Engine node arm64: dts: MSM8953: Add lpass nodes arm64: dts: MSM8953: Add mpss nodes arm64: dts: MSM8953: Add wcnss nodes arm64: dts: qcom: sm8350: remove superfluous "input-enable" arm64: dts: qcom: sm8150: remove superfluous "input-enable" arm64: dts: qcom: apq8016: remove superfluous "input-enable" arm64: dts: qcom: sc8280xp-lenovo-thinkpad: correct pin drive-strength ... Link: https://lore.kernel.org/r/20230414031550.2412379-1-andersson@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Arnd Bergmann
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10678a0751 |
Qualcomm ARM64 updates for v6.4
PCI I/O and MEM ranges are corrected across all targets with PCIe enabled. Likewise is CPU clocks defined to be provided from CPUfreq for a wide range of platforms, to satisfy the OPP definitions, and LLCC bank information is corrected for all relevant platforms. IPQ5332 gains SMEM, CPUfreq and support for triggering download mode. The MI01.2 board is introduced. On MSM8916 WCN compatibles are moved to be defined per board, to avoid issues when boards rely on the incorrect defaults. Support for Yiming UZ801 4G modem stick is introduced. XO clock is defined and fed to RPMCC on MSM8953 and MSM8976, to ensure clock trees are properly rooted. DSI clocks feeding into gcc are described on MSM8953. On MSM8996 the external audio components are moved from the SoC dtsi. A few DWC3 quirks are added. On MSM8998 GPIO names are introduced for Sony Xperia XZ Premium, XZ1 and XZ1 Compact. A numbe of boards have GPIO keys properly marked as wakeup-source. The SA8775P platform is extended with CPUfreq, UARTs, I2C controllers, SPI controllers, SPMI and PMICs, PDC support. The associated PMICs gains reset and power key support, as well as thermal zones defined. Nodes are sorted. On top of this the SA8775P Ride board/platform is introduced. On SC7180 and SC7280 a range of fixes coming from DeviceTree validation are introduced, some clearing up unused properties, others correcting errors. A number of Google rev0 boards on SC7180 are dropped, as these are not considered to be in use by anyone anymore. On SC8280XP RTC support is introduced and enabled for the CRD and Lenovo Thinkpad X13s. It gains another UART, upon which Bluetooth is enabled on the Lenovo ThinkPad X13s. The touchpad definition is altered to attempt to probe both devices seen in the wild. A number of bug fixes are also introduced, and the regulator definitions on X13s are corrected. On SDM845 dynamic power coefficients are improved. BWMON compatible is corrected. Xiaomi Pocophone F1 gains notification LED. Sony Xperia XZ2, XZ2 Compact and XZ3 gains display, touchscreen, gpu and remoteproc support. OnePlus 6 and 6T gains hall sensor. GPU clock controller and remoteproc nodes are added for SM6115. CPU clock are defined to come from CPUfreq. Board-specific USB-properties are moved out of the SoC dtsi. On SM6375 L3 scaling, IMEM, RMTFS, RPM sleep stats, Tsens, modem remoteproc and WiFi nodes are added. Tsens thermal zones are defined and additional low power states are defined. Sony Xperia 10 IV gains volume down key support. On SM8150 another UART is introduced, to be used by GNSS on the SA8155 ADP. Support for the Flash LED block in PM8150L is added. On SM8250 TPDM MM and PRNG is defined, MHI region is added to PCIe node. A few bug fixes are introduced after Devicetree validation. The DisplayPort controller on both SM8350 and SM8450 is defined and the related QMP instance is transitioned to the USB3/DP combo variant. IMEM and PIL info is introduced, for post mortem debugging of remoteprocs. On the HDK PMIC GLINK is enabled and role switch is enabled. Some audio resources are corrected. A typo in the USB role property of the Microsoft Surface is corrected, thanks to DeviceTree validation. PCIe controllers and PHYs descriptions are corrected, and pinctrl state definitions are moved from the soc to the board definition. BWMON compatibles are corrected. PM8550B gains the definition of the eUSB2 repeater and this is enabled on the MTP. PMIC GLINK is also defined for the MTP and connected to DWC3, for role switching support. In addition to this, a range of cleanups based on Devicetree validation is introduced. A few clock bindings are introduced, from topic-branches shared with the clock tree, to aid introduction of references to these. -----BEGIN PGP SIGNATURE----- iQJJBAABCAAzFiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmQ0QQEVHGFuZGVyc3Nv bkBrZXJuZWwub3JnAAoJEAsfOT8Nma3F3WgQALGaxeK2rYNfVVR8YMrsjDYow2vq Uup1AxG2sAGdLBiegf0btiIlw6y+t7pdUuP+elKx3sLrx/UiJfa7/fqdMhfft3Qo 16xhKIHQwokgGyl6hFJg2WTLrbC/qq60rB2YP/aR3pBCovu1nL/jX/9de28jNXUe FydCDCAfa1Zd3fDdp0uqGWA9mCSDDnlL0UuiP7PIkUFEEkPHdif/a3H1O5y1S+LW Eq38bJeMoQUYOYx4hYTxzmkCjbZVFEhho2lVyfHLy2fIaGuA4Gm4THnXMu5P9vIL Q4dNR6/XnquH2G9LcDLIcPWkWg8KkFDNnRQBkIkNZQAUqqY2klY/8sa0aZZJk53f KD393N/aWUV7tGYynLLc5oluoKLIlFFMdWVdxxR36zP70hu6Q2kGj4NUIB+odMdS QgJIyBBJ2dafvB5llXGaUXMOFYJYolcoss0EWfCU5jCg2XhxC8Q6mvpF1vAuCTTZ aueb0RlXxzdTcCy0jkqCl1GsBOuQONtAOnQ8nRE+8ookzLGJ8RBnoUmWUifzxnqe ueYdGPu2nnmqrbYAJqzr1Y9G7ImsX0V72iwC0wFFL8woZzDPGgEcDIyOaGCI3Hus P3weJ9WScj6ScRvRTI4EdZL03oaPPsF8zMA8xyXoCzeWtp3wsrtFNbVqAZSEvcAq a92owWcK+flh9Ckj =ZyN2 -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmQ5d90ACgkQYKtH/8kJ UifbkRAA0tH8h0ehQRsfgaijE+KNM5IOwi7iszD7NObNG+5Nal5QO6H9CvrEEbgv 4c6qwkC7F+ZN+zTVeKTufqZ6/zkylW+AMzL4UuAl5BxhMMrWzsg1NR1+NlbKssEb EBbLll7uxohuK79JNjmor/VV+zJX+hOyAhsf6yo6gpYFiJdgrRGwWVFVflNTNQis mpw5U4SyFNo4lq/HDERuxWbbsTl+VmoCeezCRgolaVkq4RTeMNcIxbm/kJ+t9ela HNm6mpJWqUUGeNpos5VdCqLApxBQgYmwz1mPHTQfC0V9v8YlVnTTKVmw4lHoGnZp ADN7iQSqqpsOLjML3+7HfQ8FWTTpj6FbE+vcSTiLjnstv9oDYd2wf9FPzJqcDVTl MucZVPk75zutakDuHOxizdfSTXPnpyEXnpnEUla6E+BntkB5eCTz45NN9B35gowA fY437FQ95eY2mV2vpya91rH2Rtw5BJbZW6jsw+WxT29A67LBa+sJrTayDNzYLuUz GjSb2vmRr2r3WG1jy8QQxVC3R/t4rlqXBnmJ91nHNIgrGl5ExrIEt+IDRsqHlS7T V1xX4fl9Ge2zfZeoFPFhgIBpPtvEkW5mUKIjRX6EBvRnG9+T8CWuWSnJDuFa6AMZ kxAhqUojmDO8f1E/BPiHHCP31dfUrMOVor0fu9qu7o8/H/WPo04= =OcHF -----END PGP SIGNATURE----- Merge tag 'qcom-arm64-for-6.4' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/dt Qualcomm ARM64 updates for v6.4 PCI I/O and MEM ranges are corrected across all targets with PCIe enabled. Likewise is CPU clocks defined to be provided from CPUfreq for a wide range of platforms, to satisfy the OPP definitions, and LLCC bank information is corrected for all relevant platforms. IPQ5332 gains SMEM, CPUfreq and support for triggering download mode. The MI01.2 board is introduced. On MSM8916 WCN compatibles are moved to be defined per board, to avoid issues when boards rely on the incorrect defaults. Support for Yiming UZ801 4G modem stick is introduced. XO clock is defined and fed to RPMCC on MSM8953 and MSM8976, to ensure clock trees are properly rooted. DSI clocks feeding into gcc are described on MSM8953. On MSM8996 the external audio components are moved from the SoC dtsi. A few DWC3 quirks are added. On MSM8998 GPIO names are introduced for Sony Xperia XZ Premium, XZ1 and XZ1 Compact. A numbe of boards have GPIO keys properly marked as wakeup-source. The SA8775P platform is extended with CPUfreq, UARTs, I2C controllers, SPI controllers, SPMI and PMICs, PDC support. The associated PMICs gains reset and power key support, as well as thermal zones defined. Nodes are sorted. On top of this the SA8775P Ride board/platform is introduced. On SC7180 and SC7280 a range of fixes coming from DeviceTree validation are introduced, some clearing up unused properties, others correcting errors. A number of Google rev0 boards on SC7180 are dropped, as these are not considered to be in use by anyone anymore. On SC8280XP RTC support is introduced and enabled for the CRD and Lenovo Thinkpad X13s. It gains another UART, upon which Bluetooth is enabled on the Lenovo ThinkPad X13s. The touchpad definition is altered to attempt to probe both devices seen in the wild. A number of bug fixes are also introduced, and the regulator definitions on X13s are corrected. On SDM845 dynamic power coefficients are improved. BWMON compatible is corrected. Xiaomi Pocophone F1 gains notification LED. Sony Xperia XZ2, XZ2 Compact and XZ3 gains display, touchscreen, gpu and remoteproc support. OnePlus 6 and 6T gains hall sensor. GPU clock controller and remoteproc nodes are added for SM6115. CPU clock are defined to come from CPUfreq. Board-specific USB-properties are moved out of the SoC dtsi. On SM6375 L3 scaling, IMEM, RMTFS, RPM sleep stats, Tsens, modem remoteproc and WiFi nodes are added. Tsens thermal zones are defined and additional low power states are defined. Sony Xperia 10 IV gains volume down key support. On SM8150 another UART is introduced, to be used by GNSS on the SA8155 ADP. Support for the Flash LED block in PM8150L is added. On SM8250 TPDM MM and PRNG is defined, MHI region is added to PCIe node. A few bug fixes are introduced after Devicetree validation. The DisplayPort controller on both SM8350 and SM8450 is defined and the related QMP instance is transitioned to the USB3/DP combo variant. IMEM and PIL info is introduced, for post mortem debugging of remoteprocs. On the HDK PMIC GLINK is enabled and role switch is enabled. Some audio resources are corrected. A typo in the USB role property of the Microsoft Surface is corrected, thanks to DeviceTree validation. PCIe controllers and PHYs descriptions are corrected, and pinctrl state definitions are moved from the soc to the board definition. BWMON compatibles are corrected. PM8550B gains the definition of the eUSB2 repeater and this is enabled on the MTP. PMIC GLINK is also defined for the MTP and connected to DWC3, for role switching support. In addition to this, a range of cleanups based on Devicetree validation is introduced. A few clock bindings are introduced, from topic-branches shared with the clock tree, to aid introduction of references to these. * tag 'qcom-arm64-for-6.4' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (256 commits) arm64: dts: qcom: sc8280xp-x13s: Add bluetooth arm64: dts: qcom: sc8280xp: Define uart2 arm64: dts: qcom: sc8280xp: Add "mhi" region to the PCIe nodes arm64: dts: qcom: sm8250: Add "mhi" region to the PCIe nodes arm64: dts: qcom: sdm845: Add "mhi" region to the PCIe nodes arm64: dts: qcom: sa8775p-ride: set gpio-line-names for PMIC GPIOs arm64: dts: qcom: sa8775p: add PMIC GPIO controller nodes arm64: dts: qcom: sa8775p: pmic: add thermal zones arm64: dts: qcom: sa8775p: pmic: add support for the pmm8654 RESIN input arm64: dts: qcom: sa8775p: pmic: add the power key arm64: dts: qcom: sa8775p: add the Power On device node arm64: dts: qcom: sa8775p: add support for the on-board PMICs arm64: dts: qcom: sa8775p: add the spmi node arm64: dts: qcom: sa8775p: add the pdc node arm64: dts: qcom: sa8775p: sort soc nodes by reg property arm64: dts: qcom: sa8775p: pad reg properties to 8 digits arm64: dts: qcom: sc8280xp: correct Soundwire wakeup interrupt name arm64: dts: qcom: sdm845-tama: Enable GPI_DMA0/1 arm64: dts: qcom: sdm845-tama: Enable GPU arm64: dts: qcom: sdm845-tama: Enable remoteprocs ... Link: https://lore.kernel.org/r/20230410170233.5931-1-andersson@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Arnd Bergmann
|
c47b89b418 |
TI K3 device tree updates for v6.4
New features: * Overlays for CPSW9G and CPSW5G on J721e-evm, J7200-evm * Add support for AM625 based BeaglePlay, AM62-LP-SK * Audio, RTC, watchdog support for AM625 * McSPI for J7200,j721e, j721s2, J784s4 * ADC for j721s2 * Crypto acceleration, CPSW2G for J784s4 Non critical fixes: AM62, AM62a: * Fix schematics error to increase DDR to 4GB on AM62a-SK * L2Cache size fix (AM62a/AM625) * ti,vbus-divider property to USB1 on AM625-SK * Gpio count fix for AM625 J7200,j721e, j721s2, J784s4, AM68, AM69: * ti,sci-dev-id for J784s4 NAVSS nodes * j721e-sk: Drop application specific firmware name * am68-sk: Fix the gpio expander lines for production version Cleanups: * Pinmux header move to dt folder (next kernel PR, we will drop the uapi header). * j721e: ti,strobe-sel property cleanup for descoped HS400 MMC operation -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEE+KKGk1TrgjIXoxo03bWEnRc2JJ0FAmQ0EJgACgkQ3bWEnRc2 JJ0SYRAApVR/RAGWBrYYAQ8oN+kIDaep3mHPtRMPtVwKyK0SU5FQZM7PWok2wdpH h0gw+1S4kZKcZsrz7153TzZHUNHtJ+TEG1g+EIhJh2OSV0SnqUOWucTS9nkt7MPs DvzbrF8RL9xCEi0dUtpBT+YEx0HF5AijkvjHWKBYI/XcbxmqrrQZ34wJxUR7qsFC nO8gADcQZjp14ZwP3b4Ag6jLMez2ERqZ3tM/if9WOlvpkQ3eI9e6Gjq5inMPjzNm gjqvN1gyWDi3pbG7Y+jrs/O26atnOTRAHUKww460x15nNi6a3qU1jN4awlBtANla UTu7CSuG1I6HWQaR2bGlWgkKxNOJAcfqtiCtMHsInYy7yDlwczC1KwWSFWdGxNoF 6yelo+X4oJhiQOqhVQdHpyCiT4HoyEWaS1tsXcke16N8X0fjdTWIq1deqXp5vLdE ne5FYQK1y+HyGJJGeDddbV9zuUQby9KoziB+N/VHWgDjUGWbrdmSEA6C3BNcF5+4 X6wd0NQPMc9sFVR5s3zGXrtozVMlkMuozCYlPVtaHDtNkGftGIq0KrsjQVIKiYwb GinjS8eM63p0PGiZRBf+49EkH/yC82svSM/XepEFUyvUPwYdm43zVUVz6tNqv3RT ms9wnzJpgRd+TcPn1xr5QojFxsnZjGr/Hb6mvbcU5S1OQfgkqZo= =zvF1 -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmQ5dgAACgkQYKtH/8kJ UieM1g//bYhlrB3jwoecovyxOocd85EnfP1ykwXvGVjF+UvHujfcH7ExZaCg3Km3 RQbMVLwynhGRBvys1YwPRh09FjOSKoZwpyly0ROFCP9Sc6QJLjtzb7zVAo7U3A5K rVZ/ZeG3/OLqB3l5ZaJS6zVJppnvm3R0CtVlRO9oD/XUdKhRDQPCaXZyD3oaMCjY bXNs1y/giESPCzwnR8qVvVHGQ6JoMtnznff1zgodYvuo9+e3xSIpTZvbRY1Aguc1 QbcaRISNqOpGsZHrUlw+PrPlIYQYb1osOq81R4g6NX3/J+UN9kz+uTb7f1xtrt+W tGbvVRQHNiRXHOC5fUGwxfcV3+M6YUKpCiap/l1brcchfeHb0La1+BN0dRMgybQf EG27jfHbAAEA8L7b1gutAY3yNfhJPvahWT/wQ0L4xhu33KpRSNwHBSkg6qXAFi1u aPWfRwm3bGpVoHltTVKdULqZb+bYKY/w8GfipbvCpI2LvX8MJrsFSxqFcSw1vgB7 iNYebbVUI+e/UUTEeKYE4ct98vezbGNBTxFcsPgVQL5UHAkYrzXHet3WuDP73hEz w+01eIaDA8R1TnpgTX4doqgEj6illiv6WY2EUwoJzBGc76UVOQf2eraimWGp1Vtr mh8tlfjnErTv+iMPcBO8bjvBXDhQcb4iBN+5q8KkVvqtOtcSsjA= =3wzd -----END PGP SIGNATURE----- Merge tag 'ti-k3-dt-for-v6.4' of git://git.kernel.org/pub/scm/linux/kernel/git/ti/linux into soc/dt TI K3 device tree updates for v6.4 New features: * Overlays for CPSW9G and CPSW5G on J721e-evm, J7200-evm * Add support for AM625 based BeaglePlay, AM62-LP-SK * Audio, RTC, watchdog support for AM625 * McSPI for J7200,j721e, j721s2, J784s4 * ADC for j721s2 * Crypto acceleration, CPSW2G for J784s4 Non critical fixes: AM62, AM62a: * Fix schematics error to increase DDR to 4GB on AM62a-SK * L2Cache size fix (AM62a/AM625) * ti,vbus-divider property to USB1 on AM625-SK * Gpio count fix for AM625 J7200,j721e, j721s2, J784s4, AM68, AM69: * ti,sci-dev-id for J784s4 NAVSS nodes * j721e-sk: Drop application specific firmware name * am68-sk: Fix the gpio expander lines for production version Cleanups: * Pinmux header move to dt folder (next kernel PR, we will drop the uapi header). * j721e: ti,strobe-sel property cleanup for descoped HS400 MMC operation * tag 'ti-k3-dt-for-v6.4' of git://git.kernel.org/pub/scm/linux/kernel/git/ti/linux: (34 commits) arm64: dts: ti: k3-j784s4-evm: Add eMMC mmc0 support arm64: dts: ti: Enable audio on SK-AM62(-LP) arm64: dts: ti: k3-am62-main: Add McASP nodes arm64: dts: ti: k3-j784s4: Add MCSPI nodes arm64: dts: ti: k3-j721s2: Add MCSPI nodes arm64: dts: ti: k3-j7200: Add MCSPI nodes arm64: dts: ti: k3-j721e: Add MCSPI nodes arm64: ti: dts: Add support for AM62x LP SK arm64: dts: ti: Refractor AM625 SK dts dt-bindings: arm: ti: k3: Add compatible for AM62x LP SK arm64: dts: ti: k3-am625-sk: Add ti,vbus-divider property to usbss1 arm64: dts: ti: k3-am68-sk-base-board: Update IO EXP GPIO lines for Rev E2 arm64: dts: ti: Add k3-am625-beagleplay dt-bindings: arm: ti: Add BeaglePlay arm64: dts: ti: k3-j7200: Add overlay to enable CPSW5G ports in QSGMII mode arm64: dts: ti: j7200-main: Add CPSW5G nodes arm64: dts: ti: k3-j721e: Add overlay to enable CPSW9G ports in QSGMII mode arm64: dts: ti: k3-j721e: Add CPSW9G nodes arm64: dts: ti: k3-j784s4-evm: Enable MCU CPSW2G arm64: dts: ti: k3-j721s2-common-proc-board: Add pinmux information for ADC ... Link: https://lore.kernel.org/r/20230410140521.3u3fftgnejakqnzj@shakable Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Arnd Bergmann
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17e26de12a |
Renesas DTS updates for v6.4 (take two)
- Add PWM support for the R-Car H1 and H2 SoCs,
- Add slide switch and I2C support for the Marzen development board,
- Add SCI (serial) and Camera support for the RZ/G2L SoC and the
RZ/G2L SMARC EVK development board,
- Add IOMMU support for the R-Car V4H SoC,
- Miscellaneous fixes and improvements.
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Merge tag 'renesas-dts-for-v6.4-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel into soc/dt
Renesas DTS updates for v6.4 (take two)
- Add PWM support for the R-Car H1 and H2 SoCs,
- Add slide switch and I2C support for the Marzen development board,
- Add SCI (serial) and Camera support for the RZ/G2L SoC and the
RZ/G2L SMARC EVK development board,
- Add IOMMU support for the R-Car V4H SoC,
- Miscellaneous fixes and improvements.
* tag 'renesas-dts-for-v6.4-tag2' of git://git.kernel.org/pub/scm/linux/kernel/git/geert/renesas-devel:
arm64: dts: renesas: r8a779a0: Revise renesas,ipmmu-main
arm64: dts: renesas: falcon-csi-dsi: Set bus-type for MAX96712
arm64: dts: renesas: r8a779g0: Add iommus to MMC node
arm64: dts: renesas: r8a779g0: Add iommus to DMAC nodes
arm64: dts: renesas: r8a779g0: Add IPMMU nodes
arm64: dts: renesas: r8a779f0: Revise renesas,ipmmu-main
arm64: dts: renesas: rzg2l-smarc: Enable CRU, CSI support
arm64: dts: renesas: r9a07g044: Add CSI and CRU nodes
arm64: dts: renesas: r9a07g044: Enable SCI0 using DT overlay
ARM: dts: r8a7790: Add PWM device nodes
ARM: dts: r8a7790: Add TPU device node
ARM: dts: marzen: Enable I2C support
ARM: dts: marzen: Add slide switches
ARM: dts: r8a7779: Add PWM support
dt-bindings: clock: r8a7779: Add PWM module clock
arm64: dts: renesas: rzg2l: Add clock-names and reset-names to DMAC nodes
Link: https://lore.kernel.org/r/cover.1681113117.git.geert+renesas@glider.be
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
|
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Josh Poimboeuf
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27dea14c7f |
cpu: Mark nmi_panic_self_stop() __noreturn
In preparation for improving objtool's handling of weak noreturn functions, mark nmi_panic_self_stop() __noreturn. Signed-off-by: Josh Poimboeuf <jpoimboe@kernel.org> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Link: https://lore.kernel.org/r/316fc6dfab5a8c4e024c7185484a1ee5fb0afb79.1681342859.git.jpoimboe@kernel.org |
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Josh Poimboeuf
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7412a60dec |
cpu: Mark panic_smp_self_stop() __noreturn
In preparation for improving objtool's handling of weak noreturn functions, mark panic_smp_self_stop() __noreturn. Signed-off-by: Josh Poimboeuf <jpoimboe@kernel.org> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Link: https://lore.kernel.org/r/92d76ab5c8bf660f04fdcd3da1084519212de248.1681342859.git.jpoimboe@kernel.org |
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Josh Poimboeuf
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25a6917ca6 |
init: Mark start_kernel() __noreturn
Now that arch_call_rest_init() is __noreturn, mark its caller start_kernel() __noreturn. Signed-off-by: Josh Poimboeuf <jpoimboe@kernel.org> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Link: https://lore.kernel.org/r/7069acf026a195f26a88061227fba5a3b0337b9a.1681342859.git.jpoimboe@kernel.org |
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Josh Poimboeuf
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9ea7e6b62c |
init: Mark [arch_call_]rest_init() __noreturn
In preparation for improving objtool's handling of weak noreturn functions, mark start_kernel(), arch_call_rest_init(), and rest_init() __noreturn. Signed-off-by: Josh Poimboeuf <jpoimboe@kernel.org> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Reviewed-by: Nick Desaulniers <ndesaulniers@google.com> Link: https://lore.kernel.org/r/7194ed8a989a85b98d92e62df660f4a90435a723.1681342859.git.jpoimboe@kernel.org |
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Rafael J. Wysocki
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684952212c | Merge back cpufreq changes for 6.4-rc1. | ||
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Rafael J. Wysocki
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cfeeb7d37d | Merge back general thermal control changes for 6.4-rc1. | ||
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Rafael J. Wysocki
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065ca2a8c6 | Merge back Intel thermal control material for 6.4-rc1. | ||
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Josh Poimboeuf
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e8deb00c0c |
context_tracking: Fix KCSAN noinstr violation
With KCSAN enabled, even empty inline stubs can be out-of-lined. Force the context_tracking_guest_exit() stub inline. Fixes the following warnings: vmlinux.o: warning: objtool: vmx_vcpu_enter_exit+0x1be: call to context_tracking_guest_exit() leaves .noinstr.text section vmlinux.o: warning: objtool: svm_vcpu_enter_exit+0x85: call to context_tracking_guest_exit() leaves .noinstr.text section Signed-off-by: Josh Poimboeuf <jpoimboe@kernel.org> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Link: https://lore.kernel.org/r/dc93f45abdec90c171108b4b590b7fff5790963c.1681320026.git.jpoimboe@kernel.org |
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Josh Poimboeuf
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e0b081d17a |
sched: Fix KCSAN noinstr violation
With KCSAN enabled, end_of_stack() can get out-of-lined. Force it inline. Fixes the following warnings: vmlinux.o: warning: objtool: check_stackleak_irqoff+0x2b: call to end_of_stack() leaves .noinstr.text section Signed-off-by: Josh Poimboeuf <jpoimboe@kernel.org> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Link: https://lore.kernel.org/r/cc1b4d73d3a428a00d206242a68fdf99a934ca7b.1681320026.git.jpoimboe@kernel.org |
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Arnd Bergmann
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d40a2f5062 |
RISC-V Devicetrees for v6.4
Microchip: A "fix" for the system controller's regs on PolarFire SoC, adding a missing reg property. The patch had been sitting there for months and I only re-found it recently, so you can guess how much of a "fix" it actually is. It'll become needed when the system controller's QSPI gets added in the future, but at present there's no urgency as the driver can handle both the current and "fixed" versions. StarFive: Basic support for the JH7110 & the associated first-party dev board, the VisionFive v2 (in two forms). There's a bunch of dt-bindings required for this too, all of which have had input from the DT folk. There's enough in this tag to boot to a console w/ an initramfs but little more. The SoC supports some of the "new" bit manipulation instructions, which is a good test for the recently added Zbb support in the kernel. Signed-off-by: Conor Dooley <conor.dooley@microchip.com> -----BEGIN PGP SIGNATURE----- iHUEABYIAB0WIQRh246EGq/8RLhDjO14tDGHoIJi0gUCZC8o6wAKCRB4tDGHoIJi 0pdpAP0Y0qkT5tZSV635h2XOrWBpW3D3Vpx6+LGmw2mRjhHVPgD+Mfe0LkP6Dbq3 JS6fMISbgMAG/8dqcys/e0gmHksYJAk= =FsQ1 -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmQ5U/EACgkQYKtH/8kJ Uif0hhAAxHk3QfPh5BF/1TzzUdeOgXuCiT9sQWHB9VtX1N03nwRoMETbFPRxjI1v P/KckzA5nxVA8q8Me+hb5nRQFwiDOVsH5cBMMnPQ46NGImEaptZ7Jwf1/RT1yk6n eBg9vRipRhD56CYTE20iasjhwjVohljvce58Rg61oXQ2lK1dKxnIjPeDfypPz9/p 149/wWUy8e6pGIciDw25hKGuxZiXHlO4OwdL0yWggXl/iuBi8l7gAQAcCv7vWNS3 oM8t6n/o1Vr0L+MBJtBBKPmuPKu7u54+RWsaKrO3zyiRRKGjI/VMZOi5ZKcooynL ThAGlqCIrnXu25XJ2V7l95FDTdPeTljhh1FRyOIJjvzlCX9QBdr5suQU3q9zr+Mf ZdE5baezkwsTF+1Hi/Yc65gCAtUfQmGG88/TE1krFw4aaE1xVr7nAfDCpdLcCzDS D/1b9/4h/2B2dJIdBO3VdzKG4bTcaK3Eb6TX6z2zIZ6stNHcoDxr6dcQXdiGAoYu /I8zAX3zTo5Q8E0Y67h7ao4dxDqxVUIop/92OJeD3X3IkcJreXEuxBEEsRvs53P6 /tqAsG5zPpW5GwfeopUHfFUYJRn+sLrqQ9zD+k4InwiCSlR/tJ7tBMXqyRsQUEyR P336MHjq10PRVmgKjsPpTx87K9f39Qgh6doHWAKBfMo/gSQ8z9U= =l6EI -----END PGP SIGNATURE----- Merge tag 'riscv-dt-for-v6.4' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux into soc/dt RISC-V Devicetrees for v6.4 Microchip: A "fix" for the system controller's regs on PolarFire SoC, adding a missing reg property. The patch had been sitting there for months and I only re-found it recently, so you can guess how much of a "fix" it actually is. It'll become needed when the system controller's QSPI gets added in the future, but at present there's no urgency as the driver can handle both the current and "fixed" versions. StarFive: Basic support for the JH7110 & the associated first-party dev board, the VisionFive v2 (in two forms). There's a bunch of dt-bindings required for this too, all of which have had input from the DT folk. There's enough in this tag to boot to a console w/ an initramfs but little more. The SoC supports some of the "new" bit manipulation instructions, which is a good test for the recently added Zbb support in the kernel. Signed-off-by: Conor Dooley <conor.dooley@microchip.com> * tag 'riscv-dt-for-v6.4' of https://git.kernel.org/pub/scm/linux/kernel/git/conor/linux: riscv: dts: starfive: Add StarFive JH7110 VisionFive 2 board device tree riscv: dts: starfive: Add StarFive JH7110 pin function definitions riscv: dts: starfive: Add initial StarFive JH7110 device tree dt-bindings: riscv: Add SiFive S7 compatible dt-bindings: interrupt-controller: Add StarFive JH7110 plic dt-bindings: timer: Add StarFive JH7110 clint dt-bindings: clock: Add StarFive JH7110 always-on clock and reset generator dt-bindings: clock: Add StarFive JH7110 system clock and reset generator riscv: dts: microchip: fix the mpfs' mailbox regs riscv: dts: microchip: add mpfs specific macb reset support Link: https://lore.kernel.org/r/20230406-shank-impromptu-3d483bbc249f@spud Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Arnd Bergmann
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6dcb6ff6ec |
Samsung DTS ARM64 changes for v6.4
1. Exynos850: add headers with AUD, G3D and HSI clock controller clock
IDs. Add G3D (GPU) clock controller node.
2. Exynos5433: fixes for dtbs_check: move MIPI phy to PMU node.
3. Drop old MSHC aliases (while adding proper mmc-ddr-1_8v which was
selected by the driver based on the MSHC alias) and add generic MMC
aliases in each board. The aliases match known numbering in
the schematics.
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Merge tag 'samsung-dt64-6.4' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux into soc/dt
Samsung DTS ARM64 changes for v6.4
1. Exynos850: add headers with AUD, G3D and HSI clock controller clock
IDs. Add G3D (GPU) clock controller node.
2. Exynos5433: fixes for dtbs_check: move MIPI phy to PMU node.
3. Drop old MSHC aliases (while adding proper mmc-ddr-1_8v which was
selected by the driver based on the MSHC alias) and add generic MMC
aliases in each board. The aliases match known numbering in
the schematics.
* tag 'samsung-dt64-6.4' of https://git.kernel.org/pub/scm/linux/kernel/git/krzk/linux:
arm64: dts: exynos: add mmc aliases
arm64: dts: exynos: drop mshc aliases
arm64: dts: exynos: Add CMU_G3D node for Exynos850 SoC
arm64: dts: exynos: move MIPI phy to PMU node in Exynos5433
dt-bindings: clock: exynos850: Add AUD and HSI main gate clocks
dt-bindings: clock: exynos850: Add Exynos850 CMU_G3D
Link: https://lore.kernel.org/r/20230405080438.156805-1-krzysztof.kozlowski@linaro.org
Signed-off-by: Arnd Bergmann <arnd@arndb.de>
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Arnd Bergmann
|
aebe916f9e |
A few more Qualcomm driver updates for v6.4
This introduces a new binding and a dedicated driver for the Qualcomm Inline-Crypto-Engine (ICE), in order to support a single shared instance between SDHCI and UFS, found in recent platforms. RSC version check is updated to support minor revisions of v3 of the ip block, the SMD-RPM interface is transitioned to GFP_ATOMIC to avoid the shrinker to kick in underneath the GPU and QCM2290 support is added to the SCM binding. -----BEGIN PGP SIGNATURE----- iQJJBAABCAAzFiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmQ4vZ8VHGFuZGVyc3Nv bkBrZXJuZWwub3JnAAoJEAsfOT8Nma3FU9wP/j3e55X/JCQ5h6AIHPqs8oKSvMk8 zbLgtHqEML90VYD/4jnZzdhcz83WAi+4VByfjaeh0nMCUJHQ0mT67woRD/BJLH+j qg0eWLShwPNM9wYZ430RT3GZQbcZDu8s32FgneTipx0ImWCkiS/Iy19gaj4NWcUW Oh29km90udup/ufmkDFc/a58gqVhW3CAQ8sLy/mON7ND5o1pSdjCgxwtEJ7xTXat 3nIQ/1+0F17LuhbgrPbKReyMaTKKZ/TxazROjbs+KXqlrMp42cnE5jXQVBoqH65K J7i433ZbM0gUgMSFZQyjJiF0a6tu0t1I7S87u7t8gsqOtC67HWO/egXfk1nk7d79 dO6ME52M7z6jtp+xuVaCoWmkR9DBcZstBq0n8h2NRTlEE6xfEUyyMx+BwQNBhbns FsyqOc+T/Iwirr+A8ydVPznb03zS5G62ryJUzCTcs+oOORkG7BP8h1qwThttUqvD SiC/d36bELQOGcPibnNIU3OVb8XI1Wg81cS4m3CT1Sz2+mSIYV3PU3tBmqjveCOD XOXUEPSulDQpTMHyq3a20xkEZlhz47SwOAa5HWyOf6Cqo9YVK4ihX4NY7F94x0rI rq39bMpLXJnNHY/wRNaiOI+ZSc8A+bsgsFmB6REZPO1R/Ql/A1rwR29j0Saj8A13 Y13z0R7/vFSXySoD =aZXM -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmQ5TVQACgkQYKtH/8kJ Uid42RAAloVX47sMATLfRmxL6fvvlcJJgAuXl9lYrbkMmEpKECcLDa1PWu4KPWmo hoVb4IUYaF1tNPNmWKMenxdv+JLL9oSDD0fZ1fvBJOj5A0sOu3y+Zwz2kizqY4wl YEflCSsAS0Q+lnCS0dok3m5KwDdbyTvvdBSNZkpj95yQZ/K38OU6uu91Mo7vPZhe RZqd4eEgYU0zaIz7RJVCwFphz9zZoq6hAw5VQ+h7py9Acl2Tmp5V9BcyzHwe1eIa pgxAtY9ixHqSjFWjDKcVJj5CJ4boi4cV1/XLJafgI94YsKBsSIbSF6Shu3W2gAKU w998vGxzEGUOSbLEbR4fuXLLGGGfTDb2r0q5mBi5SCtf2tF3ce6O9oNdJj+ltgHr LO5DsKGIxg4D3CScXR+EZs4A/B9DJz+ZmetOyjPvnaRecWGOvbYto6ymR6mfRSqO rjiZW4r50SpKLdj2vvb0p0t1uQZyJ2m+yxyuaz0Yt+g7TSase3IocrTzTD8sKcz+ dENsNlyoeSITyI7wdfOyU/Zc5G8Hui7AW8xvWs5rZS3Nr3pVr+9UnLPw78MyYeN7 RwfH40/TPqVV9KKbmC9BLEH1bVIu0nxsJTtzvDIT4omd3w0SuQr0P1HlHeDvbRf4 w2NrEquP5nPet8/iWYKuSQ1bmGrLdIYwh75mq1B+fhTG9uH4PJs= =D6Q8 -----END PGP SIGNATURE----- Merge tag 'qcom-drivers-for-6.4-2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/drivers A few more Qualcomm driver updates for v6.4 This introduces a new binding and a dedicated driver for the Qualcomm Inline-Crypto-Engine (ICE), in order to support a single shared instance between SDHCI and UFS, found in recent platforms. RSC version check is updated to support minor revisions of v3 of the ip block, the SMD-RPM interface is transitioned to GFP_ATOMIC to avoid the shrinker to kick in underneath the GPU and QCM2290 support is added to the SCM binding. * tag 'qcom-drivers-for-6.4-2' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: dt-bindings: crypto: Add Qualcomm Inline Crypto Engine soc: qcom: Make the Qualcomm UFS/SDCC ICE a dedicated driver dt-bindings: firmware: document Qualcomm QCM2290 SCM soc: qcom: rpmh-rsc: Support RSC v3 minor versions soc: qcom: smd-rpm: Use GFP_ATOMIC in write path Link: https://lore.kernel.org/r/20230414024302.2411985-1-andersson@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Arnd Bergmann
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126c6da71f |
Qualcomm driver updates for v6.4
The Qualcomm SCM driver will now always clear the download bit, avoiding entering download mode on a clean reboot because the bootloader left it set. The vmid bitmap passed to qcom_scm_assign_mem() is transitioned to a well defined size. SM6375 support is added, and SC8180X, QDU1000/QRU1000, IPQ5332 and IPQ9574 compatibles are documented. GENI gains support for newer hardware with deeper FIFOs. The BWMON driver is updated to better handle the two register blocks, which are not consistent between MSM8998 and newer platforms. The LLCC driver no longer assumes a fixes stride across the various banks, and instead acquire the bank placement from DeviceTree. EDAC support for polling is introduced. EDAC support on SDM845 is disabled, as its been observed that accessing relevant registers is not permitted on most devices. PMIC GLINK is reworked to support defining which auxiliary children to spawn per platform, support for spawning a UCSI child is added and SM8450 and SM8550 is introduced. The RPM power-domain driver is cleaned up by moving and generalizing structures that are common between platforms, rather than duplicating everything. Macros are replaced with just direct definition of the relevant structures. Support for defining parent relationships between the power-domains is introduced, like it has been in rpmhpd for a long time. Number of processors has gone up, so max processor count in SMEM is bumped again. Error handling in SMSM is cleaned up using dev_err_probe(). Socinfo is taught about IPQ9574, QCM2290, QRB2210, QRB4210, SM7150, SA8775P and a number of PMICs. -----BEGIN PGP SIGNATURE----- iQJJBAABCAAzFiEEBd4DzF816k8JZtUlCx85Pw2ZrcUFAmQ0Ka0VHGFuZGVyc3Nv bkBrZXJuZWwub3JnAAoJEAsfOT8Nma3F9MIP/0vjJCDf+EtUJpN1KxwMzmXZRuac wJweQdgfD8m+fB+33Gs9bX8Jw8j4zddZlM45XCHiNsQ72Gs8RqvwCBcjkxtCGrTq Jm33zEWcRjm/7Z1R4bOrGdRM92NAUJK0RePSNSpBoB4s5rdvzYHCYttXGe80A7xI nLLEpxAbUb3y6UtP7adqEpiWtIJ16Nv/Sa1uWGXyhwjwTuBCXFKG2UdsQxJhxLna CkkJ2d4tfVcRcYNh8DEZEX9qs9aikZJvH3QtTe2UpJz8hlNroqmgHZtAWdPbOzAY xAMv/UUeq+kquUJr0cRhcuIRBruUGhnXISqHsc0T6xqyfnq6dR4m/tVfwlQ15BKe zq17mJUiK7fZyWWSkBf8SOPgez8GUaD/2Zqssf4JIKeC/VT3uqW3oejhm6o+sfrG ik0Tph/SVhcVvUQOsVygdf4BQXvOJDnXoZo182XZV4FiESkxnbRlhedzk2+s3agU 0F76hcNgASpskPw37A4uHHC9bwfpWJQWuGVHUVW9Me6CMxxaCcXWIhDc47i6NZeB vrwJGXs8dWCKj9pOdI1Fb9GJ7LvP7kQF9VfdwqA4jstWggooAkNaAfgYnAuprsAC kCCvBOfoB1LjB4fLjf5gJEwr9HOOwS9TPtsfd772IFXdI9zwv9ImDYRMpCX5L3pk aVEW4VjRI6TRTFMB =Bo2w -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQIzBAABCgAdFiEEiK/NIGsWEZVxh/FrYKtH/8kJUicFAmQ5SFYACgkQYKtH/8kJ UieADQ/+JSEbvQapNaxgKpG6HS3uQq+24BUmBvh2MbM5SwPi6D0JqoUx5wtnpg91 uBanGMKqCKkqc64jgNVsRwJW6/d8pdLLx7VCEsJaJPjhvBptD6K2QTFF5Gflbp7a HZmlteqMZG8zdc0KHSCuSXX6RtonAE9xBWBXe5EUhY22eyPB9okhNerRDSHU3add 7fm48p3V5k4/atX4BFYiysiHoAWxnXW+mz1uSfTWuONkW8+vKrAcD5b9ujzXW6ZD TGXmKHY5M08BsqHqDcEBjReuIVcacs63H6rX0JMx0I7uCT1qNvmwEqLeXrXKoo0n hwumr+I2+CEzhhSCkZY8rWH/He7Kd7WxfLAxCMdaDBoZYbxGAAqytZGYBJUx8mY8 RDA8YHfYWt56rhZL8SrwhD0dzLkeDTT5oKXFLtrTTcghOFNJl4uELhUU5wXJGP6q 3GTK0nxIoBKznaCzAhD/9JonS8mO3GbigVhw/yGQeionwZJyl1DXdSeRYGezDeII eKjtKvngoKbt/3Il9yiL+JUaPFIfPwVrIGnMBQjayjyH8m+5TDHD0+f0R5mnW8g8 qLvyga0GndPkFYS0Gpnw8Dqd5NfeRQVGkSJEELyFevnFHldZpVw8kCuejmfjXvGV tsOMjL0iZt4NrIZr5eFBa4b41o47hU8s9WYY/4VEaccuybTCxUc= =wYqZ -----END PGP SIGNATURE----- Merge tag 'qcom-drivers-for-6.4' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux into soc/drivers Qualcomm driver updates for v6.4 The Qualcomm SCM driver will now always clear the download bit, avoiding entering download mode on a clean reboot because the bootloader left it set. The vmid bitmap passed to qcom_scm_assign_mem() is transitioned to a well defined size. SM6375 support is added, and SC8180X, QDU1000/QRU1000, IPQ5332 and IPQ9574 compatibles are documented. GENI gains support for newer hardware with deeper FIFOs. The BWMON driver is updated to better handle the two register blocks, which are not consistent between MSM8998 and newer platforms. The LLCC driver no longer assumes a fixes stride across the various banks, and instead acquire the bank placement from DeviceTree. EDAC support for polling is introduced. EDAC support on SDM845 is disabled, as its been observed that accessing relevant registers is not permitted on most devices. PMIC GLINK is reworked to support defining which auxiliary children to spawn per platform, support for spawning a UCSI child is added and SM8450 and SM8550 is introduced. The RPM power-domain driver is cleaned up by moving and generalizing structures that are common between platforms, rather than duplicating everything. Macros are replaced with just direct definition of the relevant structures. Support for defining parent relationships between the power-domains is introduced, like it has been in rpmhpd for a long time. Number of processors has gone up, so max processor count in SMEM is bumped again. Error handling in SMSM is cleaned up using dev_err_probe(). Socinfo is taught about IPQ9574, QCM2290, QRB2210, QRB4210, SM7150, SA8775P and a number of PMICs. * tag 'qcom-drivers-for-6.4' of https://git.kernel.org/pub/scm/linux/kernel/git/qcom/linux: (51 commits) dt-bindings: firmware: document Qualcomm SC8180X SCM dt-bindings: sram: qcom,imem: document SM6375 IMEM soc: qcom: icc-bwmon: Handle global registers correctly soc: qcom: icc-bwmon: Remove unused struct member soc: qcom: smsm: Use dev_err_probe() firmware: qcom_scm: Add SM6375 compatible soc: qcom: llcc: Add configuration data for SM7150 dt-bindings: arm: msm: Add LLCC for SM7150 dt-bindings: soc: qcom: smd-rpm: re-add missing qcom,rpm-msm8994 soc: qcom: pmic_glink: register ucsi aux device dt-bindings: soc: qcom: qcom,pmic-glink: document SM8550 compatible dt-bindings: soc: qcom: qcom,pmic-glink: document SM8450 compatible firmware: qcom_scm: Clear download bit during reboot dt-bindings: soc: qcom: aoss: Document QDU1000/QRU1000 compatible dt-bindings: firmware: qcom,scm: Update QDU1000/QRU1000 compatible dt-bindings: soc: qcom: smd-rpm: Add IPQ9574 compatible firmware: qcom_scm: Use fixed width src vm bitmap dt-bindings: firmware: qcom,scm: document IPQ5332 SCM dt-bindings: scm: Add compatible for IPQ9574 soc: qcom: rpmpd: Remove useless comments ... Link: https://lore.kernel.org/r/20230410152421.4477-1-andersson@kernel.org Signed-off-by: Arnd Bergmann <arnd@arndb.de> |
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Jens Axboe
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d2a1d45ced |
nvme updates for Linux 6.4
- drop redundant pci_enable_pcie_error_reporting (Bjorn Helgaas)
- validate nvmet module parameters (Chaitanya Kulkarni)
- fence TCP socket on receive error (Chris Leech)
- fix async event trace event (Keith Busch)
- minor cleanups (Chaitanya Kulkarni, zhenwei pi)
- fix and cleanup nvmet Identify handling (Damien Le Moal,
Christoph Hellwig)
- fix double blk_mq_complete_request race in the timeout handler
(Lei Yin)
- fix irq locking in nvme-fcloop (Ming Lei)
- remove queue mapping helper for rdma devices (Sagi Grimberg)
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Merge tag 'nvme-6.4-2023-04-14' of git://git.infradead.org/nvme into for-6.4/block
Pull NVMe updates from Christoph:
"nvme updates for Linux 6.4
- drop redundant pci_enable_pcie_error_reporting (Bjorn Helgaas)
- validate nvmet module parameters (Chaitanya Kulkarni)
- fence TCP socket on receive error (Chris Leech)
- fix async event trace event (Keith Busch)
- minor cleanups (Chaitanya Kulkarni, zhenwei pi)
- fix and cleanup nvmet Identify handling (Damien Le Moal,
Christoph Hellwig)
- fix double blk_mq_complete_request race in the timeout handler
(Lei Yin)
- fix irq locking in nvme-fcloop (Ming Lei)
- remove queue mapping helper for rdma devices (Sagi Grimberg)"
* tag 'nvme-6.4-2023-04-14' of git://git.infradead.org/nvme:
nvme-fcloop: fix "inconsistent {IN-HARDIRQ-W} -> {HARDIRQ-ON-W} usage"
blk-mq-rdma: remove queue mapping helper for rdma devices
nvme-rdma: minor cleanup in nvme_rdma_create_cq()
nvme: fix double blk_mq_complete_request for timeout request with low probability
nvme: fix async event trace event
nvme-apple: return directly instead of else
nvme-apple: return directly instead of else
nvmet-tcp: validate idle poll modparam value
nvmet-tcp: validate so_priority modparam value
nvme-tcp: fence TCP socket on receive error
nvmet: remove nvmet_req_cns_error_complete
nvmet: rename nvmet_execute_identify_cns_cs_ns
nvmet: fix Identify Identification Descriptor List handling
nvmet: cleanup nvmet_execute_identify()
nvmet: fix I/O Command Set specific Identify Controller
nvmet: fix Identify Active Namespace ID list handling
nvmet: fix Identify Controller handling
nvmet: fix Identify Namespace handling
nvmet: fix error handling in nvmet_execute_identify_cns_cs_ns()
nvme-pci: drop redundant pci_enable_pcie_error_reporting()
|
||
Marek Vasut
|
cc4cffc3c1 |
wifi: brcmfmac: add Cypress 43439 SDIO ids
Add SDIO ids for use with the muRata 1YN (Cypress CYW43439). The odd thing about this is that the previous 1YN populated on M.2 card for evaluation purposes had BRCM SDIO vendor ID, while the chip populated on real hardware has a Cypress one. The device ID also differs between the two devices. But they are both 43439 otherwise, so add the IDs for both. On-device 1YN (43439), the new one, chip label reads "1YN": ``` /sys/.../mmc_host/mmc2/mmc2:0001 # cat vendor device 0x04b4 0xbd3d ``` EA M.2 evaluation board 1YN (43439), the old one, chip label reads "1YN ES1.4": ``` /sys/.../mmc_host/mmc0/mmc0:0001/# cat vendor device 0x02d0 0xa9a6 ``` Reviewed-by: Hans de Goede <hdegoede@redhat.com> Cc: stable@vger.kernel.org Signed-off-by: Marek Vasut <marex@denx.de> Reviewed-by: Simon Horman <simon.horman@corigine.com> Signed-off-by: Kalle Valo <kvalo@kernel.org> Link: https://lore.kernel.org/r/20230407203752.128539-1-marex@denx.de |
||
Joerg Roedel
|
e51b419839 | Merge branches 'iommu/fixes', 'arm/allwinner', 'arm/exynos', 'arm/mediatek', 'arm/omap', 'arm/renesas', 'arm/rockchip', 'arm/smmu', 'ppc/pamu', 'unisoc', 'x86/vt-d', 'x86/amd', 'core' and 'platform-remove_new' into next | ||
Jason Gunthorpe
|
f7f9c054a2 |
iommu: Remove iommu_group_get_by_id()
This is never called. Signed-off-by: Jason Gunthorpe <jgg@nvidia.com> Reviewed-by: Robin Murphy <robin.murphy@arm.com> Link: https://lore.kernel.org/r/0-v1-60bbc66d7e92+24-rm_iommu_get_by_id_jgg@nvidia.com Signed-off-by: Joerg Roedel <jroedel@suse.de> |
||
|
Jason Gunthorpe
|
e223864f82 |
iommu: Make iommu_release_device() static
This is not called outside the core code, and indeed cannot be called correctly outside the bus notifier. Make it static. Signed-off-by: Jason Gunthorpe <jgg@nvidia.com> Reviewed-by: Robin Murphy <robin.murphy@arm.com> Link: https://lore.kernel.org/r/0-v1-c3da18124d2d+56-rm_iommu_release_jgg@nvidia.com Signed-off-by: Joerg Roedel <jroedel@suse.de> |
||
Mario Limonciello
|
a19c61b065 |
crypto: ccp - Return doorbell status code as an argument
If the doorbell failed to ring we return -EIO, but the caller can't determine why it failed. Pass the reason for the failure in an argument for caller to investigate. Suggested-by: Mark Hasemeyer <markhas@chromium.org> Signed-off-by: Mario Limonciello <mario.limonciello@amd.com> Reviewed-by: Mark Hasemeyer <markhas@chromium.org> Tested-by: Mark Hasemeyer <markhas@chromium.org> Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> |
||
Herbert Xu
|
01f727cdc4 |
crypto: api - Move low-level functions into algapi.h
A number of low-level functions were exposed in crypto.h. Move them into algapi.h (and internal.h). Signed-off-by: Herbert Xu <herbert@gondor.apana.org.au> |
||
Pierre Gondois
|
ef9f643a9f |
cacheinfo: Add use_arch[|_cache]_info field/function
The cache information can be extracted from either a Device Tree (DT), the PPTT ACPI table, or arch registers (clidr_el1 for arm64). The clidr_el1 register is used only if DT/ACPI information is not available. It does not states how caches are shared among CPUs. Add a use_arch_cache_info field/function to identify when the DT/ACPI doesn't provide cache information. Use this information to assume L1 caches are privates and L2 and higher are shared among all CPUs. Signed-off-by: Pierre Gondois <pierre.gondois@arm.com> Link: https://lore.kernel.org/r/20230414081453.244787-5-pierre.gondois@arm.com Signed-off-by: Sudeep Holla <sudeep.holla@arm.com> |
||
Haiyang Zhang
|
80f6215b45 |
net: mana: Add support for jumbo frame
During probe, get the hardware-allowed max MTU by querying the device configuration. Users can select MTU up to the device limit. When XDP is in use, limit MTU settings so the buffer size is within one page. And, when MTU is set to a too large value, XDP is not allowed to run. Also, to prevent changing MTU fails, and leaves the NIC in a bad state, pre-allocate all buffers before starting the change. So in low memory condition, it will return error, without affecting the NIC. Signed-off-by: Haiyang Zhang <haiyangz@microsoft.com> Reviewed-by: Jesse Brandeburg <jesse.brandeburg@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net> |
||
|
Haiyang Zhang
|
2fbbd712ba |
net: mana: Enable RX path to handle various MTU sizes
Update RX data path to allocate and use RX queue DMA buffers with proper size based on potentially various MTU sizes. Signed-off-by: Haiyang Zhang <haiyangz@microsoft.com> Reviewed-by: Jesse Brandeburg <jesse.brandeburg@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net> |
||
|
Haiyang Zhang
|
a2917b2349 |
net: mana: Refactor RX buffer allocation code to prepare for various MTU
Move out common buffer allocation code from mana_process_rx_cqe() and mana_alloc_rx_wqe() to helper functions. Refactor related variables so they can be changed in one place, and buffer sizes are in sync. Signed-off-by: Haiyang Zhang <haiyangz@microsoft.com> Reviewed-by: Jesse Brandeburg <jesse.brandeburg@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net> |
||
|
Jakub Kicinski
|
e473ea818b |
mlx5-updates-2023-04-11
1) Vlad adds the support for linux bridge multicast offload support
Patches #1 through #9
Synopsis
Vlad Says:
==============
Implement support of bridge multicast offload in mlx5. Handle port object
attribute SWITCHDEV_ATTR_ID_BRIDGE_MC_DISABLED notification to toggle multicast
offload and bridge snooping support on bridge. Handle port object
SWITCHDEV_OBJ_ID_PORT_MDB notification to attach a bridge port to MDB.
Steering architecture
Existing offload infrastructure relies on two levels of flow tables - bridge
ingress and egress. For multicast offload the architecture is extended with
additional layer of per-port multicast replication tables. Such tables filter
loopback traffic (so packets are not replicated to their source port) and pop
VLAN headers for "untagged" VLANs. The tables are referenced by the MDB rules in
egress table. MDB egress rule can point to multiple per-port multicast tables,
which causes matching multicast traffic to be replicated to all of them, and,
consecutively, to several bridge ports:
+--------+--+
+---------------------------------------> Port 1 | |
| +-^------+--+
| |
| |
+-----------------------------------------+ | +---------------------------+ |
| EGRESS table | | +--> PORT 1 multicast table | |
+----------------------------------+ +-----------------------------------------+ | | +---------------------------+ |
| INGRESS table | | | | | | | |
+----------------------------------+ | dst_mac=P1,vlan=X -> pop vlan, goto P1 +--+ | | FG0: | |
| | | dst_mac=P1,vlan=Y -> pop vlan, goto P1 | | | src_port=dst_port -> drop | |
| src_mac=M1,vlan=X -> goto egress +---> dst_mac=P2,vlan=X -> pop vlan, goto P2 +--+ | | FG1: | |
| ... | | dst_mac=P2,vlan=Y -> goto P2 | | | | VLAN X -> pop, goto port | |
| | | dst_mac=MDB1,vlan=Y -> goto mcast P1,P2 +-----+ | ... | |
+----------------------------------+ | | | | | VLAN Y -> pop, goto port +-------+
+-----------------------------------------+ | | | FG3: |
| | | matchall -> goto port |
| | | |
| | +---------------------------+
| |
| |
| | +--------+--+
+---------------------------------------> Port 2 | |
| +-^------+--+
| |
| |
| +---------------------------+ |
+--> PORT 2 multicast table | |
+---------------------------+ |
| | |
| FG0: | |
| src_port=dst_port -> drop | |
| FG1: | |
| VLAN X -> pop, goto port | |
| ... | |
| | |
| FG3: | |
| matchall -> goto port +-------+
| |
+---------------------------+
Patches overview:
- Patch 1 adds hardware definition bits for capabilities required to replicate
multicast packets to multiple per-port tables. These bits are used by
following patches to only attempt multicast offload if firmware and hardware
provide necessary support.
- Pathces 2-4 patches are preparations and refactoring.
- Patch 5 implements necessary infrastructure to toggle multicast offload
via SWITCHDEV_ATTR_ID_BRIDGE_MC_DISABLED port object attribute notification.
This also enabled IGMP and MLD snooping.
- Patch 6 implements per-port multicast replication tables. It only supports
filtering of loopback packets.
- Patch 7 extends per-port multicast tables with VLAN pop support for 'untagged'
VLANs.
- Patch 8 handles SWITCHDEV_OBJ_ID_PORT_MDB port object notifications. It
creates MDB replication rules in egress table that can replicate packets to
multiple per-port multicast tables.
- Patch 9 adds tracepoints for MDB events.
==============
2) Parav Create a new allocation profile for SFs, to save on memory
3) Yevgeny provides some initial patches for upcoming software steering
support new pattern/arguments type of modify_header actions.
Starting with ConnectX-6 DX, we use a new design of modify_header FW object.
The current modify_header object allows for having only limited number of
these FW objects, which means that we are limited in the number of offloaded
flows that require modify_header action.
As a preparation Yevgeny provides the following 4 patches:
- Patch 1: Add required mlx5_ifc HW bits
- Patch 2, 3: Add new WQE type and opcode that is required for pattern/arg
support and adds appropriate support in dr_send.c
- Patch 4: Add ICM pool for modify-header-pattern objects and implement
patterns cache, allowing patterns reuse for different flows
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Merge tag 'mlx5-updates-2023-04-11' of git://git.kernel.org/pub/scm/linux/kernel/git/saeed/linux
Saeed Mahameed says:
====================
mlx5-updates-2023-04-11
1) Vlad adds the support for linux bridge multicast offload support
Patches #1 through #9
Synopsis
Vlad Says:
==============
Implement support of bridge multicast offload in mlx5. Handle port object
attribute SWITCHDEV_ATTR_ID_BRIDGE_MC_DISABLED notification to toggle multicast
offload and bridge snooping support on bridge. Handle port object
SWITCHDEV_OBJ_ID_PORT_MDB notification to attach a bridge port to MDB.
Steering architecture
Existing offload infrastructure relies on two levels of flow tables - bridge
ingress and egress. For multicast offload the architecture is extended with
additional layer of per-port multicast replication tables. Such tables filter
loopback traffic (so packets are not replicated to their source port) and pop
VLAN headers for "untagged" VLANs. The tables are referenced by the MDB rules in
egress table. MDB egress rule can point to multiple per-port multicast tables,
which causes matching multicast traffic to be replicated to all of them, and,
consecutively, to several bridge ports:
+--------+--+
+---------------------------------------> Port 1 | |
| +-^------+--+
| |
| |
+-----------------------------------------+ | +---------------------------+ |
| EGRESS table | | +--> PORT 1 multicast table | |
+----------------------------------+ +-----------------------------------------+ | | +---------------------------+ |
| INGRESS table | | | | | | | |
+----------------------------------+ | dst_mac=P1,vlan=X -> pop vlan, goto P1 +--+ | | FG0: | |
| | | dst_mac=P1,vlan=Y -> pop vlan, goto P1 | | | src_port=dst_port -> drop | |
| src_mac=M1,vlan=X -> goto egress +---> dst_mac=P2,vlan=X -> pop vlan, goto P2 +--+ | | FG1: | |
| ... | | dst_mac=P2,vlan=Y -> goto P2 | | | | VLAN X -> pop, goto port | |
| | | dst_mac=MDB1,vlan=Y -> goto mcast P1,P2 +-----+ | ... | |
+----------------------------------+ | | | | | VLAN Y -> pop, goto port +-------+
+-----------------------------------------+ | | | FG3: |
| | | matchall -> goto port |
| | | |
| | +---------------------------+
| |
| |
| | +--------+--+
+---------------------------------------> Port 2 | |
| +-^------+--+
| |
| |
| +---------------------------+ |
+--> PORT 2 multicast table | |
+---------------------------+ |
| | |
| FG0: | |
| src_port=dst_port -> drop | |
| FG1: | |
| VLAN X -> pop, goto port | |
| ... | |
| | |
| FG3: | |
| matchall -> goto port +-------+
| |
+---------------------------+
Patches overview:
- Patch 1 adds hardware definition bits for capabilities required to replicate
multicast packets to multiple per-port tables. These bits are used by
following patches to only attempt multicast offload if firmware and hardware
provide necessary support.
- Pathces 2-4 patches are preparations and refactoring.
- Patch 5 implements necessary infrastructure to toggle multicast offload
via SWITCHDEV_ATTR_ID_BRIDGE_MC_DISABLED port object attribute notification.
This also enabled IGMP and MLD snooping.
- Patch 6 implements per-port multicast replication tables. It only supports
filtering of loopback packets.
- Patch 7 extends per-port multicast tables with VLAN pop support for 'untagged'
VLANs.
- Patch 8 handles SWITCHDEV_OBJ_ID_PORT_MDB port object notifications. It
creates MDB replication rules in egress table that can replicate packets to
multiple per-port multicast tables.
- Patch 9 adds tracepoints for MDB events.
==============
2) Parav Create a new allocation profile for SFs, to save on memory
3) Yevgeny provides some initial patches for upcoming software steering
support new pattern/arguments type of modify_header actions.
Starting with ConnectX-6 DX, we use a new design of modify_header FW object.
The current modify_header object allows for having only limited number of
these FW objects, which means that we are limited in the number of offloaded
flows that require modify_header action.
As a preparation Yevgeny provides the following 4 patches:
- Patch 1: Add required mlx5_ifc HW bits
- Patch 2, 3: Add new WQE type and opcode that is required for pattern/arg
support and adds appropriate support in dr_send.c
- Patch 4: Add ICM pool for modify-header-pattern objects and implement
patterns cache, allowing patterns reuse for different flows
* tag 'mlx5-updates-2023-04-11' of git://git.kernel.org/pub/scm/linux/kernel/git/saeed/linux:
net/mlx5: DR, Add modify-header-pattern ICM pool
net/mlx5: DR, Prepare sending new WQE type
net/mlx5: Add new WQE for updating flow table
net/mlx5: Add mlx5_ifc bits for modify header argument
net/mlx5: DR, Set counter ID on the last STE for STEv1 TX
net/mlx5: Create a new profile for SFs
net/mlx5: Bridge, add tracepoints for multicast
net/mlx5: Bridge, implement mdb offload
net/mlx5: Bridge, support multicast VLAN pop
net/mlx5: Bridge, add per-port multicast replication tables
net/mlx5: Bridge, snoop igmp/mld packets
net/mlx5: Bridge, extract code to lookup parent bridge of port
net/mlx5: Bridge, move additional data structures to priv header
net/mlx5: Bridge, increase bridge tables sizes
net/mlx5: Add mlx5_ifc definitions for bridge multicast support
====================
Link: https://lore.kernel.org/r/20230412040752.14220-1-saeed@kernel.org
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
|
||
Vladimir Oltean
|
a721c3e54b |
net/sched: taprio: allow per-TC user input of FP adminStatus
This is a duplication of the FP adminStatus logic introduced for tc-mqprio. Offloading is done through the tc_mqprio_qopt_offload structure embedded within tc_taprio_qopt_offload. So practically, if a device driver is written to treat the mqprio portion of taprio just like standalone mqprio, it gets unified handling of frame preemption. I would have reused more code with taprio, but this is mostly netlink attribute parsing, which is hard to transform into generic code without having something that stinks as a result. We have the same variables with the same semantics, just different nlattr type values (TCA_MQPRIO_TC_ENTRY=5 vs TCA_TAPRIO_ATTR_TC_ENTRY=12; TCA_MQPRIO_TC_ENTRY_FP=2 vs TCA_TAPRIO_TC_ENTRY_FP=3, etc) and consequently, different policies for the nest. Every time nla_parse_nested() is called, an on-stack table "tb" of nlattr pointers is allocated statically, up to the maximum understood nlattr type. That array size is hardcoded as a constant, but when transforming this into a common parsing function, it would become either a VLA (which the Linux kernel rightfully doesn't like) or a call to the allocator. Having FP adminStatus in tc-taprio can be seen as addressing the 802.1Q Annex S.3 "Scheduling and preemption used in combination, no HOLD/RELEASE" and S.4 "Scheduling and preemption used in combination with HOLD/RELEASE" use cases. HOLD and RELEASE events are emitted towards the underlying MAC Merge layer when the schedule hits a Set-And-Hold-MAC or a Set-And-Release-MAC gate operation. So within the tc-taprio UAPI space, one can distinguish between the 2 use cases by choosing whether to use the TC_TAPRIO_CMD_SET_AND_HOLD and TC_TAPRIO_CMD_SET_AND_RELEASE gate operations within the schedule, or just TC_TAPRIO_CMD_SET_GATES. A small part of the change is dedicated to refactoring the max_sdu nlattr parsing to put all logic under the "if" that tests for presence of that nlattr. Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Reviewed-by: Ferenc Fejes <fejes@inf.elte.hu> Reviewed-by: Simon Horman <simon.horman@corigine.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org> |
||
|
Vladimir Oltean
|
f62af20bed |
net/sched: mqprio: allow per-TC user input of FP adminStatus
IEEE 802.1Q-2018 clause 6.7.2 Frame preemption specifies that each packet priority can be assigned to a "frame preemption status" value of either "express" or "preemptible". Express priorities are transmitted by the local device through the eMAC, and preemptible priorities through the pMAC (the concepts of eMAC and pMAC come from the 802.3 MAC Merge layer). The FP adminStatus is defined per packet priority, but 802.1Q clause 12.30.1.1.1 framePreemptionAdminStatus also says that: | Priorities that all map to the same traffic class should be | constrained to use the same value of preemption status. It is impossible to ignore the cognitive dissonance in the standard here, because it practically means that the FP adminStatus only takes distinct values per traffic class, even though it is defined per priority. I can see no valid use case which is prevented by having the kernel take the FP adminStatus as input per traffic class (what we do here). In addition, this also enforces the above constraint by construction. User space network managers which wish to expose FP adminStatus per priority are free to do so; they must only observe the prio_tc_map of the netdev (which presumably is also under their control, when constructing the mqprio netlink attributes). The reason for configuring frame preemption as a property of the Qdisc layer is that the information about "preemptible TCs" is closest to the place which handles the num_tc and prio_tc_map of the netdev. If the UAPI would have been any other layer, it would be unclear what to do with the FP information when num_tc collapses to 0. A key assumption is that only mqprio/taprio change the num_tc and prio_tc_map of the netdev. Not sure if that's a great assumption to make. Having FP in tc-mqprio can be seen as an implementation of the use case defined in 802.1Q Annex S.2 "Preemption used in isolation". There will be a separate implementation of FP in tc-taprio, for the other use cases. Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Reviewed-by: Ferenc Fejes <fejes@inf.elte.hu> Reviewed-by: Simon Horman <simon.horman@corigine.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org> |
||
|
Vladimir Oltean
|
c54876cd59 |
net/sched: pass netlink extack to mqprio and taprio offload
With the multiplexed ndo_setup_tc() model which lacks a first-class struct netlink_ext_ack * argument, the only way to pass the netlink extended ACK message down to the device driver is to embed it within the offload structure. Do this for struct tc_mqprio_qopt_offload and struct tc_taprio_qopt_offload. Since struct tc_taprio_qopt_offload also contains a tc_mqprio_qopt_offload structure, and since device drivers might effectively reuse their mqprio implementation for the mqprio portion of taprio, we make taprio set the extack in both offload structures to point at the same netlink extack message. In fact, the taprio handling is a bit more tricky, for 2 reasons. First is because the offload structure has a longer lifetime than the extack structure. The driver is supposed to populate the extack synchronously from ndo_setup_tc() and leave it alone afterwards. To not have any use-after-free surprises, we zero out the extack pointer when we leave taprio_enable_offload(). The second reason is because taprio does overwrite the extack message on ndo_setup_tc() error. We need to switch to the weak form of setting an extack message, which preserves a potential message set by the driver. Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Reviewed-by: Simon Horman <simon.horman@corigine.com> Acked-by: Jamal Hadi Salim <jhs@mojatatu.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org> |
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Vladimir Oltean
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d54151aa0f |
net: ethtool: create and export ethtool_dev_mm_supported()
Create a wrapper over __ethtool_dev_mm_supported() which also calls ethnl_ops_begin() and ethnl_ops_complete(). It can be used by other code layers, such as tc, to make sure that preemptible TCs are supported (this is true if an underlying MAC Merge layer exists). Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Reviewed-by: Ferenc Fejes <fejes@inf.elte.hu> Reviewed-by: Simon Horman <simon.horman@corigine.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org> |
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Vladimir Oltean
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9ecd05794b |
net: mscc: ocelot: strengthen type of "u32 reg" in I/O accessors
The "u32 reg" argument that is passed to these functions is not a plain address, but rather a driver-specific encoding of another enum ocelot_target target in the upper bits, and an index into the u32 ocelot->map[target][] array in the lower bits. That encoded value takes the type "enum ocelot_reg" and is what is passed to these I/O functions, so let's actually use that to prevent type confusion. Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com> Reviewed-by: Jacob Keller <jacob.e.keller@intel.com> Signed-off-by: Jakub Kicinski <kuba@kernel.org> |
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Ilya Leoshkevich
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1cf3bfc60f |
bpf: Support 64-bit pointers to kfuncs
test_ksyms_module fails to emit a kfunc call targeting a module on s390x, because the verifier stores the difference between kfunc address and __bpf_call_base in bpf_insn.imm, which is s32, and modules are roughly (1 << 42) bytes away from the kernel on s390x. Fix by keeping BTF id in bpf_insn.imm for BPF_PSEUDO_KFUNC_CALLs, and storing the absolute address in bpf_kfunc_desc. Introduce bpf_jit_supports_far_kfunc_call() in order to limit this new behavior to the s390x JIT. Otherwise other JITs need to be modified, which is not desired. Introduce bpf_get_kfunc_addr() instead of exposing both find_kfunc_desc() and struct bpf_kfunc_desc. In addition to sorting kfuncs by imm, also sort them by offset, in order to handle conflicting imms from different modules. Do this on all architectures in order to simplify code. Factor out resolving specialized kfuncs (XPD and dynptr) from fixup_kfunc_call(). This was required in the first place, because fixup_kfunc_call() uses find_kfunc_desc(), which returns a const pointer, so it's not possible to modify kfunc addr without stripping const, which is not nice. It also removes repetition of code like: if (bpf_jit_supports_far_kfunc_call()) desc->addr = func; else insn->imm = BPF_CALL_IMM(func); and separates kfunc_desc_tab fixups from kfunc_call fixups. Suggested-by: Jiri Olsa <olsajiri@gmail.com> Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com> Acked-by: Jiri Olsa <jolsa@kernel.org> Link: https://lore.kernel.org/r/20230412230632.885985-1-iii@linux.ibm.com Signed-off-by: Alexei Starovoitov <ast@kernel.org> |
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Bartosz Golaszewski
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daa9e76d17 |
dt-bindings: clock: qcom: describe the GPUCC clock for SA8775P
Add the compatible for the Qualcomm Graphics Clock control module present on sa8775p platforms. It matches the generic QCom GPUCC description. Add device-specific DT bindings defines as well. Signed-off-by: Bartosz Golaszewski <bartosz.golaszewski@linaro.org> Reviewed-by: Krzysztof Kozlowski <krzysztof.kozlowski@linaro.org> Acked-by: Stephen Boyd <sboyd@kernel.org> Signed-off-by: Bjorn Andersson <andersson@kernel.org> Link: https://lore.kernel.org/r/20230411125910.401075-2-brgl@bgdev.pl |
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Tiezhu Yang
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0a3bf86092 |
module: Ignore L0 and rename is_arm_mapping_symbol()
The L0 symbol is generated when build module on LoongArch, ignore it in
modpost and when looking at module symbols, otherwise we can not see the
expected call trace.
Now is_arm_mapping_symbol() is not only for ARM, in order to reflect the
reality, rename is_arm_mapping_symbol() to is_mapping_symbol().
This is related with commit
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Tiezhu Yang
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987d2e0aaa |
module: Move is_arm_mapping_symbol() to module_symbol.h
In order to avoid duplicated code, move is_arm_mapping_symbol() to include/linux/module_symbol.h, then remove is_arm_mapping_symbol() in the other places. Signed-off-by: Tiezhu Yang <yangtiezhu@loongson.cn> Signed-off-by: Luis Chamberlain <mcgrof@kernel.org> |
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Jakub Kicinski
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c2865b1122 |
bpf-next-for-netdev
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Daniel Borkmann says:
====================
pull-request: bpf-next 2023-04-13
We've added 260 non-merge commits during the last 36 day(s) which contain
a total of 356 files changed, 21786 insertions(+), 11275 deletions(-).
The main changes are:
1) Rework BPF verifier log behavior and implement it as a rotating log
by default with the option to retain old-style fixed log behavior,
from Andrii Nakryiko.
2) Adds support for using {FOU,GUE} encap with an ipip device operating
in collect_md mode and add a set of BPF kfuncs for controlling encap
params, from Christian Ehrig.
3) Allow BPF programs to detect at load time whether a particular kfunc
exists or not, and also add support for this in light skeleton,
from Alexei Starovoitov.
4) Optimize hashmap lookups when key size is multiple of 4,
from Anton Protopopov.
5) Enable RCU semantics for task BPF kptrs and allow referenced kptr
tasks to be stored in BPF maps, from David Vernet.
6) Add support for stashing local BPF kptr into a map value via
bpf_kptr_xchg(). This is useful e.g. for rbtree node creation
for new cgroups, from Dave Marchevsky.
7) Fix BTF handling of is_int_ptr to skip modifiers to work around
tracing issues where a program cannot be attached, from Feng Zhou.
8) Migrate a big portion of test_verifier unit tests over to
test_progs -a verifier_* via inline asm to ease {read,debug}ability,
from Eduard Zingerman.
9) Several updates to the instruction-set.rst documentation
which is subject to future IETF standardization
(https://lwn.net/Articles/926882/), from Dave Thaler.
10) Fix BPF verifier in the __reg_bound_offset's 64->32 tnum sub-register
known bits information propagation, from Daniel Borkmann.
11) Add skb bitfield compaction work related to BPF with the overall goal
to make more of the sk_buff bits optional, from Jakub Kicinski.
12) BPF selftest cleanups for build id extraction which stand on its own
from the upcoming integration work of build id into struct file object,
from Jiri Olsa.
13) Add fixes and optimizations for xsk descriptor validation and several
selftest improvements for xsk sockets, from Kal Conley.
14) Add BPF links for struct_ops and enable switching implementations
of BPF TCP cong-ctls under a given name by replacing backing
struct_ops map, from Kui-Feng Lee.
15) Remove a misleading BPF verifier env->bypass_spec_v1 check on variable
offset stack read as earlier Spectre checks cover this,
from Luis Gerhorst.
16) Fix issues in copy_from_user_nofault() for BPF and other tracers
to resemble copy_from_user_nmi() from safety PoV, from Florian Lehner
and Alexei Starovoitov.
17) Add --json-summary option to test_progs in order for CI tooling to
ease parsing of test results, from Manu Bretelle.
18) Batch of improvements and refactoring to prep for upcoming
bpf_local_storage conversion to bpf_mem_cache_{alloc,free} allocator,
from Martin KaFai Lau.
19) Improve bpftool's visual program dump which produces the control
flow graph in a DOT format by adding C source inline annotations,
from Quentin Monnet.
20) Fix attaching fentry/fexit/fmod_ret/lsm to modules by extracting
the module name from BTF of the target and searching kallsyms of
the correct module, from Viktor Malik.
21) Improve BPF verifier handling of '<const> <cond> <non_const>'
to better detect whether in particular jmp32 branches are taken,
from Yonghong Song.
22) Allow BPF TCP cong-ctls to write app_limited of struct tcp_sock.
A built-in cc or one from a kernel module is already able to write
to app_limited, from Yixin Shen.
Conflicts:
Documentation/bpf/bpf_devel_QA.rst
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Jakub Kicinski
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800e68c44f |
Merge git://git.kernel.org/pub/scm/linux/kernel/git/netdev/net
Conflicts: tools/testing/selftests/net/config |
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Rob Herring
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ff61bacd77 |
of/address: Add of_property_read_reg() helper
Add a helper, of_property_read_reg(), to read "reg" entries untranslated address and size. This function is intended mainly for cases with an untranslatable "reg" address (i.e. not MMIO). There's also a few translatable cases such as address cells containing a bus chip-select number. Link: https://lore.kernel.org/r/20230328-dt-address-helpers-v1-5-e2456c3e77ab@kernel.org Signed-off-by: Rob Herring <robh@kernel.org> |
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Rob Herring
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b50c788a56 |
of/address: Add of_range_count() helper
Some users need a count of the number of ranges entries before iterating over the entries. Typically this is for allocating some data structure based on the size. Add a helper, of_range_count(), to get the count. The helper must be called with an struct of_range_parser initialized by of_range_parser_init(). Link: https://lore.kernel.org/r/20230328-dt-address-helpers-v1-4-e2456c3e77ab@kernel.org Signed-off-by: Rob Herring <robh@kernel.org> |
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Rob Herring
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c75a794918 |
of/address: Add of_range_to_resource() helper
A few users need to convert a specific "ranges" entry into a struct resource. Add a helper to similar to of_address_to_resource(). The existing of_pci_range_to_resource() helper isn't really PCI specific, so it can be used with the CONFIG_PCI check dropped. Link: https://lore.kernel.org/r/20230328-dt-address-helpers-v1-2-e2456c3e77ab@kernel.org Signed-off-by: Rob Herring <robh@kernel.org> |