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0b4ff5bc7d
- Add A523's missing PPU0 reset (both DT binding and driver) The binding change is shared with the soc tree. - Fix V3s DE clock mux field width - Stop passing rate change requests to parent for V3s DE clock - Force and lock V3s DE and TCON clocks to the same parent, the video PLL -----BEGIN PGP SIGNATURE----- iQJCBAABCgAsFiEE2nN1m/hhnkhOWjtHOJpUIZwPJDAFAmh2iB0OHHdlbnNAY3Np ZS5vcmcACgkQOJpUIZwPJDDBmRAAlrVWEr5ScgGtN6ERpGv9gAKAfNdxzRDLOm/8 M22jt7tubI2gbfEOi6VnoQWg0LOBclfFqcnWim5k75F2yyyU53EPjQHKumSXFzij QNA3582AT+gBNGHy7hpOw1fQaK9RSG18iLaSLZ1tEYuBZcf8jv6bY2CjXei7CH8a iYeQj8yC42bUTARNiAveHPH5+Kvx0CaXFS5uOizILWhvC9j6ZGEK65l+hgyp9E8I BjtNHOj5/46VFopGk6LK93q38qQnN47nP0i8gQEx2KoHrwXUUE5lRNUwSnSG7MgF wTRRkj83XdgH/I3Hh/T0K2eY8GHc6ZnuxL7zRdPfjNhh2X8tZ6zVVJzZ/BIaG7jV XfmQyh4G6U6EVDYARcWszHx3WaG9AQCTvXqZmCelOd6LHvgC3+m3HWERfMwWsSAw MIENrWyPrA8KYPbU5qo36Fa+Uxe01iYQQRirp00NxEjQKg+dLrgbZ7SvxtNMfRjU /43fVWIU0/XklZV8CgajoTRMzLFLkFqFCvLPdgHz1Z6LeUD7g5Iv6E8zON6srehA UInCGdmzC5gYN6h0I/bxsKGe7LR2Ztb5GPT2bOJYre/v+oe37Zv2bdLPKmWjaIFP AB6IEkW4RD3lVxlAkhWa4g3+GRCbiYm67aIysWT3HKIAfYSscPe8tWlKDnqwBMP9 7EJeX68= =3XI7 -----END PGP SIGNATURE----- gpgsig -----BEGIN PGP SIGNATURE----- iQJIBAABCAAyFiEE9L57QeeUxqYDyoaDrQKIl8bklSUFAmh+eH0UHHN3Ym95ZEBj aHJvbWl1bS5vcmcACgkQrQKIl8bklSWJaQ/9HEK1pduNgGwlZPT19BbCvdumG1dr FEa/AQjsX3HGcqGEnMPpD7sHfBIb4LawTEiQ3Uxvz1LoUthNMhoK63A95gMPGg4e tKe9Cc3b+ihgZKessp0kQdD8vC9ozO5gv0lHYXTk+fsnyh/hjmlNm30YoNsWvNrc PssLKqbnzlP7PxFiEfIIGa1wCGCZmPKIluHvZdL3Y0H5H5bWHt+osjIEB2Fj+XJl pGXWJcCWSM+Df4mcn1fY9sMhsRBup1lu7VLUMN+M2vSUHnKlzYwAQifEne6kKs9w 9I3t460UkT+J6UClJ7d3v4IE68QAbvQkG0gxnODRzZpp3P/6KCWEf+2FM/gvAULG U7wJIoLw+dhtP/k+LQIe7jg1mxLDpyZqoFbkkzZSyyOUk5E5wdFnlIUERWyIGCfF GTftKal6/uyu5p7YwvLLjLBgowJtQv63Tkg5b3m0hbEmo9tBkN+8NwWkHi4/V3wg o93qFVNBU+NY1ifa5q/pjofafEYNouReUbe1AieyzFDKoEtkbVuKSvztaDN9WCH8 jszSwIqTlLRRRN0xIN36FbuZ4LusYFc1GOz44A48oMkJUtmfSoj9FMR6BkkVhi1c 8A34VWjkdfnC14zDari6ZdyemvcPb6kq4XXGazAEHZh+xeH2P91aNYgGYUffY+am YMkmXtHRPMXv978= =LPCt -----END PGP SIGNATURE----- Merge tag 'sunxi-clk-for-6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux into clk-allwinner Pull Allwinner clk driver updates from Chen-Yu Tsai: - Add Allwinner A523's missing PPU0 reset (both DT binding and driver) The binding change is shared with the soc tree. - Fix Allwinner V3s DE clock mux field width - Stop passing rate change requests to parent for Allwinner V3s DE clock - Force and lock Allwinner V3s DE and TCON clocks to the same parent, the video PLL * tag 'sunxi-clk-for-6.17' of https://git.kernel.org/pub/scm/linux/kernel/git/sunxi/linux: clk: sunxi-ng: ccu_nm: convert from round_rate() to determine_rate() clk: sunxi-ng: ccu_nkmp: convert from round_rate() to determine_rate() clk: sunxi-ng: ccu_nk: convert from round_rate() to determine_rate() clk: sunxi-ng: ccu_gate: convert from round_rate() to determine_rate() clk: sunxi-ng: v3s: Assign the de and tcon clocks to the video pll clk: sunxi-ng: v3s: Fix de clock definition clk: sunxi-ng: sun55i-a523-r-ccu: Add missing PPU0 reset dt-bindings: reset: sun55i-a523-r-ccu: Add missing PPU0 reset |
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Linux kernel
============
There are several guides for kernel developers and users. These guides can
be rendered in a number of formats, like HTML and PDF. Please read
Documentation/admin-guide/README.rst first.
In order to build the documentation, use ``make htmldocs`` or
``make pdfdocs``. The formatted documentation can also be read online at:
https://www.kernel.org/doc/html/latest/
There are various text files in the Documentation/ subdirectory,
several of them using the reStructuredText markup notation.
Please read the Documentation/process/changes.rst file, as it contains the
requirements for building and running the kernel, and information about
the problems which may result by upgrading your kernel.