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linux/drivers/phy/tegra
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Wayne Chang 742ff37b51 phy: tegra: xusb: Explicitly configure HS_DISCON_LEVEL to 0x7 
commit b246caa680 upstream.

The USB2 Bias Pad Control register manages analog parameters for signal
detection. Previously, the HS_DISCON_LEVEL relied on hardware reset
values, which may lead to the detection failure.

Explicitly configure HS_DISCON_LEVEL to 0x7. This ensures the disconnect
threshold is sufficient to guarantee reliable detection.

Fixes: bbf711682c ("phy: tegra: xusb: Add Tegra186 support")
Cc: stable@vger.kernel.org
Signed-off-by: Wayne Chang <waynec@nvidia.com>
Link: https://patch.msgid.link/20251212032116.768307-1-waynec@nvidia.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
History 2026-02-06 16:41:48 +01:00
..
Kconfig phy: tegra: Select USB_COMMON for usb_get_maximum_speed() 2020-04-16 15:05:53 +02:00
Makefile phy: tegra: xusb: Add Tegra194 support 2020-03-19 13:59:46 +01:00
phy-tegra194-p2u.c phy: tegra: convert to devm_platform_ioremap_resource(_byname) 2020-11-16 12:47:48 +05:30
xusb-tegra124.c phy: tegra: Don't use device-managed API to allocate ports 2020-03-19 14:00:05 +01:00
xusb-tegra186.c phy: tegra: xusb: Explicitly configure HS_DISCON_LEVEL to 0x7 2026-02-06 16:41:48 +01:00
xusb-tegra210.c phy: tegra: xusb: fix device and OF node leak at probe 2025-10-02 13:39:04 +02:00
xusb.c phy: Fix error handling in tegra_xusb_port_init 2025-05-22 14:08:25 +02:00
xusb.h phy: tegra: xusb: Add sleepwalk and suspend/resume 2021-06-03 14:49:34 +02:00