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linux/drivers/gpu
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Imre Deak 53402e17b1 drm/i915/dsi: Use TRANS_DDI_FUNC_CTL's own port width macro 
commit 879f70382f upstream.

The format of the port width field in the DDI_BUF_CTL and the
TRANS_DDI_FUNC_CTL registers are different starting with MTL, where the
x3 lane mode for HDMI FRL has a different encoding in the two registers.
To account for this use the TRANS_DDI_FUNC_CTL's own port width macro.

Cc: <stable@vger.kernel.org> # v6.5+
Fixes: b66a8abaa4 ("drm/i915/display/mtl: Fill port width in DDI_BUF_/TRANS_DDI_FUNC_/PORT_BUF_CTL for HDMI")
Reviewed-by: Jani Nikula <jani.nikula@intel.com>
Signed-off-by: Imre Deak <imre.deak@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20250214142001.552916-2-imre.deak@intel.com
(cherry picked from commit 76120b3a30)
Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>
[Imre: Rebased on v6.6.y, due to upstream API changes for intel_de_read(),
 TRANS_DDI_FUNC_CTL()]
Signed-off-by: Imre Deak <imre.deak@intel.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
History 2025-03-13 12:58:39 +01:00
..
drm drm/i915/dsi: Use TRANS_DDI_FUNC_CTL's own port width macro 2025-03-13 12:58:39 +01:00
host1x gpu: host1x: Do not setup DMA for virtual devices 2024-05-17 12:02:15 +02:00
ipu-v3 drm for 6.6-rc1 2023-08-30 13:34:34 -07:00
trace gpu/trace: add a gpu total memory usage tracepoint 2020-03-03 17:52:41 -05:00
vga PCI/VGA: Move vgaarb to drivers/pci 2022-03-09 18:30:46 -06:00
Makefile gpu: host1x: Add context bus 2022-06-01 11:50:42 +02:00