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This cache controller is also used on the StarFive JH7110 SoC. It does not have the data-uncorrectable ECC quirk that JH7100 has, so only QUIRK_NONSTANDARD_CACHE_OPS is set. Signed-off-by: Dominique Belhachemi <domibel@debian.org> Signed-off-by: Conor Dooley <conor.dooley@microchip.com> |
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| .. | ||
| ax45mp_cache.c | ||
| hisi_soc_hha.c | ||
| Kconfig | ||
| Makefile | ||
| sifive_ccache.c | ||
| starfive_starlink_cache.c | ||