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6673c2763f
The LXW, LXH, LXHU opcodes are part of the MXU ASE found in Ingenic XBurst based SoCs. While technically part of the MXU ASE, they do not touch any of the SIMD registers, and can be used even when the MXU ASE is disabled. This patch makes it possible to emulate unaligned access for those instructions. Signed-off-by: Siarhei Volkau <lis8215@gmail.com> Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
1174 lines
29 KiB
1174 lines
29 KiB