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The DRA7xx family of SOCs have two IPUs and upto two DSP processor subsystems in general. The IPU processor subsystem contains dual-core ARM Cortex-M4 processors, while the DSP processor subsystem is based on the TI's standard TMS320C66x DSP CorePac core. The IPUs are very similar to those on OMAP5. Two IPUs and one DSP processor subsystems is the most common configuration. The processor device DT nodes have been added for these processor subsystems, with the internal memories added through 'reg' and 'reg-names' properties. The IPUs only have an L2 RAM, whereas the DSPs have L1P, L1D and L2 RAM memories. NOTE: 1. The nodes do not have any mailboxes, timers or CMA regions assigned, they should be added in the respective board dts files. 2. The nodes haven been disabled by default and the enabling of these nodes is also left to the respective board dts files. Signed-off-by: Suman Anna <s-anna@ti.com> [t-kristo@ti.com: convert to ti-sysc support from legacy hwmod] Signed-off-by: Tero Kristo <t-kristo@ti.com> Signed-off-by: Tony Lindgren <tony@atomide.com> |
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| README | ||
Linux kernel
============
There are several guides for kernel developers and users. These guides can
be rendered in a number of formats, like HTML and PDF. Please read
Documentation/admin-guide/README.rst first.
In order to build the documentation, use ``make htmldocs`` or
``make pdfdocs``. The formatted documentation can also be read online at:
https://www.kernel.org/doc/html/latest/
There are various text files in the Documentation/ subdirectory,
several of them using the Restructured Text markup notation.
Please read the Documentation/process/changes.rst file, as it contains the
requirements for building and running the kernel, and information about
the problems which may result by upgrading your kernel.