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97f8571e66
The pxa27x DMA controller defaults to 64-bit alignment. This caused the SCR reads to fail (and, depending on card type, error out) when card->raw_scr was not aligned on a 8-byte boundary. For performance reasons all scatter-gather addresses passed to pxamci_request should be aligned on 8-byte boundaries, but if this can't be guaranteed, byte aligned DMA transfers in the have to be enabled in the controller to get correct behaviour. Signed-off-by: Philipp Zabel <philipp.zabel@gmail.com> Signed-off-by: Pierre Ossman <drzeus@drzeus.cx> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org> |
History
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| .. | ||
| at91_mci.c | ||
| au1xmmc.c | ||
| au1xmmc.h | ||
| imxmmc.c | ||
| imxmmc.h | ||
| Kconfig | ||
| Makefile | ||
| mmc_spi.c | ||
| mmci.c | ||
| mmci.h | ||
| omap.c | ||
| pxamci.c | ||
| pxamci.h | ||
| ricoh_mmc.c | ||
| sdhci.c | ||
| sdhci.h | ||
| tifm_sd.c | ||
| wbsd.c | ||
| wbsd.h | ||