linux/drivers/net/dsa/b53
Jonas Gorski 2b3013ac03 net: dsa: b53: add support for bcm63xx ARL entry format
The ARL registers of BCM63XX embedded switches are somewhat unique. The
normal ARL table access registers have the same format as BCM5389, but
the ARL search registers differ:

* SRCH_CTL is at the same offset of BCM5389, but 16 bits wide. It does
  not have more fields, just needs to be accessed by a 16 bit read.
* SRCH_RSLT_MACVID and SRCH_RSLT are aligned to 32 bit, and have shifted
  offsets.
* SRCH_RSLT has a different format than the normal ARL data entry
  register.
* There is only one set of ENTRY_N registers, implying a 1 bin layout.

So add appropriate ops for bcm63xx and let it use it.

Signed-off-by: Jonas Gorski <jonas.gorski@gmail.com>
Reviewed-by: Florian Fainelli <florian.fainelli@broadcom.com>
Link: https://patch.msgid.link/20251107080749.26936-9-jonas.gorski@gmail.com
Signed-off-by: Jakub Kicinski <kuba@kernel.org>
History 2025-11-10 17:11:07 -08:00
..
b53_common.c net: dsa: b53: add support for bcm63xx ARL entry format 2025-11-10 17:11:07 -08:00
b53_mdio.c net: dsa: b53: mdio: add support for BCM53101 2025-02-19 18:41:43 -08:00
b53_mmap.c net: dsa: b53: mmap: Implement bcm63268 gphy power control 2025-08-14 17:53:58 -07:00
b53_priv.h net: dsa: b53: add support for bcm63xx ARL entry format 2025-11-10 17:11:07 -08:00
b53_regs.h net: dsa: b53: add support for bcm63xx ARL entry format 2025-11-10 17:11:07 -08:00
b53_serdes.c net: remove phylink_pcs .neg_mode boolean 2025-02-14 17:09:50 -08:00
b53_serdes.h net: dsa: use capital "OR" for multiple licenses in SPDX 2023-08-24 12:02:53 -07:00
b53_spi.c move asm/unaligned.h to linux/unaligned.h 2024-10-02 17:23:23 -04:00
b53_srab.c net: dsa: Switch back to struct platform_driver::remove() 2024-10-04 16:39:57 -07:00
Kconfig net: dsa: b53: support legacy FCS tags 2025-06-17 17:52:04 -07:00
Makefile net: dsa: b53: Add SerDes support 2018-09-06 07:48:34 -07:00