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linux/arch/arm/include
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Liyuan Pang a9bfe4eb01 ARM: 9464/1: fix input-only operand modification in load_unaligned_zeropad() 
[ Upstream commit edb924a721 ]

In the inline assembly inside load_unaligned_zeropad(), the "addr" is
constrained as input-only operand. The compiler assumes that on exit
from the asm statement these operands contain the same values as they
had before executing the statement, but when kernel page fault happened, the assembly fixup code "bic %2 %2, #0x3" modify the value of "addr", which may lead to an unexpected behavior.

Use a temporary variable "tmp" to handle it, instead of modifying the
input-only operand, just like what arm64's load_unaligned_zeropad()
does.

Fixes: b9a50f7490 ("ARM: 7450/1: dcache: select DCACHE_WORD_ACCESS for little-endian ARMv6+ CPUs")
Co-developed-by: Xie Yuanbin <xieyuanbin1@huawei.com>
Signed-off-by: Xie Yuanbin <xieyuanbin1@huawei.com>
Signed-off-by: Liyuan Pang <pangliyuan1@huawei.com>
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
Signed-off-by: Sasha Levin <sashal@kernel.org>
History 2026-01-19 13:09:39 +01:00
..
asm ARM: 9464/1: fix input-only operand modification in load_unaligned_zeropad() 2026-01-19 13:09:39 +01:00
debug ARM: imx: rename DEBUG_IMX21_IMX27_UART to DEBUG_IMX27_UART 2022-01-27 11:04:29 +01:00
uapi/asm ARM development updates for 5.15: 2021-09-09 13:25:49 -07:00