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linux/drivers/phy/rockchip
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Michael Riesch eab8d5e5e1 phy: rockchip: phy-rockchip-inno-csidphy: allow writes to grf register 0 
[ Upstream commit 8c7c19466c ]

The driver for the Rockchip MIPI CSI-2 DPHY uses GRF register offset
value 0 to sort out undefined registers. However, the RK3588 CSIDPHY GRF
this offset is perfectly fine (in fact, register 0 is the only one in
this register file).
Introduce a boolean variable to indicate valid registers and allow writes
to register 0.

Reviewed-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Michael Riesch <michael.riesch@collabora.com>
Link: https://lore.kernel.org/r/20250616-rk3588-csi-dphy-v4-4-a4f340a7f0cf@collabora.com
Signed-off-by: Vinod Koul <vkoul@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>
History 2025-12-07 06:09:21 +09:00
..
Kconfig phy/rockchip: add Innosilicon-based CSI dphy 2021-06-21 09:26:13 +05:30
Makefile phy/rockchip: add Innosilicon-based CSI dphy 2021-06-21 09:26:13 +05:30
phy-rockchip-dp.c treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 178 2019-05-30 11:29:19 -07:00
phy-rockchip-dphy-rx0.c phy: rockchip-dphy-rx0: Include linux/delay.h 2020-09-22 19:44:04 +05:30
phy-rockchip-emmc.c phy: rockchip: emmc, add vendor prefix to dts properties 2021-01-13 17:28:24 +05:30
phy-rockchip-inno-csidphy.c phy: rockchip: phy-rockchip-inno-csidphy: allow writes to grf register 0 2025-12-07 06:09:21 +09:00
phy-rockchip-inno-dsidphy.c phy: dphy: Correct clk_pre parameter 2022-02-16 12:56:23 +01:00
phy-rockchip-inno-hdmi.c phy/rockchip: inno-hdmi: do not power on rk3328 post pll on reg write 2023-09-19 12:22:48 +02:00
phy-rockchip-inno-usb2.c phy: rockchip-inno-usb2: Fix missing clk_disable_unprepare() in rockchip_usb2phy_power_on() 2023-02-01 08:27:07 +01:00
phy-rockchip-pcie.c phy: Use device_get_match_data() 2025-10-02 13:39:08 +02:00
phy-rockchip-typec.c phy: rockchip-typec: Fix unsigned comparison with less than zero 2023-03-11 13:57:38 +01:00
phy-rockchip-usb.c phy: Use device_get_match_data() 2025-10-02 13:39:08 +02:00