linux/include/soc
Vladimir Oltean 960ec92774 net: mscc: ocelot: serialize access to the injection/extraction groups
[ Upstream commit c5e12ac3be ]

As explained by Horatiu Vultur in commit 603ead9658 ("net: sparx5: Add
spinlock for frame transmission from CPU") which is for a similar
hardware design, multiple CPUs can simultaneously perform injection
or extraction. There are only 2 register groups for injection and 2
for extraction, and the driver only uses one of each. So we'd better
serialize access using spin locks, otherwise frame corruption is
possible.

Note that unlike in sparx5, FDMA in ocelot does not have this issue
because struct ocelot_fdma_tx_ring already contains an xmit_lock.

I guess this is mostly a problem for NXP LS1028A, as that is dual core.
I don't think VSC7514 is. So I'm blaming the commit where LS1028A (aka
the felix DSA driver) started using register-based packet injection and
extraction.

Fixes: 0a6f17c6ae ("net: dsa: tag_ocelot_8021q: add support for PTP timestamping")
Signed-off-by: Vladimir Oltean <vladimir.oltean@nxp.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Signed-off-by: Sasha Levin <sashal@kernel.org>
History 2024-08-29 17:30:43 +02:00
..
arc clocksource/drivers/arc_timer: Eliminate redefined macro error 2021-10-16 22:15:01 +02:00
at91 ARM: at91: pm: avoid soft resetting AC DLL 2022-11-01 12:25:19 +02:00
bcm2835 firmware: raspberrypi: Add RPI_FIRMWARE_NOTIFY_DISPLAY_DONE 2022-01-11 13:16:10 +01:00
canaan clk: Add RISC-V Canaan Kendryte K210 clock driver 2021-02-22 17:51:04 -08:00
fsl soc: fsl: qbman: Add CGR update function 2022-09-05 14:27:39 +01:00
imx ARM: imx: Initialize SoC ID on i.MX50 2021-05-13 15:42:21 +08:00
mediatek memory: mtk-smi: Add enable IOMMU SMC command for MM master 2022-08-30 20:54:05 +03:00
microchip clk: microchip: mpfs: add reset controller 2022-09-14 10:55:17 +03:00
mscc net: mscc: ocelot: serialize access to the injection/extraction groups 2024-08-29 17:30:43 +02:00
qcom soc: qcom: rpmh-rsc: Enhance check for VRM in-flight request 2024-06-16 13:41:33 +02:00
rockchip soc: rockchip: power-domain: Manage resource conflicts with firmware 2022-05-09 03:36:52 +09:00
sa1100 treewide: Replace GPLv2 boilerplate/reference with SPDX - rule 500 2019-06-19 17:09:55 +02:00
sifive soc: sifive: ccache: Rename SiFive L2 cache to Composable cache. 2022-10-13 11:06:51 -07:00
tegra soc/tegra: cbb: Add CBB 1.0 driver for Tegra194 2022-09-15 12:41:36 +02:00