linux/drivers/fpga
Marco Pagani 9b4eee8572 fpga: region: add owner module and take its refcount
[ Upstream commit b7c0e1ecee ]

The current implementation of the fpga region assumes that the low-level
module registers a driver for the parent device and uses its owner pointer
to take the module's refcount. This approach is problematic since it can
lead to a null pointer dereference while attempting to get the region
during programming if the parent device does not have a driver.

To address this problem, add a module owner pointer to the fpga_region
struct and use it to take the module's refcount. Modify the functions for
registering a region to take an additional owner module parameter and
rename them to avoid conflicts. Use the old function names for helper
macros that automatically set the module that registers the region as the
owner. This ensures compatibility with existing low-level control modules
and reduces the chances of registering a region without setting the owner.

Also, update the documentation to keep it consistent with the new interface
for registering an fpga region.

Fixes: 0fa20cdfcc ("fpga: fpga-region: device tree control for FPGA")
Suggested-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Suggested-by: Xu Yilun <yilun.xu@intel.com>
Reviewed-by: Russ Weight <russ.weight@linux.dev>
Signed-off-by: Marco Pagani <marpagan@redhat.com>
Acked-by: Xu Yilun <yilun.xu@intel.com>
Link: https://lore.kernel.org/r/20240419083601.77403-1-marpagan@redhat.com
Signed-off-by: Xu Yilun <yilun.xu@linux.intel.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
History 2024-06-16 13:39:38 +02:00
..
altera-cvp.c fpga: fix spelling mistakes 2021-07-21 19:54:21 -07:00
altera-fpga2sdram.c fpga: bridge: add devm_fpga_bridge_create 2018-10-16 11:13:50 +02:00
altera-freeze-bridge.c fpga: altera-freeze-bridge: Address warning about unused variable 2021-07-24 15:10:30 -07:00
altera-hps2fpga.c fpga: bridge: add devm_fpga_bridge_create 2018-10-16 11:13:50 +02:00
altera-pr-ip-core-plat.c fpga: fpga-mgr: altera-pr-ip: Simplify registration 2020-12-01 18:49:32 +01:00
altera-pr-ip-core.c fpga: altera-pr-ip: fix unsigned comparison with less than zero 2022-08-17 14:23:41 +02:00
altera-ps-spi.c fpga: fpga-mgr: altera-ps-spi: Simplify registration 2020-12-01 18:49:32 +01:00
dfl-afu-dma-region.c fpga: dfl: afu: convert get_user_pages() --> pin_user_pages() 2020-06-18 18:12:06 -07:00
dfl-afu-error.c fpga: dfl: afu: harden port enable logic 2021-03-24 11:15:04 -07:00
dfl-afu-main.c fpga: dfl: afu: harden port enable logic 2021-03-24 11:15:04 -07:00
dfl-afu-region.c fpga: dfl: afu: add afu sub feature support 2018-07-15 13:55:47 +02:00
dfl-afu.h fpga: dfl: afu: harden port enable logic 2021-03-24 11:15:04 -07:00
dfl-fme-br.c fpga: bridge: add devm_fpga_bridge_create 2018-10-16 11:13:50 +02:00
dfl-fme-error.c fpga: dfl: fme: add interrupt support for global error reporting 2020-07-06 21:35:42 -07:00
dfl-fme-main.c fpga: dfl: fme: add interrupt support for global error reporting 2020-07-06 21:35:42 -07:00
dfl-fme-mgr.c fpga: fpga-mgr: wrap the state() op 2021-07-24 15:10:31 -07:00
dfl-fme-perf.c fpga: dfl: fme: Fix cpu hotplug issue in performance reporting 2021-07-27 11:05:16 -07:00
dfl-fme-pr.c fpga: fix spelling mistakes 2021-07-21 19:54:21 -07:00
dfl-fme-pr.h fpga: dfl: fme: add partial reconfiguration sub feature support 2018-07-15 13:55:46 +02:00
dfl-fme-region.c fpga: region: Use standard dev_release for class driver 2024-06-16 13:39:38 +02:00
dfl-fme.h fpga: dfl: fme: add performance reporting support 2020-04-28 15:49:28 +02:00
dfl-n3000-nios.c fpga: fix spelling mistakes 2021-07-21 19:54:21 -07:00
dfl-pci.c fpga: dfl: pci: add device IDs for Silicom N501x PAC cards 2021-07-24 15:10:30 -07:00
dfl.c fpga: region: Use standard dev_release for class driver 2024-06-16 13:39:38 +02:00
dfl.h fpga: dfl: expose feature revision from struct dfl_device 2021-07-29 12:54:10 -07:00
fpga-bridge.c fpga: bridge: fix kernel-doc parameter description 2023-05-11 23:00:31 +09:00
fpga-mgr.c fpga: fpga-mgr: wrap the write_sg() op 2021-07-24 15:10:31 -07:00
fpga-region.c fpga: region: add owner module and take its refcount 2024-06-16 13:39:38 +02:00
ice40-spi.c fpga: ice40-spi: Add SPI device ID table 2021-09-27 14:00:41 -07:00
Kconfig FPGA Manager changes for 5.15-rc1 2021-08-05 14:26:03 +02:00
machxo2-spi.c fpga: machxo2-spi: Fix missing error code in machxo2_write_complete() 2021-09-15 14:01:24 -07:00
Makefile fpga: versal-fpga: Add versal fpga manager driver 2021-07-21 13:14:09 +02:00
of-fpga-region.c fpga: region: Use standard dev_release for class driver 2024-06-16 13:39:38 +02:00
socfpga-a10.c fpga: mgr: add devm_fpga_mgr_create 2018-10-16 11:13:50 +02:00
socfpga.c fpga: fpga-mgr: socfpga: Simplify registration 2020-12-01 18:49:32 +01:00
stratix10-soc.c fpga: stratix10-soc: Fix return value check in s10_ops_write_init() 2023-02-09 11:26:44 +01:00
ts73xx-fpga.c fpga: fpga-mgr: wrap the state() op 2021-07-24 15:10:31 -07:00
versal-fpga.c fpga: versal-fpga: Remove empty functions 2021-07-27 18:46:03 +02:00
xilinx-pr-decoupler.c fpga: xilinx-pr-decoupler: Address warning about unused variable 2021-07-24 15:10:30 -07:00
xilinx-spi.c fpga: xiilnx-spi: Address warning about unused variable 2021-07-24 15:10:30 -07:00
zynq-fpga.c fpga: fix spelling mistakes 2021-07-21 19:54:21 -07:00
zynqmp-fpga.c fpga: fpga-mgr: make write_complete() op optional 2021-07-24 15:10:30 -07:00