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ab15670727
Use PLL1_80M instead of PLL3 to drive UART2 clock divided down to 80 MHz instead of 64 MHz to obtain suitable block clock for exact 4 Mbdps, which is the maximum supported baud rate by the muRata 2AE BT UART. The difference here is that at 64 MHz UART block clock, the clock with are divided by 16 (due to oversampling) to 4 MHz and the baud rate generator then needs to be set to UBIR+1/UBMR+1 = 1/1 to yield 4 Mbdps . In case of 80 MHz UART block clock divided by 16 to 5 MHz, the baud rate generator needs to be set to UBIR+1/UBMR+1 = 4/5 to yield 4 Mbdps . Both options are valid and yield the same result, except using the PLL1_80M output requires fewer clock tree changes, since the PLL1 already generates the 80 MHz usable for UART, which frees the PLL3 for other uses. Suggested-by: Christoph Niedermaier <cniedermaier@dh-electronics.com> Signed-off-by: Marek Vasut <marex@denx.de> Reviewed-by: Fabio Estevam <festevam@denx.de> Signed-off-by: Shawn Guo <shawnguo@kernel.org> |
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Linux kernel
============
There are several guides for kernel developers and users. These guides can
be rendered in a number of formats, like HTML and PDF. Please read
Documentation/admin-guide/README.rst first.
In order to build the documentation, use ``make htmldocs`` or
``make pdfdocs``. The formatted documentation can also be read online at:
https://www.kernel.org/doc/html/latest/
There are various text files in the Documentation/ subdirectory,
several of them using the Restructured Text markup notation.
Please read the Documentation/process/changes.rst file, as it contains the
requirements for building and running the kernel, and information about
the problems which may result by upgrading your kernel.