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c59053dc58
The disable sequence after wait for transcoder off was not correctly implemented. The MST disable sequence is basically the same for HSW, SKL, ICL and TGL, with just minor changes for TGL. With this last patch we finally fixed the hotplugs triggered by MST sinks during the disable/enable sequence, those were causing source to try to do a link training while it was not ready causing CPU pipe FIFO underrrus on TGL. v2: Only unsetting TGL_TRANS_DDI_PORT_MASK for TGL on the post disable sequence v4: Rebased, moved MST sequences to intel_mst_post_disable_dp() BSpec: 4231 BSpec: 4163 BSpec: 22243 BSpec: 49190 Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Cc: Lucas De Marchi <lucas.demarchi@intel.com> Reviewed-by: Ville Syrjälä <ville.syrjala@linux.intel.com> Signed-off-by: José Roberto de Souza <jose.souza@intel.com> Link: https://patchwork.freedesktop.org/patch/msgid/20191223010654.67037-4-jose.souza@intel.com |
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Linux kernel
============
There are several guides for kernel developers and users. These guides can
be rendered in a number of formats, like HTML and PDF. Please read
Documentation/admin-guide/README.rst first.
In order to build the documentation, use ``make htmldocs`` or
``make pdfdocs``. The formatted documentation can also be read online at:
https://www.kernel.org/doc/html/latest/
There are various text files in the Documentation/ subdirectory,
several of them using the Restructured Text markup notation.
Please read the Documentation/process/changes.rst file, as it contains the
requirements for building and running the kernel, and information about
the problems which may result by upgrading your kernel.