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MD Danish Anwar f7ed5ae30c dt-bindings: soc: ti: pruss: Add clocks for ICSSG
The ICSSG module has 7 clocks for each instance.

These clocks are ICSSG0_CORE_CLK, ICSSG0_IEP_CLK, ICSSG0_ICLK,
ICSSG0_UART_CLK, RGMII_MHZ_250_CLK, RGMII_MHZ_50_CLK and RGMII_MHZ_5_CLK
These clocks are described in AM64x TRM Section 6.4.3 Table 6-398.

Add these clocks to the dt binding of ICSSG.

Link: https://www.ti.com/lit/pdf/spruim2 (AM64x TRM)
Signed-off-by: MD Danish Anwar <danishanwar@ti.com>
Reviewed-by: Roger Quadros <rogerq@kernel.org>
Acked-by: Conor Dooley <conor.dooley@microchip.com>
Link: https://lore.kernel.org/r/20241113110955.3876045-2-danishanwar@ti.com
Signed-off-by: Nishanth Menon <nm@ti.com>
History 2024-12-26 14:00:54 -06:00
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Linux kernel
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There are several guides for kernel developers and users. These guides can
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