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Stephen Boyd fac3810fb0 First round of amlogic clock update for v5.5:
Add sm1 support in the audio clock controller
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Merge tag 'clk-meson-v5.5-1' of https://github.com/BayLibre/clk-meson into clk-amlogic

Pull Amlogic clk updates from Jerome Brunet:

 - Add sm1 support in the Amlogic audio clock controller

* tag 'clk-meson-v5.5-1' of https://github.com/BayLibre/clk-meson:
  clk: meson: axg-audio: use devm_platform_ioremap_resource() to simplify code
  clk: meson: axg_audio: add sm1 support
  clk: meson: axg-audio: provide clk top signal name
  clk: meson: axg-audio: prepare sm1 addition
  clk: meson: axg-audio: fix regmap last register
  clk: meson: axg-audio: remove useless defines
  dt-bindings: clock: meson: add sm1 resets to the axg-audio controller
  dt-bindings: clk: axg-audio: add sm1 bindings
  clk: meson: g12a: set CLK_MUX_ROUND_CLOSEST on the cpu clock muxes
  clk: meson: g12a: fix cpu clock rate setting
  clk: meson: gxbb: let sar_adc_clk_div set the parent clock rate
History 2019-11-06 11:20:40 -08:00
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