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a5880a9e5b
Previous baud rate setting code only has been tested with 3.5M/9600/ 115200/230400/460800 bps, and recently we got a 3M bps device to test, which needs to modify current MUL register setting, and with this patch 2.5M/2M/1.5M/1M/0.5M should also work as they just use a MUL value scale down from 3M's. Also got some reference register setting from silicon guys for different baud rates, which tries to keep the pre-scalar register value to 16. Signed-off-by: Feng Tang <feng.tang@intel.com> Cc: stable <stable@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@suse.de>
1513 lines
37 KiB
1513 lines
37 KiB