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linux/arch/mips/include
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Jiong Wang 7e533b91d8 mips: bpf: fix encoding bug for mm_srlv32_op 
commit 17f6c83fb5 upstream.

For micro-mips, srlv inside POOL32A encoding space should use 0x50
sub-opcode, NOT 0x90.

Some early version ISA doc describes the encoding as 0x90 for both srlv and
srav, this looks to me was a typo. I checked Binutils libopcode
implementation which is using 0x50 for srlv and 0x90 for srav.

v1->v2:
  - Keep mm_srlv32_op sorted by value.

Fixes: f31318fdf3 ("MIPS: uasm: Add srlv uasm instruction")
Cc: Markos Chandras <markos.chandras@imgtec.com>
Cc: Paul Burton <paul.burton@mips.com>
Cc: linux-mips@vger.kernel.org
Acked-by: Jakub Kicinski <jakub.kicinski@netronome.com>
Acked-by: Song Liu <songliubraving@fb.com>
Signed-off-by: Jiong Wang <jiong.wang@netronome.com>
Signed-off-by: Alexei Starovoitov <ast@kernel.org>
Signed-off-by: Ben Hutchings <ben@decadent.org.uk>
History 2019-04-04 16:13:47 +01:00
..
asm MIPS: Expand MIPS32 ASIDs to 64 bits 2019-04-04 16:13:47 +01:00
uapi/asm mips: bpf: fix encoding bug for mm_srlv32_op 2019-04-04 16:13:47 +01:00