linux

Andy Shevchenko 5a1c58d34f dmaengine: dw: properly read DWC_PARAMS register [ Upstream commit `6bea0f6d1c` ] In case we have less than maximum allowed channels (8) and autoconfiguration is enabled the DWC_PARAMS read is wrong because it uses different arithmetic to what is needed for channel priority setup. Re-do the caclulations properly. This now works on AVR32 board well. Fixes: `fed2574b3c` (dw_dmac: introduce software emulation of LLP transfers) Cc: yitian.bu@tangramtek.com Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com> Signed-off-by: Vinod Koul <vinod.koul@intel.com> Signed-off-by: Sasha Levin <sasha.levin@oracle.com>		History 2015-10-27 22:13:05 -04:00
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core.c	dmaengine: dw: properly read DWC_PARAMS register	2015-10-27 22:13:05 -04:00
internal.h	dmaengine: dw: export probe()/remove() and Co to users	2014-10-15 20:31:05 +05:30
Kconfig	Remove GENERIC_HARDIRQ config option	2013-09-13 15:09:52 +02:00
Makefile	dma: dw: add PCI part of the driver	2013-07-05 11:40:45 +05:30
pci.c	dmaengine: dw: always export dw_dma_{en,dis}able	2014-10-15 20:31:04 +05:30
platform.c	dmaengine: dw: append MODULE_ALIAS for platform driver	2015-04-16 20:11:45 -04:00
regs.h	dmaengine: dw: enable and disable controller when needed	2014-10-15 20:31:05 +05:30