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linux/drivers/clk/keystone
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Murali Karicheri c6fdd1b52b clk: keystone: add support for post divider register for main pll 
commit 02fdfd708f upstream.

Main PLL controller has post divider bits in a separate register in
pll controller. Use the value from this register instead of fixed
divider when available.

Signed-off-by: Murali Karicheri <m-karicheri2@ti.com>
Signed-off-by: Michael Turquette <mturquette@baylibre.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
History 2015-08-16 20:52:17 -07:00
..
gate.c clk: keystone: gate: fix clk_init_data initialization 2014-02-10 15:17:43 -05:00
Makefile clk: keystone: Build Keystone clock drivers 2013-10-07 18:16:37 -07:00
pll.c clk: keystone: add support for post divider register for main pll 2015-08-16 20:52:17 -07:00