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linux/drivers/clk/mediatek
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Chen Zhong 3c38ce8767 clk: mediatek: add the option for determining PLL source clock 
[ Upstream commit c955bf3998 ]

Since the previous setup always sets the PLL using crystal 26MHz, this
doesn't always happen in every MediaTek platform. So the patch added
flexibility for assigning extra member for determining the PLL source
clock.

Signed-off-by: Chen Zhong <chen.zhong@mediatek.com>
Signed-off-by: Sean Wang <sean.wang@mediatek.com>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Signed-off-by: Sasha Levin <alexander.levin@verizon.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
History 2017-12-20 10:10:27 +01:00
..
clk-apmixed.c clk: mediatek: Add USB clock support in MT8173 APMIXEDSYS 2015-10-01 12:06:00 +08:00
clk-cpumux.c clk: Convert to using %pOF instead of full_name 2017-07-21 15:49:54 -07:00
clk-cpumux.h clk: mediatek: add missing cpu mux causing Mediatek cpufreq can't work 2017-06-19 19:02:43 -07:00
clk-gate.c clk: mediatek: Add MT2701 clock support 2016-11-08 15:59:49 -08:00
clk-gate.h clk: mediatek: Add MT2701 clock support 2016-11-08 15:59:49 -08:00
clk-mt2701-bdp.c clk: mediatek: Add MT2701 clock support 2016-11-08 15:59:49 -08:00
clk-mt2701-eth.c clk: mediatek: add mt2701 ethernet reset 2017-04-21 19:20:33 -07:00
clk-mt2701-hif.c reset: mediatek: Add MT2701 reset driver 2016-11-08 15:59:51 -08:00
clk-mt2701-img.c clk: mediatek: Add MT2701 clock support 2016-11-08 15:59:49 -08:00
clk-mt2701-mm.c clk: mediatek: Add MT2701 clock support 2016-11-08 15:59:49 -08:00
clk-mt2701-vdec.c clk: mediatek: Add MT2701 clock support 2016-11-08 15:59:49 -08:00
clk-mt2701.c clk: mediatek: export cpu multiplexer clock for MT2701/MT7623 SoCs 2017-06-19 19:02:44 -07:00
clk-mt6797-img.c clk: mediatek: add clk support for MT6797 2017-04-19 09:20:21 -07:00
clk-mt6797-mm.c clk: mediatek: add clk support for MT6797 2017-04-19 09:20:21 -07:00
clk-mt6797-vdec.c clk: mediatek: add clk support for MT6797 2017-04-19 09:20:21 -07:00
clk-mt6797-venc.c clk: mediatek: add clk support for MT6797 2017-04-19 09:20:21 -07:00
clk-mt6797.c clk: mediatek: add clk support for MT6797 2017-04-19 09:20:21 -07:00
clk-mt8135.c clk: mediatek: Properly include clk.h 2015-07-20 10:53:09 -07:00
clk-mt8173.c clk: mediatek: export cpu multiplexer clock for MT8173 SoCs 2017-06-19 19:02:44 -07:00
clk-mtk.c clk: Convert to using %pOF instead of full_name 2017-07-21 15:49:54 -07:00
clk-mtk.h clk: mediatek: add the option for determining PLL source clock 2017-12-20 10:10:27 +01:00
clk-pll.c clk: mediatek: add the option for determining PLL source clock 2017-12-20 10:10:27 +01:00
Kconfig clk: mediatek: add clk support for MT6797 2017-04-19 09:20:21 -07:00
Makefile License cleanup: add SPDX GPL-2.0 license identifier to files with no license 2017-11-02 11:10:55 +01:00
reset.c clk: Convert to using %pOF instead of full_name 2017-07-21 15:49:54 -07:00