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Marc Zyngier 674e701270 arm64: Document workaround for Cortex-A72 erratum #853709 
We already have a workaround for Cortex-A57 erratum #852523,
but Cortex-A72 r0p0 to r0p2 do suffer from the same issue
(known as erratum #853709).

Let's document the fact that we already handle this.

Acked-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Marc Zyngier <marc.zyngier@arm.com>
Signed-off-by: Christoffer Dall <christoffer.dall@linaro.org>
History 2016-08-17 12:23:47 +02:00
..
acpi_object_usage.txt ARM64: ACPI: Update documentation for latest specification version 2016-06-21 16:26:09 +01:00
arm-acpi.txt ARM64: ACPI: Update documentation for latest specification version 2016-06-21 16:26:09 +01:00
booting.txt arm64: add the initrd region to the linear mapping explicitly 2016-04-14 16:20:45 +01:00
legacy_instructions.txt arm64: Emulate SETEND for AArch32 tasks 2015-01-23 17:11:44 +00:00
memory.txt Documentation/arm64/memory.txt: fix typo 2014-10-20 17:55:38 +01:00
silicon-errata.txt arm64: Document workaround for Cortex-A72 erratum #853709 2016-08-17 12:23:47 +02:00
tagged-pointers.txt arm64: documentation: tighten up tagged pointer documentation 2013-09-20 09:56:06 +01:00