linux/drivers/pinctrl/intel
Andy Shevchenko 877fe62863 pinctrl: intel: merrifield: Correct UART pin lists
commit 5d996132d9 upstream.

UART pin lists consist GPIO numbers which is simply wrong.
Replace it by pin numbers.

Fixes: 4e80c8f505 ("pinctrl: intel: Add Intel Merrifield pin controller support")
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
History 2017-08-16 13:43:23 -07:00
..
Kconfig pinctrl: intel: Add Intel Merrifield pin controller support 2016-06-29 09:59:35 +02:00
Makefile pinctrl: intel: Add Intel Merrifield pin controller support 2016-06-29 09:59:35 +02:00
pinctrl-baytrail.c pinctrl: baytrail: Rectify debounce support (part 2) 2017-06-17 06:41:53 +02:00
pinctrl-broxton.c pinctrl: broxton: Use correct PADCFGLOCK offset 2017-02-01 08:33:12 +01:00
pinctrl-cherryview.c pinctrl: cherryview: Add terminate entry for dmi_system_id tables 2017-07-12 15:01:05 +02:00
pinctrl-intel.c pinctrl: intel: Set pin direction properly 2017-07-05 14:40:24 +02:00
pinctrl-intel.h pinctrl: intel: fix bug of register offset calculation 2015-12-10 23:01:41 +01:00
pinctrl-merrifield.c pinctrl: intel: merrifield: Correct UART pin lists 2017-08-16 13:43:23 -07:00
pinctrl-sunrisepoint.c pinctrl: intel: fix bug of register offset calculation 2015-12-10 23:01:41 +01:00