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linux/drivers/pinctrl/intel
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Mika Westerberg 418dfce4fa pinctrl: cherryview: Mask all interrupts on Intel_Strago based systems 
commit d2b3c35359 upstream.

Guenter Roeck reported an interrupt storm on a prototype system which is
based on Cyan Chromebook. The root cause turned out to be a incorrectly
configured pin that triggers spurious interrupts. This will be fixed in
coreboot but currently we need to prevent the interrupt storm from
happening by masking all interrupts (but not GPEs) on those systems.

Link: https://bugzilla.kernel.org/show_bug.cgi?id=197953
Fixes: bcb48cca23 ("pinctrl: cherryview: Do not mask all interrupts in probe")
Reported-and-tested-by: Guenter Roeck <linux@roeck-us.net>
Reported-by: Dmitry Torokhov <dmitry.torokhov@gmail.com>
Signed-off-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
History 2017-12-29 17:42:59 +01:00
..
Kconfig pinctrl: intel: Add Intel Merrifield pin controller support 2016-06-29 09:59:35 +02:00
Makefile pinctrl: intel: Add Intel Merrifield pin controller support 2016-06-29 09:59:35 +02:00
pinctrl-baytrail.c pinctrl: baytrail: Fix debugfs offset output 2017-11-15 15:53:13 +01:00
pinctrl-broxton.c pinctrl: broxton: Use correct PADCFGLOCK offset 2017-02-01 08:33:12 +01:00
pinctrl-cherryview.c pinctrl: cherryview: Mask all interrupts on Intel_Strago based systems 2017-12-29 17:42:59 +01:00
pinctrl-intel.c pinctrl: intel: Set pin direction properly 2017-07-05 14:40:24 +02:00
pinctrl-intel.h pinctrl: intel: fix bug of register offset calculation 2015-12-10 23:01:41 +01:00
pinctrl-merrifield.c pinctrl: intel: merrifield: Correct UART pin lists 2017-08-16 13:43:23 -07:00
pinctrl-sunrisepoint.c pinctrl: intel: fix bug of register offset calculation 2015-12-10 23:01:41 +01:00