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Mark Rutland 9707c7895c arm64: errata: Expand speculative SSBS workaround once more 
[ Upstream commit 081eb7932c ]

A number of Arm Ltd CPUs suffer from errata whereby an MSR to the SSBS
special-purpose register does not affect subsequent speculative
instructions, permitting speculative store bypassing for a window of
time.

We worked around this for a number of CPUs in commits:

* 7187bb7d0b ("arm64: errata: Add workaround for Arm errata 3194386 and 3312417")
* 75b3c43eab ("arm64: errata: Expand speculative SSBS workaround")
* 145502cac7ea70b5 ("arm64: errata: Expand speculative SSBS workaround (again)")

Since then, a (hopefully final) batch of updates have been published,
with two more affected CPUs. For the affected CPUs the existing
mitigation is sufficient, as described in their respective Software
Developer Errata Notice (SDEN) documents:

* Cortex-A715 (MP148) SDEN v15.0, erratum 3456084
  https://developer.arm.com/documentation/SDEN-2148827/1500/

* Neoverse-N3 (MP195) SDEN v5.0, erratum 3456111
  https://developer.arm.com/documentation/SDEN-3050973/0500/

Enable the existing mitigation by adding the relevant MIDRs to
erratum_spec_ssbs_list, and update silicon-errata.rst and the
Kconfig text accordingly.

Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Cc: James Morse <james.morse@arm.com>
Cc: Will Deacon <will@kernel.org>
Link: https://lore.kernel.org/r/20240930111705.3352047-3-mark.rutland@arm.com
Signed-off-by: Catalin Marinas <catalin.marinas@arm.com>
[ Mark: fix conflict in silicon-errata.rst, handle move ]
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
History 2024-10-17 15:11:45 +02:00
..
acpi_object_usage.rst Documentation: arm64/acpi : clarify arm64 support of IBFT 2021-03-22 12:43:20 +00:00
amu.rst Documentation: Chinese translation of Documentation/arm64/amu.rst 2020-09-28 15:24:24 -06:00
arm-acpi.rst arm64: Replace HTTP links with HTTPS ones 2020-07-23 14:04:37 -06:00
asymmetric-32bit.rst Documentation: arm64: describe asymmetric 32-bit support 2021-08-20 12:33:07 +02:00
booting.rst arm64: Document the requirement for SCR_EL3.HCE 2021-08-24 16:44:23 +01:00
cpu-feature-registers.rst arm64: cpufeature: Fix the visibility of compat hwcaps 2024-08-19 05:45:51 +02:00
elf_hwcaps.rst arm64: cpufeature: add HWCAP for FEAT_RPRES 2022-03-11 12:22:33 +01:00
features.rst docs: archis: add a per-architecture features list 2020-12-03 15:10:15 -07:00
hugetlbpage.rst Documentation: Chinese translation of Documentation/arm64/hugetlbpage.rst 2020-10-21 15:15:17 -06:00
index.rst Documentation: arm64: describe asymmetric 32-bit support 2021-08-20 12:33:07 +02:00
kasan-offsets.sh arm64: mm: extend linear region for 52-bit VA configurations 2020-11-09 17:15:37 +00:00
legacy_instructions.rst docs: arm64: convert docs to ReST and rename to .rst 2019-06-14 14:20:27 -06:00
memory-tagging-extension.rst Documentation: document the preferred tag checking mode feature 2021-07-28 18:39:26 +01:00
memory.rst ARM: 2020-12-20 10:44:05 -08:00
perf.rst Documentation: Chinese translation of Documentation/arm64/perf.rst 2020-11-13 15:21:38 -07:00
pointer-authentication.rst arm64: Introduce prctl(PR_PAC_{SET,GET}_ENABLED_KEYS) 2021-04-13 17:31:44 +01:00
silicon-errata.rst arm64: errata: Expand speculative SSBS workaround once more 2024-10-17 15:11:45 +02:00
sve.rst It's been a busy cycle for documentation - hopefully the busiest for a 2020-08-04 22:47:54 -07:00
tagged-address-abi.rst userfaultfd: do not untag user pointers 2021-07-23 17:43:28 -07:00
tagged-pointers.rst arm64: expose FAR_EL1 tag bits in siginfo 2020-11-23 18:17:39 +00:00