linux/drivers/fpga
Marco Pagani 304f8032d6 fpga: manager: add owner module and take its refcount
[ Upstream commit 4d4d2d4346 ]

The current implementation of the fpga manager assumes that the low-level
module registers a driver for the parent device and uses its owner pointer
to take the module's refcount. This approach is problematic since it can
lead to a null pointer dereference while attempting to get the manager if
the parent device does not have a driver.

To address this problem, add a module owner pointer to the fpga_manager
struct and use it to take the module's refcount. Modify the functions for
registering the manager to take an additional owner module parameter and
rename them to avoid conflicts. Use the old function names for helper
macros that automatically set the module that registers the manager as the
owner. This ensures compatibility with existing low-level control modules
and reduces the chances of registering a manager without setting the owner.

Also, update the documentation to keep it consistent with the new interface
for registering an fpga manager.

Other changes: opportunistically move put_device() from __fpga_mgr_get() to
fpga_mgr_get() and of_fpga_mgr_get() to improve code clarity since the
manager device is taken in these functions.

Fixes: 654ba4cc0f ("fpga manager: ensure lifetime with of_fpga_mgr_get")
Suggested-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Suggested-by: Xu Yilun <yilun.xu@intel.com>
Signed-off-by: Marco Pagani <marpagan@redhat.com>
Acked-by: Xu Yilun <yilun.xu@intel.com>
Link: https://lore.kernel.org/r/20240305192926.84886-1-marpagan@redhat.com
Signed-off-by: Xu Yilun <yilun.xu@linux.intel.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
Signed-off-by: Xiangyu Chen <xiangyu.chen@windriver.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>
History 2024-12-14 19:53:12 +01:00
..
altera-cvp.c fpga: mgr: Use standard dev_release for class driver 2021-11-28 13:59:13 -08:00
altera-fpga2sdram.c fpga: bridge: Use standard dev_release for class driver 2021-11-28 14:02:13 -08:00
altera-freeze-bridge.c fpga: bridge: Use standard dev_release for class driver 2021-11-28 14:02:13 -08:00
altera-hps2fpga.c fpga: bridge: Use standard dev_release for class driver 2021-11-28 14:02:13 -08:00
altera-pr-ip-core-plat.c fpga: fpga-mgr: altera-pr-ip: Simplify registration 2020-12-01 18:49:32 +01:00
altera-pr-ip-core.c fpga: altera-pr-ip: fix unsigned comparison with less than zero 2022-06-10 15:48:23 +08:00
altera-ps-spi.c fpga: mgr: Use standard dev_release for class driver 2021-11-28 13:59:13 -08:00
dfl-afu-dma-region.c fpga: dfl: afu: convert get_user_pages() --> pin_user_pages() 2020-06-18 18:12:06 -07:00
dfl-afu-error.c fpga: dfl: afu: harden port enable logic 2021-03-24 11:15:04 -07:00
dfl-afu-main.c fpga: dfl: afu: harden port enable logic 2021-03-24 11:15:04 -07:00
dfl-afu-region.c fpga: dfl: afu: add afu sub feature support 2018-07-15 13:55:47 +02:00
dfl-afu.h fpga: dfl: afu: harden port enable logic 2021-03-24 11:15:04 -07:00
dfl-fme-br.c fpga: bridge: Use standard dev_release for class driver 2021-11-28 14:02:13 -08:00
dfl-fme-error.c fpga: dfl: fme: add interrupt support for global error reporting 2020-07-06 21:35:42 -07:00
dfl-fme-main.c fpga: dfl: fme: add interrupt support for global error reporting 2020-07-06 21:35:42 -07:00
dfl-fme-mgr.c fpga: mgr: Use standard dev_release for class driver 2021-11-28 13:59:13 -08:00
dfl-fme-perf.c fpga: dfl: fme: Fix cpu hotplug issue in performance reporting 2021-07-27 11:05:16 -07:00
dfl-fme-pr.c fpga: fix spelling mistakes 2021-07-21 19:54:21 -07:00
dfl-fme-pr.h fpga: dfl: fme: add partial reconfiguration sub feature support 2018-07-15 13:55:46 +02:00
dfl-fme-region.c fpga: region: Use standard dev_release for class driver 2021-11-28 14:02:41 -08:00
dfl-fme.h fpga: dfl: fme: add performance reporting support 2020-04-28 15:49:28 +02:00
dfl-n3000-nios.c fpga: fix spelling mistakes 2021-07-21 19:54:21 -07:00
dfl-pci.c fpga: dfl-pci: add PCI subdevice ID for Intel D5005 card 2024-06-12 11:03:01 +02:00
dfl.c fpga: prevent integer overflow in dfl_feature_ioctl_set_irq() 2022-09-04 01:48:00 +08:00
dfl.h fpga: dfl: Allow Port to be linked to FME's DFL 2022-05-10 16:05:38 +08:00
fpga-bridge.c fpga: bridge: add owner module and take its refcount 2024-12-14 19:53:12 +01:00
fpga-mgr.c fpga: manager: add owner module and take its refcount 2024-12-14 19:53:12 +01:00
fpga-region.c fpga: region: add owner module and take its refcount 2024-06-12 11:03:39 +02:00
ice40-spi.c fpga: mgr: Use standard dev_release for class driver 2021-11-28 13:59:13 -08:00
intel-m10-bmc-sec-update.c fpga: m10bmc-sec: Fix probe rollback 2023-02-09 11:28:22 +01:00
Kconfig fpga: m10bmc-sec: Fix kconfig dependencies 2022-11-15 21:46:58 +08:00
machxo2-spi.c fpga: mgr: Use standard dev_release for class driver 2021-11-28 13:59:13 -08:00
Makefile fpga: microchip-spi: add Microchip MPF FPGA manager 2022-06-24 12:12:31 +08:00
microchip-spi.c fpga: microchip-spi: rewrite status polling in a time measurable way 2023-03-10 09:33:34 +01:00
of-fpga-region.c fpga: fpga-region: fix kernel-doc formatting issues 2022-05-10 16:05:00 +08:00
socfpga-a10.c fpga: mgr: Use standard dev_release for class driver 2021-11-28 13:59:13 -08:00
socfpga.c fpga: mgr: Use standard dev_release for class driver 2021-11-28 13:59:13 -08:00
stratix10-soc.c fpga: stratix10-soc: Fix return value check in s10_ops_write_init() 2023-02-09 11:28:22 +01:00
ts73xx-fpga.c fpga: mgr: Use standard dev_release for class driver 2021-11-28 13:59:13 -08:00
versal-fpga.c fpga: mgr: Use standard dev_release for class driver 2021-11-28 13:59:13 -08:00
xilinx-pr-decoupler.c fpga: bridge: Use standard dev_release for class driver 2021-11-28 14:02:13 -08:00
xilinx-spi.c fpga: mgr: Use standard dev_release for class driver 2021-11-28 13:59:13 -08:00
zynq-fpga.c fpga: mgr: Use standard dev_release for class driver 2021-11-28 13:59:13 -08:00
zynqmp-fpga.c fpga: mgr: Use standard dev_release for class driver 2021-11-28 13:59:13 -08:00