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Oliver Upton cde7f2fd63 arm64: errata: Mitigate Ampere1 erratum AC03_CPU_38 at stage-2 
[ Upstream commit 6df696cd9b ]

AmpereOne has an erratum in its implementation of FEAT_HAFDBS that
required disabling the feature on the design. This was done by reporting
the feature as not implemented in the ID register, although the
corresponding control bits were not actually RES0. This does not align
well with the requirements of the architecture, which mandates these
bits be RES0 if HAFDBS isn't implemented.

The kernel's use of stage-1 is unaffected, as the HA and HD bits are
only set if HAFDBS is detected in the ID register. KVM, on the other
hand, relies on the RES0 behavior at stage-2 to use the same value for
VTCR_EL2 on any cpu in the system. Mitigate the non-RES0 behavior by
leaving VTCR_EL2.HA clear on affected systems.

Cc: stable@vger.kernel.org
Cc: D Scott Phillips <scott@os.amperecomputing.com>
Cc: Darren Hart <darren@os.amperecomputing.com>
Acked-by: D Scott Phillips <scott@os.amperecomputing.com>
Acked-by: Catalin Marinas <catalin.marinas@arm.com>
Link: https://lore.kernel.org/r/20230609220104.1836988-2-oliver.upton@linux.dev
Signed-off-by: Oliver Upton <oliver.upton@linux.dev>
Signed-off-by: Sasha Levin <sashal@kernel.org>
History 2023-08-03 10:23:54 +02:00
..
cpucaps arm64: errata: Mitigate Ampere1 erratum AC03_CPU_38 at stage-2 2023-08-03 10:23:54 +02:00
gen-cpucaps.awk arm64: tools: Add __ASM_CPUCAPS_H to the endif in cpucaps.h 2021-05-13 17:57:43 +01:00
gen-sysreg.awk arm64/sysreg: Allow leading blanks on comments in sysreg file 2022-07-05 11:45:45 +01:00
Makefile arm64/sysreg: Enable automatic generation of system register definitions 2022-05-04 15:30:28 +01:00
sysreg arm64/sysreg: Fix typo in SCTR_EL1.SPINTMASK 2022-10-07 14:30:11 +01:00