linux

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Icenowy Zheng 6e392ff884 riscv: errata: fix T-Head dcache.cva encoding [ Upstream commit `8eb8fe67e2` ] The dcache.cva encoding shown in the comments are wrong, it's for dcache.cval1 (which is restricted to L1) instead. Fix this in the comment and in the hardcoded instruction. Signed-off-by: Icenowy Zheng <uwu@icenowy.me> Tested-by: Sergey Matyukevich <sergey.matyukevich@syntacore.com> Reviewed-by: Heiko Stuebner <heiko@sntech.de> Reviewed-by: Guo Ren <guoren@kernel.org> Tested-by: Drew Fustini <dfustini@baylibre.com> Link: https://lore.kernel.org/r/20230912072410.2481-1-jszhang@kernel.org Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com> Signed-off-by: Sasha Levin <sashal@kernel.org>	History 2023-10-06 14:56:54 +02:00
..
asm	riscv: errata: fix T-Head dcache.cva encoding	2023-10-06 14:56:54 +02:00
uapi/asm	riscv: Bump COMMAND_LINE_SIZE value to 1024	2023-03-30 12:49:16 +02:00

Icenowy Zheng 6e392ff884 riscv: errata: fix T-Head dcache.cva encoding

[ Upstream commit 8eb8fe67e2 ]

The dcache.cva encoding shown in the comments are wrong, it's for
dcache.cval1 (which is restricted to L1) instead.

Fix this in the comment and in the hardcoded instruction.

Signed-off-by: Icenowy Zheng <uwu@icenowy.me>
Tested-by: Sergey Matyukevich <sergey.matyukevich@syntacore.com>
Reviewed-by: Heiko Stuebner <heiko@sntech.de>
Reviewed-by: Guo Ren <guoren@kernel.org>
Tested-by: Drew Fustini <dfustini@baylibre.com>
Link: https://lore.kernel.org/r/20230912072410.2481-1-jszhang@kernel.org
Signed-off-by: Palmer Dabbelt <palmer@rivosinc.com>
Signed-off-by: Sasha Levin <sashal@kernel.org>

History

2023-10-06 14:56:54 +02:00

asm riscv: errata: fix T-Head dcache.cva encoding 2023-10-06 14:56:54 +02:00

uapi/asm riscv: Bump COMMAND_LINE_SIZE value to 1024 2023-03-30 12:49:16 +02:00