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Rob Herring 6e3ae2927b arm64: errata: Add Cortex-A520 speculative unprivileged load workaround ... commit 471470bc70 upstream. Implement the workaround for ARM Cortex-A520 erratum 2966298. On an affected Cortex-A520 core, a speculatively executed unprivileged load might leak data from a privileged load via a cache side channel. The issue only exists for loads within a translation regime with the same translation (e.g. same ASID and VMID). Therefore, the issue only affects the return to EL0. The workaround is to execute a TLBI before returning to EL0 after all loads of privileged data. A non-shareable TLBI to any address is sufficient. The workaround isn't necessary if page table isolation (KPTI) is enabled, but for simplicity it will be. Page table isolation should normally be disabled for Cortex-A520 as it supports the CSV3 feature and the E0PD feature (used when KASLR is enabled). Cc: stable@vger.kernel.org Signed-off-by: Rob Herring <robh@kernel.org> Link: https://lore.kernel.org/r/20230921194156.1050055-2-robh@kernel.org Signed-off-by: Will Deacon <will@kernel.org> Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>		History 2023-10-10 22:00:39 +02:00
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cpucaps	arm64: errata: Add Cortex-A520 speculative unprivileged load workaround	2023-10-10 22:00:39 +02:00
gen-cpucaps.awk	arm64: tools: Add __ASM_CPUCAPS_H to the endif in cpucaps.h	2021-05-13 17:57:43 +01:00
gen-sysreg.awk	arm64/sysreg: Allow leading blanks on comments in sysreg file	2022-07-05 11:45:45 +01:00
Makefile	arm64/sysreg: Enable automatic generation of system register definitions	2022-05-04 15:30:28 +01:00
sysreg	arm64: cpufeature: Fix CLRBHB and BC detection	2023-10-10 22:00:37 +02:00